CN210534558U - Multifunctional development board - Google Patents
Multifunctional development board Download PDFInfo
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- CN210534558U CN210534558U CN201921733341.4U CN201921733341U CN210534558U CN 210534558 U CN210534558 U CN 210534558U CN 201921733341 U CN201921733341 U CN 201921733341U CN 210534558 U CN210534558 U CN 210534558U
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Abstract
The utility model discloses a multi-functional development board, multi-functional development board include the FPGA module and with download module, FPGA module, communication module, clock module and the power module that the FPGA module is connected. The download module comprises a data interface and a data conversion chip which are connected; the communication module comprises an Ethernet module and a WIFI module and is used for being matched with the FPGA module to carry out data communication; the clock module comprises a first clock module and a second clock module, the first clock module is used for providing clock signals for the download module and the communication module, and the second clock module is used for providing a real-time clock and timing signals for the FPGA module; the power module is used for providing an adaptive power supply for the FPGA module. In this way, the utility model provides a multi-functional development board can be suitable for different communication occasions.
Description
Technical Field
The utility model relates to an electronic information relates to embedded hardware field, in particular to multi-functional development board.
Background
In the existing FPGA development board, during data transmission, Ethernet data or WIFI data cannot be directly received, and other external modules are generally required to be introduced to receive the Ethernet data or the WIFI data and then connected with the FPGA development board in a data line format, so that the FPGA development board can acquire the Ethernet data or the WIFI data, the application range of the whole development board is narrow, and the FPGA development board cannot be applied to various scenes.
SUMMERY OF THE UTILITY MODEL
The utility model provides a multi-functional development board to solve the problem that the development board among the prior art can't direct reception ethernet data or WIFI data.
In order to solve the technical problem, the utility model discloses a technical scheme be: provided is a multi-functional development board including: an FPGA module; the download module is connected with the FPGA module and comprises a data interface and a data conversion chip which are connected; the communication module is connected with the FPGA module, comprises an Ethernet module and a WIFI module and is used for being matched with the FPGA module to carry out data communication; the clock module is connected with the FPGA module and comprises a first clock module and a second clock module, the first clock module is used for providing clock signals for the download module and the communication module, and the second clock module is used for providing a real-time clock and a timing signal for the FPGA module; and the power supply module is connected with the FPGA module and used for providing an adaptive power supply for the FPGA module.
According to an embodiment of the present invention, the ethernet module includes a first network port connector, a first port physical layer chip connected to the first network port connector, a second network port connector, and a second port physical layer chip connected to the first network port connector; the WIFI module comprises a WIFI module.
According to the utility model provides an embodiment, communication module still includes: the LVDS module comprises an LVDS interface and is used for being matched with the FPGA module to carry out data communication with the LVDS interface specification; the MIPI module is used for being matched with the FPGA module to carry out data communication of an MIPI protocol; and the CAN module comprises a CAN (Controller Area Network) chip and is used for being matched with the FPGA module to carry out data communication of a CAN protocol.
According to the utility model provides an embodiment, the MIPI module includes: a MIPI DSI module includes a stacked board connector. MIPI CSI module, including FPC connector.
According to the utility model provides an embodiment, power module includes a plurality of power chips, a plurality of power chips are used for providing different adaptation voltages.
According to the utility model provides an embodiment, multi-functional development board still include with the high-speed storage module that the FPGA module is connected, high-speed storage module is used for the cooperation the FPGA module carries out the rapid storage and the reading of data.
According to an embodiment of the present invention, the high speed memory module includes a DDR3 chip.
According to the utility model provides an embodiment, multi-functional development board still include with the storage module that the FPGA module is connected, storage module is used for the FPGA module provides outside storage space.
According to the utility model provides an embodiment, multi-functional development board still include with the digital analog conversion module that the FPGA module is connected, digital analog conversion module is used for the cooperation the FPGA module carries out the digital analog conversion of signal.
According to the utility model provides an embodiment, multi-functional development board still include with the switch module that the FPGA module is connected, switch module includes a plurality of logic switches, switch module is through control the logic state of a plurality of logic switches, in order to control the FPGA module operation.
The utility model has the advantages that: different from the prior art, in the above embodiment, through set up communication module in multi-functional development board, communication module is including ethernet module and WIFI module to can directly cooperate the FPGA module to carry out ethernet communication and WIFI communication, can be applicable to various communication requirements, thereby guarantee that multi-functional development board can be applicable to different demand environment.
Drawings
Fig. 1 is a schematic flow chart of a first embodiment of the multifunctional development board provided by the present invention;
fig. 2 is a schematic flow chart of a second embodiment of the multifunctional development board provided by the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
In addition, if there is a description relating to "first", "second", etc. in the embodiments of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.
Referring to fig. 1-2, the present invention provides a multi-functional development board 10, which includes an FPGA module 100, a download module 200, a communication module 300, a clock module 400, and a power module 500.
The FPGA module 100 includes an FPGA (Field Programmable Gate Array) chip. The download module 200 is connected to the FPGA module 100, and the download module 200 includes a data interface and a data conversion chip, and the download module 200 may be used for external connection and downloading the configuration program of the FPGA module 100.
In a specific implementation, the data interface may specifically be a USB interface, and the data conversion chip may specifically be a USB to JTAG chip.
The communication module 300 is connected to the FPGA module 100, and includes an ethernet module 310 and a WIFI module 320, for cooperating with the FPGA module 100 to perform data communication.
Specifically, the ethernet module 310 includes a first network port connector, a second network port connector, a first port physical layer chip and a second port physical layer chip. The first network port connector is connected with the first port physical layer chip, and the second network port connector is connected with the second port physical layer chip.
Preferably, the first network port connector and the second network port connector may be RJ45 network port connectors. The first port physical layer chip and the second port physical layer chip may both be ethernet PHY chips. Therefore, the present invention provides a multi-function development board 10 that can support gigabit network communication via the ethernet module 310.
In a specific embodiment, the WIFI module 320 includes a WIFI module, and may be configured to cooperate with the FPGA module 100 to perform WIFI communication.
The clock module 400 is connected to the FPGA module 100, and includes a first clock module 410 and a second clock module 420, where the first clock module 410 is used to provide clock signals to the download module 200 and the communication module 300, and the second clock module 420 is used to provide a real-time clock and timing signals to the FPGA module 100.
Specifically, the first clock module 410 may include a plurality of oscillators and crystals, and the plurality of oscillators may be clock sources of different frequencies. For example, a 50Mhz clock source, a 25Mhz clock source, etc. may be included. The multiple crystals may also be clock sources with different frequencies, such as 12Mhz clock source and 32.7668Khz clock source. The first clock module 410 may thus provide a clock signal to the download module 200 and the communication module 300 connected to the FPGA module 100 by using clock sources of different frequencies. In a specific embodiment, if other modules are connected to the FPGA module 100, the first clock module 410 may also provide clock signals for the other modules.
The second clock module 420 specifically includes an RTC chip, and can be externally connected to a quartz crystal with a preset frequency so as to provide a real-time clock and a timing signal for the FPGA module 100.
The power module 500 is connected to the FPGA module 100, and is configured to provide adaptive power to the FPGA module 100.
Specifically, the power module 500 includes a plurality of power chips, and the plurality of power chips may provide different adaptive voltages. Specifically, conversion of different voltages, such as 5V to 3.3V, 5V to 1.0V, 5V to 9.9V, etc., may be achieved. And the plurality of power chips are respectively connected with the FPGA module 100 or other modules, such as the download module 200 and the communication module 300, so as to supply power to the plurality of modules as required.
In the above embodiment, by setting the communication module 300 in the multifunctional development board 10, the communication module 300 includes the ethernet module 310 and the WIFI module 320, so that the FPGA module 100 can be directly matched to perform ethernet communication and WIFI communication, and the communication module can be applied to various communication requirements, thereby ensuring that the multifunctional development board 10 can be applied to different demand environments.
Referring to fig. 2, the communication module 300 may further include an LVDS module 330, an MIPI module 340 and a CAN module 350 connected to the FPGA module 100.
The LVDS module 330 includes an LVDS (Low-Voltage Differential Signaling) interface, specifically, the LVDS interface includes a sending interface and a receiving interface, and both the sending interface and the receiving interface include a preset number of double rows of pins, so that the LVDS module can be used for high-speed Differential transmission communication.
The MIPI module 340 may be configured to cooperate with the FPGA module 100 to perform data communication of a MIPI (Mobile Industry processor interface) protocol. Specifically, the MIPI module 340 includes a MIPI DSI module 341 and a MIPI CSI module 342, where the MIPI DSI module 341 includes a stacked board connector, and is used to cooperate with the FPGA module 100 to implement data communication of a MIPI DSI protocol, and specifically may be used as a MIPI DSI display screen interface. The MIPI CSI module 342 includes an FPC connector, and may be used to implement data communication of the MIPI CSI protocol in cooperation with the FPGA module 100, and specifically may be used as an interface of the MIPI CSI camera.
In a specific embodiment, the utility model provides a multi-functional development board 10 is still including high-speed storage module 600, and this high-speed storage module 600 is connected with FPGA module 100, can be used for cooperating FPGA module 100 to carry out the flash memory of data and reading.
Preferably, the high speed memory module 600 includes a DDR3 chip.
In an embodiment, the present invention provides a multi-functional development board 10 further comprising a storage module 700, wherein the storage module 700 is connected to the FPGA module 100. Specifically, the memory module 700 may be used to provide an external memory space for the FPGA module 100, so as to prevent the memory space of the FPGA module 100 itself from being insufficient.
Specifically, the memory module 700 may be an SD card, and the FPGA module 100 may write or read data in the memory module 700 as an external memory space.
In a specific embodiment, the utility model provides a multi-functional development board 10 is still including digital analog conversion module 800, and this digital analog conversion module 800 is connected with FPGA module 100, and digital analog conversion module 800 specifically can cooperate FPGA module 100 to carry out the digital analog conversion of signal.
Preferably, the digital-to-analog conversion module 800 includes an AD/DA chip.
In a specific embodiment, the multi-function development board 10 further includes a switch module 900 connected to the FPGA module 100, where the switch module 900 includes a plurality of logic switches, and the switch module 900 controls the program operation of the FPGA module 100 by controlling the logic states of the plurality of logic switches.
In a specific embodiment, the multifunctional development board 10 further includes a GPIO module 910, an industrial screen interface 920, an LED module 930, and a key module 940 connected to the FPGA module 100.
Specifically, the GPIO (General-purpose-input/output) module 910 includes 20pin double-row pins and 40pin double-row pins, and can be used to lead out pins of the FPGA module 100 to serve as a General-purpose I/O port.
The industrial screen interface 920 may also include a PFC connector, which may be used to connect an external industrial screen and cooperate with the FPGA module 100 to display a picture or a video on the industrial screen.
The LED module 930 includes a plurality of LED lamps, and the operating state of the program of the FPGA module 100 can be displayed by turning on or off the plurality of LED lamps.
The key module 940 includes a plurality of keys, and similar to the switch module 900, the key module 940 controls the logic states of the plurality of keys to control the program operation of the FPGA module 100.
In an embodiment, the power module 500 is further configured to provide the adaptive voltage to the high-speed memory module 600, the memory module 700, the digital-to-analog conversion module 800, the switch module 900, the GPIO module 910, the industrial screen interface 920, the LED module 930, and the key module 940.
To sum up, the utility model provides a multifunctional development board 10, through rationally set up high-speed storage module 600, ethernet module 310, WIFI module 320, LVDS module 330, MIPI module 340 and so on multiple functional module on multifunctional development board 10 to provide the adaptation voltage of looks adaptation for these functional modules through power module 500, make the utility model provides a multifunctional development board 10 can assemble multiple functional module, can satisfy multiple communication environment, and can read, store and transmit the data of multiple agreement or multiple format at a high speed; thereby greatly improving the application range and the application efficiency of the multi-functional development board 10.
The above is only the embodiment of the present invention, not the limitation of the patent scope of the present invention, all the equivalent results or equivalent flow transformation made by the contents of the specification and the drawings, or directly or indirectly applied to other related technical fields, all the same principles are included in the patent protection scope of the present invention.
Claims (10)
1. A multi-purpose development board, comprising:
an FPGA module;
the download module is connected with the FPGA module and comprises a data interface and a data conversion chip which are connected;
the communication module is connected with the FPGA module, comprises an Ethernet module and a WIFI module and is used for being matched with the FPGA module to carry out data communication;
the clock module is connected with the FPGA module and comprises a first clock module and a second clock module, the first clock module is used for providing clock signals for the download module and the communication module, and the second clock module is used for providing a real-time clock and a timing signal for the FPGA module;
and the power supply module is connected with the FPGA module and used for providing an adaptive power supply for the FPGA module.
2. The multi-function development board of claim 1, wherein the ethernet module comprises a first network port connector and a first port physical layer chip connected with the first network port connector and a second port physical layer chip connected with the first network port connector; the WIFI module comprises a WIFI module.
3. The multi-function development board of claim 1, wherein the communication module further comprises:
the LVDS module comprises an LVDS interface and is used for being matched with the FPGA module to carry out data communication with the LVDS interface specification;
the MIPI module is used for being matched with the FPGA module to carry out data communication of an MIPI protocol;
and the CAN module comprises a CAN chip and is used for being matched with the FPGA module to carry out data communication of a CAN protocol.
4. The multi-function development board of claim 3, wherein the MIPI module comprises:
a MIPI DSI module including a stacked board connector;
MIPI CSI module, including FPC connector.
5. The multi-function development board of claim 1, wherein the power module comprises a plurality of power chips for providing different adaptation voltages.
6. The multi-function development board according to claim 1, further comprising a high-speed storage module connected to the FPGA module, wherein the high-speed storage module is used for cooperating with the FPGA module to perform fast storage and reading of data.
7. The multi-function development board of claim 6, wherein the high speed memory module comprises a DDR3 chip.
8. The multi-function development board of claim 1, further comprising a memory module connected to the FPGA module, the memory module for providing external memory space for the FPGA module.
9. The multi-functional development board according to claim 1, characterized in that the multi-functional development board further comprises a digital-to-analog conversion module connected to the FPGA module, the digital-to-analog conversion module being configured to cooperate with the FPGA module to perform digital-to-analog conversion of signals.
10. The multi-function development board of claim 1, further comprising a switch module connected to the FPGA module, wherein the switch module comprises a plurality of logic switches, and wherein the switch module controls the FPGA module to operate by controlling logic states of the plurality of logic switches.
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CN112947262A (en) * | 2021-04-16 | 2021-06-11 | 西南科技大学 | FPGA development board |
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CN112947262A (en) * | 2021-04-16 | 2021-06-11 | 西南科技大学 | FPGA development board |
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