CN210518587U - Multi-channel high-definition video distributed processing equipment - Google Patents
Multi-channel high-definition video distributed processing equipment Download PDFInfo
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- CN210518587U CN210518587U CN201921509020.6U CN201921509020U CN210518587U CN 210518587 U CN210518587 U CN 210518587U CN 201921509020 U CN201921509020 U CN 201921509020U CN 210518587 U CN210518587 U CN 210518587U
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Abstract
The utility model discloses a multi-path high-definition video distributed processing device, which comprises a video source selection switching module, a distributed forwarding display circuit, terminal receiving display circuits and display equipment, the video source selection switching module is connected with a PCIE interface of the distributed forwarding display circuit, the distributed forwarding display circuit is connected with each terminal receiving display circuit through optical fibers, the distributed forwarding display circuit, each terminal receiving display circuit and the display equipment are all in wired connection, the video source selection switching module comprises a user interaction interface and a PCIE interface driving module, the distributed forwarding display circuit comprises a power module, a video receiving and coding forwarding module, a video rate balancing module and a video output module, and each terminal receiving display circuit comprises a power module, a video receiving and decoding module, a video data recombination module and a video output module. The utility model discloses can carry out remote high-speed transmission and distributed real-time processing and demonstration to multichannel high definition video.
Description
Technical Field
The utility model relates to a video transmission, video processing and video display field, concretely relates to interactive interface development of host computer, host computer PCIE drive development, SFP + optical port transmission data encoding, parts such as reorganization and video data chronogenesis regeneration are cut apart to video data, can transmit high-bandwidth video data to remote equipment at a high speed to realize local and long-range high definition video processing equipment's video data real-time processing and the function that concatenation was shown is shielded in step simultaneously.
Background
At present, the demand of people for high-definition video is increasingly widespread, the extremely-resulting visual experience brings about technical innovation, the bandwidth of high-definition video data is continuously increased on the basis of HD video, for example, for single-channel 4Kx2K resolution and 30Hz refresh rate ultra-high-definition video, the amount of single-frame uncompressed video data is about 3840x2160x24 ≈ 189.84Mbits, the amount of data needing to be buffered per second is about 189.84x30 ≈ 5.56Gbits, and how to transmit and process a large amount of high-definition video data in real time becomes a current technical demand.
With the continuous innovation of video technology, in order to meet the video transmission processing requirements of ultra-high resolution, such as 2K, 4K, 8K, 16K and even higher resolution, it is necessary to support high-definition video input and output on hardware, process high-speed and large-capacity data in real time, have multiple algorithm processing capabilities on a software level, interact various data communications, and support expansion of a system, so that the processing capability of the system can be improved in multiples.
The system realizes remote high-speed transmission and real-time processing of high-definition videos, can be well connected and integrated with a user monitoring system, an alarm system, a video conference system, a command scheduling system, an information release system, an industrial production control system, a central control system and the like, forms a set of interactive graphic information processing and management platform with complete functions, advanced technology and convenient operation, and lays a certain foundation for application and development of future 8K videos.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a high-speed transmission of multichannel high definition video's to high bandwidth distributed and real-time processing display device. High-speed transmission, real-time processing and display of the high-definition video stream between the upper computer and the distributed video processing platform are achieved through the PCIE interface and the SFP optical transmission interface.
Realize the utility model discloses the concrete technical scheme of purpose is:
a multi-channel high-definition video distributed processing device is characterized by comprising:
the system comprises a video source selection switching module, a distributed forwarding display circuit, each terminal receiving display circuit and display equipment, wherein the video source selection switching module is connected with a PCIE interface of the distributed forwarding display circuit, the distributed forwarding display circuit is connected with each terminal receiving display circuit through an optical fiber, and the distributed forwarding display circuit, each terminal receiving display circuit and the display equipment are all in wired connection; wherein:
1) video source selection switching module, including:
and the user interaction interface is designed through any upper computer development tool, so that the function that a user selects different video files through different keys and sends the video files to the PCIE interface driving module is realized.
And the PCIE interface driving module develops PCIE drive through an upper computer, and realizes data communication with a rear-stage circuit through the PCIE interface according to a user instruction after receiving the file parameters from the user interaction interface.
2) The distributed forwarding display circuit includes:
and the power supply module is respectively connected with the video receiving and coding forwarding module, the video rate balancing module and the video output module and provides required voltage for the video receiving and coding forwarding module, the video rate balancing module and the video output module.
The video receiving and coding forwarding module is connected with the PCIE interface driving module of the video source selection switching module, acquires high-definition video stream data from the video source selection switching module through the PCIE interface, and forwards the high-definition video stream data to a next node circuit through data coding and optical fiber, namely a certain distributed forwarding display circuit or a certain terminal receiving display circuit.
And the video rate balancing module is connected with the video receiving and coding forwarding module, controls the interruption process of video source data transmission by managing the caching process of video data, and further balances the input and output rates of the video.
And the video output module is connected with the video rate balancing module, realizes time sequence regeneration aiming at high-definition video data through mode selection, and sends the video stream meeting the time sequence requirement to a plurality of HDMI output interfaces to drive a plurality of display screens or a plurality of projectors to carry out complete splicing display of the high-definition video.
3) Each terminal reception display circuit includes:
and the power supply module is respectively connected with the video receiving and decoding module, the video data recombination module and the video output module and provides required voltage for the video receiving and decoding module, the video data recombination module and the video output module.
And the video receiving and decoding module is connected with the distributed forwarding display circuit of the previous node, decodes the received coded video data stream and then sends the decoded video data stream to the video data recombination module.
And the video data recombination module is connected with the video receiving and decoding module, realizes the recombination of the video data by managing the caching process of the video data, and transmits the video data to the video output module for remote real-time display.
And the video output module is connected with the video data recombination module, performs time sequence regeneration on the recombined high-definition video data, and also transmits the data to a plurality of HDMI output interfaces to drive a plurality of display screens or a plurality of projectors to perform remote splicing display of high-definition videos.
The distributed processing equipment for the multi-channel high-definition video is characterized by comprising the following steps:
the PCIE interface driving module of the video source selection switching module can realize the instruction communication between the rear-stage circuit and the upper computer while realizing the delivery of the video data appointed by the user between the upper computer and the rear-stage circuit, and completes the interrupt control of the rear-stage circuit on the video source selection switching module. The device can acquire high-definition video stream data from an upper computer through the PCIE interface, supports video input with the highest bandwidth of 32Gbps, has the high-speed serial characteristic of the PCIE interface, and plays a great advantage when facing to throughput of a large amount of video data.
The distributed forwarding display circuits can be in distributed cascade connection through optical fibers, and can also be directly connected to the receiving display circuits of all terminals through the optical fibers, so that the scale of equipment can be adjusted. The device realizes the receiving and forwarding of high-definition video stream through the SFP/SFP + optical port and supports the video transmission with the highest bandwidth of 20 Gbps.
The distributed forwarding display circuit and each terminal receiving display circuit have the function of driving the multi-channel display equipment to output and display through the multi-channel HDMI output interface, so that each distributed node of the distributed processing equipment has the function of independent display, and local and remote real-time splicing display of high-definition videos is achieved.
The utility model discloses based on complete autonomous system design, the system is complete, and cross platform butt joint video data realizes high-speed transmission of high bandwidth video stream's distributed and handles in real time. The utility model discloses arbitrary node circuit of equipment has 1 way PCIE interface, 2 way SFP + optical transmission interface and 4 way HDMI output interfaces simultaneously to design, can transmit the 1080p high definition video stream more than handling 10 ways simultaneously at most. Any node is designed with a high-speed image cache with the capacity of up to 4GB so as to support the caching and algorithm processing of multiple paths of high-definition video streams. The device is suitable for scenes such as data centers, telemedicine, military public security management and the like which need to remotely transmit high-bandwidth video data and process and display the video data in real time.
Drawings
FIG. 1 is a block diagram of the present invention;
FIG. 2 is a block diagram of the video source selection switching module of the present invention;
fig. 3 is a structural block diagram of the distributed forwarding display circuit of the present invention;
fig. 4 is a block diagram of the terminal receiving and displaying circuit structure of the present invention;
fig. 5 is a block diagram of the work flow of the present invention.
Detailed Description
Examples
Referring to fig. 1, the utility model discloses a video source selects switching module 11, distributed to forward display circuit 12, terminal receipt display circuit 13 and display device 14, video source selects switching module 11 and distributed to forward display circuit 12PCIE interface connection, and distributed to forward display circuit 12 and terminal receipt display circuit 13 optical fiber connection, and distributed to forward display circuit 12, terminal receipt display circuit 13 and display device 14 wired connection; the video source selection switching module 11 receives video source parameters from a user through a user interaction interface and transmits the video source parameters to the driving module; after receiving the high-definition video stream from the video source selection switching module 11, the distributed forwarding display circuit 12 performs rate balancing through a data cache, and then forwards the high-definition video stream to a next node circuit at a high speed through SFP/SFP + optical ports through data coding, and simultaneously drives a multi-path HDMI output interface to perform multi-screen splicing display through video time sequence regeneration; after receiving the high-definition video stream from the upper-level forwarding display circuit, the terminal receiving display circuit 13 also sends the high-definition video stream to the timing sequence regeneration module through data caching and recombination, and finally drives the multi-path HDMI output interfaces to perform multi-screen splicing display of the terminal.
Referring to fig. 2, the video source selection switching module 11 of the present invention includes a PCIE interface driving module 21 and a user interaction interface 22, and completes the functions of initializing a bottom layer device interface, applying for a memory, interrupting and managing a register, DMA processing, reading a memory, and operating a file through the driving module 21 developed by an upper computer; the user interaction interface 22 is responsible for receiving an instruction of a user for specifying a video source, and transmitting parameters to the PCIE interface driving module 21, so as to finally realize reading and sending of a specified video file.
Referring to fig. 3, the distributed forwarding display circuit 12 of the present invention includes a power module 31, a video receiving and encoding forwarding module 32, a video rate balancing module 33, and a video output module 34. The video receiving and coding forwarding module 32 is connected with the video source selection switching module 11, the next node circuit, namely the distributed forwarding display circuit 12 or the terminal receiving display circuit 13, and is simultaneously connected with the video rate balancing module 33, and the video receiving and coding forwarding module 32 performs high-speed forwarding while receiving videos; one end of the video rate balancing module 33 is connected with the video receiving and coding forwarding module 32, and the other end is connected with the video output module 34, so that the input and the output of the video stream of the whole circuit are balanced by controlling the video sending rate of the upper computer, and finally, a stable video stream is sent to enter the video output module 34; the video output module 34 performs time sequence regeneration on the video stream with stable rate, and sends the video stream to the multi-path HDMI output interface for screen splicing display.
The power supply module 31 converts the externally input voltage into a required voltage and provides the required voltage to the video receiving and encoding forwarding module 32, the video rate balancing module 33 and the video output module 34.
Referring to fig. 4, the terminal receiving display circuit 13 of the present invention includes a power module 41, a video receiving and decoding module 42, a video data reorganizing module 43, and a video output module 44. A video receiving and decoding module 42, one end of which is connected to the output interface of the previous node forwarding circuit, and the other end of which is connected to the video data restructuring module 43, and which decodes the received video stream data encoded by the data and sends the decoded video stream data to the video data restructuring module 43 for caching and restructuring the video data; the video data recombination module 43 has one end connected to the video receiving and decoding module 42 and the other end connected to the video output module 44, and through the process of managing the video data cache, the recombination of the video data is realized, and a stable video stream is generated and enters the video output module 44; the video output module 44 performs time sequence regeneration on the video stream with stable rate, and sends the video stream to the multi-path HDMI output interface for screen splicing display.
The power supply module 41 converts an externally input voltage into a desired voltage and supplies the voltage to the video receiving and decoding module 42, the video data reconstruction module 43, and the video output module 44.
Referring to fig. 5, take the utility model discloses minimum scale system as an example, select switching module 11, single node distributing type to forward display circuit 12, terminal receipt display circuit 13 and connect respectively and forward display circuit 12 and terminal receipt display circuit 13's two display device 14 constitution minimum scale equipment system at single node distributing type promptly, the work flow is as follows:
after the power is first powered on, the power module 31 of the distributed forwarding display circuit 12 converts the externally input voltage into a required voltage and provides the required voltage to the video receiving and encoding forwarding module 32, the video rate balancing module 33 and the video output module 34, so as to ensure the normal operation of the whole distributed forwarding display circuit 12; the power module 41 of the terminal receiving display circuit 13 converts the externally input voltage into a required voltage and provides the required voltage to the video receiving and decoding module 42, the video data reconstructing module 43 and the video output module 44, so as to ensure the normal operation of the whole terminal receiving display circuit 13.
Secondly, a user inputs a selection instruction of a video source through the user interaction interface 22 of the video source selection switching module 11, and then controls the PCIE interface driving module 21 through parameter transmission, so as to read and send a video file designated by the upper computer.
Next, the video receiving and encoding forwarding module 32 of the distributed forwarding display circuit 12 includes a PCIE high-speed interface video data analyzing module, a video data caching module, and an SFP/SFP + optical interface video data encoding and sending module, and when the PCIE high-speed interface video data analyzing module of the video receiving and encoding forwarding module 32 receives high-definition video stream data transmitted from the PCIE interface driving module 21, the video data is subjected to rate balancing by the video data caching module, and then the video data is sent to the optical transmission interface for high-speed forwarding by the SFP/SFP + optical interface video data encoding and sending module; meanwhile, the video rate balancing module 33 of the distributed forwarding display circuit 12 includes a DDR3 read-write control module, a DDR3 interrupt control module and a DDR3 chipset, when the DDR3 read-write control module of the video rate balancing module 33 writes video data obtained by parsing by the PCIE high-speed interface video data parsing module into the DDR3 chipset, the DDR3 interrupt control module generates an interrupt signal according to the read-write condition of the video data and sends the interrupt signal to the PCIE interface drive module 21 to realize control of the video sending rate of the upper computer, and in addition, the DDR3 read-write control module reads the video data from the DDR3 chipset and sends the video data to the video output module 34 of the distributed forwarding display circuit 12; the video output module 34 includes a video timing regeneration module and an ADV7511 video processing chipset, and when the video timing regeneration module of the video output module 34 performs timing regeneration processing on the video data read from the DDR3 chipset, the video data is sent to the ADV7511 video processing chipset, and is finally output to the display device 14 for output and display after signal conversion.
Finally, the video receiving and decoding module 42 of the terminal receiving and displaying circuit 13 decodes the received SFP/SFP + optical interface video data, and sends the decoded video data to the video data recombining module 43; the video data reorganization module 43 comprises a DDR3 data arranging and reading module and a DDR3 chipset, the DDR3 data arranging and reading module completes video data reorganization in the process of writing the decoded optical port video data into the DDR3 chipset, and finally reads the reorganized video data from the DDR3 chipset and sends the reorganized video data to the video output module 44; the video output module 44 includes a video timing regeneration module and an ADV7511 video processing chipset, and when the video timing regeneration module of the video output module 44 performs timing regeneration processing on the recombined video data read from the DDR3 chipset, the video data is sent to the ADV7511 video processing chipset, and after signal conversion, the video data is finally output to the display device 14 for remote synchronous output and display.
Claims (3)
1. A multi-channel high definition video distributed processing device, the device comprising:
the system comprises a video source selection switching module, a distributed forwarding display circuit, each terminal receiving display circuit and display equipment, wherein the video source selection switching module is connected with a PCIE interface of the distributed forwarding display circuit, the distributed forwarding display circuit is connected with each terminal receiving display circuit through an optical fiber, and the distributed forwarding display circuit, each terminal receiving display circuit and the display equipment are all in wired connection; wherein:
video source selection switching module, including:
the user interaction interface is designed through any upper computer development tool, so that a user can select a video file through a key and send the video file to the PCIE interface driving module;
the PCIE interface driving module is used for developing PCIE driving through an upper computer, and realizing data communication with a rear-stage circuit through a PCIE interface according to a user instruction after receiving file parameters from a user interaction interface;
a distributed forwarding display circuit, comprising:
the power supply module is respectively connected with the video receiving and coding forwarding module, the video rate balancing module and the video output module and provides required voltage for the video receiving and coding forwarding module, the video rate balancing module and the video output module;
the video receiving and coding forwarding module is connected with a PCIE interface driving module of the video source selection switching module, acquires high-definition video stream data from the video source selection switching module through the PCIE interface, and forwards the high-definition video stream data to a next node circuit through data coding and optical fiber, namely a certain distributed forwarding display circuit or a certain terminal receiving display circuit;
the video rate balancing module is connected with the video receiving and coding forwarding module, controls the interruption process of video source data transmission by managing the caching process of video data, and further balances the input and output rates of the video;
the video output module is connected with the video rate balancing module, realizes time sequence regeneration aiming at high-definition video data through mode selection, and sends the video stream meeting the time sequence requirement to a plurality of HDMI output interfaces to drive a plurality of display screens or a plurality of projectors to carry out complete splicing display of the high-definition video;
each terminal reception display circuit includes:
the power supply module is respectively connected with the video receiving and decoding module, the video data recombination module and the video output module and provides required voltage for the video receiving and decoding module, the video data recombination module and the video output module;
the video receiving and decoding module is connected with the distributed forwarding display circuit of the previous node, decodes the received coded video data stream and then sends the decoded video data stream to the video data recombination module;
the video data recombination module is connected with the video receiving and decoding module, realizes the recombination of the video data by managing the caching process of the video data, and sends the video data to the video output module for remote real-time display;
and the video output module is connected with the video data recombination module, performs time sequence regeneration on the recombined high-definition video data, and also transmits the data to a plurality of HDMI output interfaces to drive a plurality of display screens or a plurality of projectors to perform remote splicing display of high-definition videos.
2. The multi-channel high-definition video distributed processing device according to claim 1, wherein the PCIE interface driving module of the video source selection switching module realizes instruction communication between the distributed forwarding display circuit and the upper computer while realizing user-specified video data delivery between the upper computer and the distributed forwarding display circuit, and completes interrupt control of the distributed forwarding display circuit on the video source selection switching module.
3. The distributed processing device for multi-channel high-definition videos as claimed in claim 1, wherein the distributed forwarding display circuits are in distributed cascade connection through optical fibers, or are directly connected to the receiving display circuits of each terminal through optical fibers.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110519531A (en) * | 2019-09-11 | 2019-11-29 | 华东师范大学 | Multi-path high-definition video distribution formula processing equipment |
| CN116016823A (en) * | 2022-12-12 | 2023-04-25 | 昆易电子科技(上海)有限公司 | Video injection device and system |
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2019
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110519531A (en) * | 2019-09-11 | 2019-11-29 | 华东师范大学 | Multi-path high-definition video distribution formula processing equipment |
| CN110519531B (en) * | 2019-09-11 | 2024-03-22 | 华东师范大学 | Multipath high-definition video distributed processing equipment |
| CN116016823A (en) * | 2022-12-12 | 2023-04-25 | 昆易电子科技(上海)有限公司 | Video injection device and system |
| CN116016823B (en) * | 2022-12-12 | 2024-04-12 | 昆易电子科技(上海)有限公司 | Video injection device and system |
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