CN210490918U - System for supporting 5G signal synchronous processing applied to vector signal analyzer platform - Google Patents

Abstract

The utility model relates to a system for supporting 5G signal synchronous processing applied to a vector signal analyzer platform, which comprises a data cache module connected with a data source; the frequency conversion module is connected with the data cache module; the filtering and down-sampling module is connected with the frequency conversion module; and the sliding correlation module is connected with the filtering and down-sampling module. Adopted the utility model discloses a be applied to vector signal analyzer platform support and realize 5G signal synchronous processing's system, fall to 7.68Mbps with the signal sampling rate, it is relevant to do the slip again. The 5G signal synchronization is realized by combining software and hardware, so that the processing speed of the 5G signal synchronization and the analysis speed of a vector signal analyzer platform are greatly improved, and the resource occupancy rate is reduced.

Description

System for supporting 5G signal synchronous processing applied to vector signal analyzer platform

Technical Field

The utility model relates to a communication field especially relates to the signal processing field, specifically indicates a system for supporting realization 5G signal synchronous processing who is applied to vector signal analysis appearance platform.

Background

The development of digital communication has put more recent requirements on testing, and a measuring instrument, a vector signal analyzer, plays a crucial role in transmitter and receiver testing with its powerful function of being able to comprehensively perform accurate measurement and analysis of signals of various modulation modes.

The fifth generation mobile communication technology, 5G for short, is the latest generation cellular mobile communication technology. At present, 3GPP protocol has a relatively perfect 5G communication protocol. The performance goals of 5G are high data rates, reduced latency, energy savings, reduced cost, increased system capacity, and large-scale device connectivity. Wherein high data rates and reduced delays require faster 5G signal synchronization processing techniques.

A 5G module in the vector signal analyzer will also be necessary. For signal analyzers, signal synchronization is a prerequisite for signal analysis. The theoretical basis for synchronization is that the primary synchronization signal PSS has good cross-correlation, and the implementation method is that the local synchronization sequence and the received signal perform sliding correlation. In the 5G frame structure, a primary synchronization signal PSS, a secondary synchronization signal SSS, a broadcast channel PBCH and reference signals of the PBCH form SS/PBCH blocks, one radio frame has a plurality of SS/PBCH blocks, and the primary and secondary synchronization signals contained in different SS/PBCH blocks are the same. PSS is used for coarse synchronization, SSS is used for fine synchronization, PBCH is used for determining frame header position. The coarse synchronization is realized in FPGA when the software is time-consuming. When the FPGA starts to perform coarse synchronization, digital baseband IQ data are stored in the DDR4 at the same time and are used for being uploaded to an upper computer for subsequent analysis. The local SSS sequences have 336 groups, and the SSS is accurately and synchronously placed on an upper computer to be realized in consideration of the occupancy rate of FPGA resources. For 5G signals, the OFDM symbol length can be allocated 256, 512, 1024, 2048 and 4096 points at different sampling rates. If down-sampling is not carried out, the window length of the sliding correlation needs to be changed according to the configuration, the maximum window length is 4096, the longer the window length is, the more the number of points of the sliding correlation operation is, and the slower the synchronous processing speed is; if no down-sampling is performed, more filters, multipliers, adders and registers are needed in the sliding correlation module to realize the sliding correlation of the above 5 OFDM symbol points, so that it is proposed to reduce the signal sampling rate to 7.68Mbps and then perform the sliding correlation. The 5G signal synchronization is realized by combining software and hardware, so that the processing speed of the 5G signal synchronization is greatly improved, and the resource occupancy rate is reduced.

SUMMERY OF THE UTILITY MODEL

The utility model aims at overcoming the shortcoming of above-mentioned prior art, providing a satisfy that the processing speed is fast, the resource occupancy is few, application scope is comparatively extensive be applied to vector signal analyzer platform support realize 5G signal synchronization processing's system.

In order to achieve the above object, the utility model discloses a be applied to vector signal analyzer platform's system that supports to realize 5G signal synchronous processing as follows:

the system for supporting 5G signal synchronous processing applied to the vector signal analyzer platform is mainly characterized by comprising the following components:

the data cache module is connected with the data source;

the frequency conversion module is connected with the data cache module;

the filtering and down-sampling module is connected with the frequency conversion module;

and the sliding correlation module is connected with the filtering and down-sampling module.

Preferably, the frequency conversion module includes:

the frequency conversion signal generating unit is connected with the data caching module;

and the operation unit group comprises a multiplication operation subunit and an addition and subtraction operation subunit.

Preferably, the filtering and down-sampling module includes:

the bandwidth selection unit is connected with the frequency conversion module;

the filter bank comprises a plurality of filters which are connected with the bandwidth selection unit and respectively correspond to different sampling rates;

and the signal output unit is connected with the plurality of filters.

Adopted the utility model discloses a be applied to vector signal analyzer platform support and realize 5G signal synchronous processing's system, fall to 7.68Mbps with the signal sampling rate, it is relevant to do the slip again. The 5G signal synchronization is realized by combining software and hardware, so that the processing speed of the 5G signal synchronization and the analysis speed of a vector signal analyzer platform are greatly improved, and the resource occupancy rate is reduced.

Drawings

Fig. 1 is a schematic structural diagram of the system for supporting 5G signal synchronous processing applied to a vector signal analyzer platform.

Fig. 2 is the utility model discloses a be applied to the frequency conversion module of the system that supports realization 5G signal synchronous processing of vector signal analyzer platform.

Fig. 3 is the utility model discloses a be applied to the filtering of the system of vector signal analyzer platform and realize 5G signal synchronous processing and the structure block diagram of the module of falling sampling.

Fig. 4 is a block diagram of the sliding related module of the system for supporting 5G signal synchronous processing applied to the vector signal analyzer platform of the present invention.

Detailed Description

In order to more clearly describe the technical content of the present invention, the following further description is given with reference to specific embodiments.

The utility model discloses an among the technical scheme of the system that is applied to support realization 5G signal synchronization of vector signal analysis appearance platform, it is the hardware architecture and the relation of connection that support the whole hardware function platform of realizing corresponding function that its main protection is, and wherein each function module and the modular unit that include all can correspond to the concrete hardware circuit in the hardware equipment of actual knowledge or the integrated circuit structure, therefore only relate to the improvement of concrete hardware topology connection structure and concrete hardware circuit, the improvement of hardware part exists, and not only rely on computer control software, and not belong to the carrier of only carrying out control software or computer program, consequently solve corresponding technical problem and obtain corresponding technological effect and do not relate to the application of any control software or computer program yet, that is to say, the utility model discloses only utilize the actual known hardware equipment or the hardware circuit that these module and unit are related to The structural improvement can solve the technical problems to be solved and obtain the corresponding technical effects, and the corresponding functions can be realized without the assistance of specific control software or computer programs.

The utility model discloses a this be applied to system that support of vector signal analysis appearance platform realized 5G signal synchronous processing, include wherein:

the data cache module is connected with the data source;

the frequency conversion module is connected with the data cache module;

the filtering and down-sampling module is connected with the frequency conversion module;

and the sliding correlation module is connected with the filtering and down-sampling module.

As a preferred embodiment of the present invention, the frequency conversion module comprises:

the frequency conversion signal generating unit is connected with the data caching module;

and the operation unit group comprises a multiplication operation subunit and an addition and subtraction operation subunit.

As the preferred embodiment of the present invention, the filtering and down-sampling module includes:

the bandwidth selection unit is connected with the frequency conversion module;

the filter bank comprises a plurality of filters which are connected with the bandwidth selection unit and respectively correspond to different sampling rates;

and the signal output unit is connected with the plurality of filters.

The utility model discloses an among the concrete embodiment, provided 5G signal synchronous processing system, improved the analysis speed of vector signal analysis appearance platform. The hardware realizes the coarse synchronization of 5G signals in FPGA through frequency conversion, filtering, down sampling and sliding related modules to obtain the ID of the cell number

And the initial position of the primary synchronization signal PSS calls and analyzes a 5G signal dynamic link library on the upper computer, and fine synchronization is carried out through an auxiliary synchronization signal SSS to obtain the ID of the cell number

And analyzing the PBCH channel to obtain the position of the frame header, and further analyzing the PDCCH and the PDSCH channel.

As shown in fig. 1, the system for implementing 5G signal synchronous processing of the present invention comprises the following components:

1. data caching:

the fifo IP core is used for caching data, so that in order to prevent missing part of data in the subsequent processing process, the data needs to be cached before synchronization processing, and the synchronization peak can be found without missing the data. This step does not change the sampling rate of the data.

2. Frequency conversion:

the synchronous signal in the 5G signal may not be located at the zero frequency position (the middle position of the bandwidth signal) because of the configuration, and in order to simplify the filter setting in the subsequent filtering step, the step is added before the filtering step, and the synchronous signal is shifted to the zero frequency through the frequency spectrum. The frequency difference between the synchronous signal and the zero frequency can be calculated through parameters configured by the upper computer, and the up-conversion or down-conversion is determined. The frequency spectrum is shifted by mixing the signal with

Multiplication is divided into multiplication and addition and subtraction operations. The specific implementation block diagram is shown in fig. 2.

(1) Iin/Qin, acquiring data IQ data by an analog-to-digital converter ADC, and then converting through a series of sampling rates to obtain data IQ data of a required sampling rate;

(2) the frequency offset value is used as an input parameter of the dds _ builder ip core, and the frequency point is generated as a frequency difference value f between the synchronous signal and the zero frequency_ΔOf a complex number signal

(3) Bandwidth, since the 3GPP protocol specifies that the sampling rate of the 5G signal is different at different bandwidths, the bandwidth is used to make the generated data for frequency conversion have a sampling rate corresponding to the configured bandwidth.

(4) The up/down conversion flag, because the parameter input by the dds _ compiler ip core is positive, and the synchronization signal may be above or below the zero-frequency position, there will be up-conversion or down-conversion during the frequency conversion, and a flag parameter is needed to indicate whether to up-convert or down-convert or not.

3. Filtering and down-sampling:

the primary synchronization signal PSS occupies 127 RE resource grids in the frequency domain, and the subcarrier spacing may be configured to 15kHz and 30kHz, so the bandwidth occupied by the PSS is 3.81MHz at maximum. After the step 2, the PSS signal center is superposed with the zero frequency point, so that a low-pass filter can be designed to extract the synchronous signal, and the synchronization has higher accuracy. The 5G signal has different sampling rates under different bandwidths and subcarrier spacing configurations, and the number of OFDM symbol points is different (the number of FFT points is different) under different sampling rates. The larger the sampling rate is, the larger the number of OFDM points is, and the number of points participating in the sliding correlation operation in step 4 is also large, so that the whole system has long running time and occupies a large amount of resources. The sampling rate of the input signal is down-sampled to 7.68Mbps according to the nyquist sampling theorem. The number of OFDM symbol points is reduced to 512 or 256 (depending on the subcarrier spacing configuration) by down-sampling, and thus the number of points involved in the calculation is reduced. The filtering and down-sampling implementation flow is shown in fig. 3.

4. Sliding correlation:

the sliding correlation is that the correlation result of the current moment is obtained by accumulating after the multiplication in the sliding window, and after the calculation is finished, the sliding window is moved to calculate the correlation result of the next moment. The formula is as follows:

wherein, (.)^*Indicating that conjugation was taken.

The sliding correlation is implemented with an FIR IP core. And taking the local sequence as the coefficient of the filter, and taking the received IQ data as the data to be filtered. Then, the two data are added (or subtracted) correspondingly to the result of the low-pass filter to obtain the real part of the data after sliding correlation, and the two data are subtracted (or added) correspondingly to the extracted Q · I and I · Q to obtain the imaginary part of the data after sliding correlation. According to the operation, the result of sliding correlation between the received data and the local three groups of PSS sequences can be obtained, and then the modulus values of the three groups of data are obtained, wherein only I is obtained_corr·I_corr+Q_corr·Q_corr. And comparing the modulus value with a threshold value, and recording the corresponding time and the sequence number of the local PSS when the modulus value is larger than the threshold value. The implementation flow of the sliding correlation is shown in fig. 4.

The utility model also comprises a dynamic link library for calling 5G signal analysis through the upper computer software, and the dynamic link library is precisely synchronized through an auxiliary synchronizing signal SSS and is in sliding correlation with a local SSS sequence to obtain a more precise position of the synchronizing signal; analyzing the PBCH broadcast channel to obtain the frame header position of the 5G signal and the information carried by the PBCH channel; and extracting frame data from data baseband IQ data uploaded to an upper computer from the FPGA according to the frame header position to analyze a PDCCH (physical Downlink control channel) and a PDSCH (physical Downlink shared channel) channel.

Adopted the utility model discloses a be applied to vector signal analyzer platform support and realize 5G signal synchronous processing's system, fall to 7.68Mbps with the signal sampling rate, it is relevant to do the slip again. The 5G signal synchronization is realized by combining software and hardware, so that the processing speed of the 5G signal synchronization and the analysis speed of a vector signal analyzer platform are greatly improved, and the resource occupancy rate is reduced.

In this specification, the invention has been described with reference to specific embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.

Claims (3)

1. A system for supporting 5G signal synchronous processing applied to a vector signal analyzer platform is characterized by comprising:

the data cache module is connected with the data source;

the frequency conversion module is connected with the data cache module;

the filtering and down-sampling module is connected with the frequency conversion module;

and the sliding correlation module is connected with the filtering and down-sampling module.

2. The system for supporting 5G signal synchronous processing applied to the vector signal analyzer platform according to claim 1, wherein the frequency conversion module comprises:

the frequency conversion signal generating unit is connected with the data caching module;

and the operation unit group comprises a multiplication operation subunit and an addition and subtraction operation subunit.

3. The system for supporting 5G signal synchronous processing applied to the vector signal analyzer platform according to claim 1, wherein the filtering and down-sampling module comprises:

the bandwidth selection unit is connected with the frequency conversion module;

the filter bank comprises a plurality of filters which are connected with the bandwidth selection unit and respectively correspond to different sampling rates;

and the signal output unit is connected with the plurality of filters.

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