CN210431974U - Low-ripple non-stroboscopic LED drive circuit - Google Patents

Low-ripple non-stroboscopic LED drive circuit Download PDF

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Publication number
CN210431974U
CN210431974U CN201921414195.9U CN201921414195U CN210431974U CN 210431974 U CN210431974 U CN 210431974U CN 201921414195 U CN201921414195 U CN 201921414195U CN 210431974 U CN210431974 U CN 210431974U
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resistor
capacitor
electrically connected
circuit
transformer
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郭清腾
卢凯
郑榕龙
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XIAMEN YADE ELECTRONIC TECHNOLOGY CO LTD
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XIAMEN YADE ELECTRONIC TECHNOLOGY CO LTD
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Abstract

The utility model relates to a LED drive circuit technical field, in particular to low ripple does not have stroboscopic LED drive circuit, through setting up filtering anti-surge rectifier circuit, filtering anti-surge rectifier circuit is with the alternating voltage filter rectification back of input, gives the power supply of PFC circuit, and the PFC circuit is used for power factor to correct and swashs the circuit and provides invariable voltage, reduces the output ripple for QR. The flyback control circuit and the secondary side synchronous rectification circuit are arranged to convert the output voltage into the voltage required by the LED driving. The secondary side synchronous rectification circuit outputs a voltage sampling signal, and the output signal of the secondary side synchronous rectification circuit is fed back to the QR flyback circuit through the optical coupling feedback isolation circuit, so that the constant voltage and low ripple output of the LED driving circuit are realized.

Description

Low-ripple non-stroboscopic LED drive circuit
Technical Field
The utility model relates to a LED drive circuit technical field, in particular to low ripple does not have stroboscopic LED drive circuit.
Background
The LED driving is divided into constant voltage driving and constant current driving. Although the constant current driving has a good adaptability to the voltage variation characteristics of the LED, when a plurality of light sources are simultaneously used, the luminance between them is affected. When some of the light sources are damaged, the current of other light sources increases, resulting in accelerated aging of the entire lamp. The lamp panel that constant current drive was equipped with is generally all nonstandard, if whole lamp damages, ordinary user can't directly change. The constant voltage drive is generally designed according to 12V/24V output, has low voltage, safety and reliability, and can be directly used for parallel connection of multiple light sources. The light sources matched with the LED lamp generally have a constant current function, so that even if one or more light sources are damaged, the brightness of other light sources is not influenced, special requirements on light distribution are not required, and the LED lamp is convenient for terminal customers to maintain and use; when the whole lamp is damaged, corresponding light sources can be directly bought in the market, the service cycle of the whole lamp is greatly prolonged, and the LED lamp strip, the G4 lamp beads, the ceiling lamp and the like have wide application.
SUMMERY OF THE UTILITY MODEL
The utility model discloses the technical problem that will solve is: a low ripple and no strobe LED driving circuit is provided.
In order to solve the technical problem, the utility model discloses a technical scheme be:
a low-ripple non-stroboscopic LED drive circuit comprises a filtering anti-surge rectifying circuit, a PFC circuit, a QR flyback circuit, a secondary side synchronous rectifying circuit, a flyback control circuit and an optical coupler isolation feedback circuit;
the PFC circuit is respectively and electrically connected with the filtering anti-surge rectifying circuit, the QR flyback circuit and the flyback control circuit, the QR flyback circuit is respectively and electrically connected with the flyback control circuit and the secondary side synchronous rectifying circuit, and the optical coupling isolation feedback circuit is respectively and electrically connected with the secondary side synchronous rectifying circuit and the flyback control circuit.
The beneficial effects of the utility model reside in that:
by arranging the filtering anti-surge rectifying circuit, the filtering anti-surge rectifying circuit filters and rectifies input alternating-current voltage and supplies power to the PFC circuit, and the PFC circuit is used for power factor correction and provides constant voltage for the QR flyback circuit, so that output ripples are reduced. The flyback control circuit and the secondary side synchronous rectification circuit are arranged to convert the output voltage into the voltage required by the LED driving. The secondary side synchronous rectification circuit outputs a voltage sampling signal, and the output signal of the secondary side synchronous rectification circuit is fed back to the QR flyback circuit through the optical coupling feedback isolation circuit, so that the constant voltage and low ripple output of the LED driving circuit are realized.
Drawings
Fig. 1 is a block diagram of an overall circuit module of a low ripple non-stroboscopic LED driving circuit according to the present invention;
fig. 2 is a schematic circuit diagram of a part of a low ripple non-stroboscopic LED driving circuit according to the present invention;
fig. 3 is a schematic circuit diagram of a secondary side synchronous rectification circuit of a low ripple non-stroboscopic LED driving circuit according to the present invention;
fig. 4 is a schematic circuit diagram of an opto-coupler isolation feedback circuit of a low-ripple non-stroboscopic LED driving circuit according to the present invention;
description of reference numerals:
1. a filtering anti-surge rectifying circuit; 2. a PFC circuit; 3. a QR flyback circuit; 4. a secondary side synchronous rectification circuit; 5. a flyback control circuit; 6. an opto-coupler isolation feedback circuit.
Detailed Description
In order to explain the technical content, the objects and the effects of the present invention in detail, the following description is made with reference to the accompanying drawings in combination with the embodiments.
Referring to fig. 1, the present invention provides a technical solution:
a low-ripple non-stroboscopic LED drive circuit comprises a filtering anti-surge rectifying circuit, a PFC circuit, a QR flyback circuit, a secondary side synchronous rectifying circuit, a flyback control circuit and an optical coupler isolation feedback circuit;
the PFC circuit is respectively and electrically connected with the filtering anti-surge rectifying circuit, the QR flyback circuit and the flyback control circuit, the QR flyback circuit is respectively and electrically connected with the flyback control circuit and the secondary side synchronous rectifying circuit, and the optical coupling isolation feedback circuit is respectively and electrically connected with the secondary side synchronous rectifying circuit and the flyback control circuit.
From the above description, the beneficial effects of the present invention are:
by arranging the filtering anti-surge rectifying circuit, the filtering anti-surge rectifying circuit filters and rectifies input alternating-current voltage and supplies power to the PFC circuit, and the PFC circuit is used for power factor correction and provides constant voltage for the QR flyback circuit, so that output ripples are reduced. The flyback control circuit and the secondary side synchronous rectification circuit are arranged to convert the output voltage into the voltage required by the LED driving. The secondary side synchronous rectification circuit outputs a voltage sampling signal, and the output signal of the secondary side synchronous rectification circuit is fed back to the QR flyback circuit through the optical coupling feedback isolation circuit, so that the constant voltage and low ripple output of the LED driving circuit are realized.
Further, the filtering anti-surge rectifying circuit comprises a capacitor C1, a capacitor C24, a capacitor C25, a capacitor C26, a rectifier bridge BD1, a diode DZ1, a diode ZD2, a diode ZD3, a piezoresistor RV1, a piezoresistor RV2, a piezoresistor RV3, a thermistor NTC1, a transformer T1, a transformer T2, an inductor L1 and a safety resistor F1;
a first end of the rectifier bridge BD1 is electrically connected to one end of the primary winding of the transformer T2, the other end of the primary winding of the transformer T2 is electrically connected to one end of the capacitor C24, one end of the varistor RV2, one end of the capacitor C26 and one end of the thermistor NTC1, the other end of the thermistor NTC1 is electrically connected to one end of the diode DZ1 and one end of the primary winding of the transformer T1, the other end of the diode DZ1 is electrically connected to the other end of the primary winding of the transformer T1, one end of the varistor RV1 and one end of the safety resistor F1, the other end of the varistor RV1 is electrically connected to one end of the secondary winding of the transformer T1, the other end of the secondary winding of the transformer T1 is electrically connected to the other end of the capacitor C26, one end of the resistor RV3, one end of the capacitor C25, one end of the secondary winding of the transformer T2 and one end of the diode ZD2, the other end of the capacitor C25 is electrically connected to the other end of the capacitor C24 and one end of the diode ZD3, the other end of the diode ZD3 is electrically connected to the other end of the varistor RV2 and the other end of the varistor RV3, the other end of the secondary winding of the transformer T2 is electrically connected to the second end of the rectifier bridge BD1, the third end of the rectifier bridge BD1 is electrically connected to one end of the capacitor C1 and one end of the inductor L1, and the fourth end of the rectifier bridge BD1 is electrically connected to the other end of the capacitor C1.
As can be seen from the above description, the safety resistor F1 and the thermistor NTC1 are arranged to limit the power-on impact direct current; the capacitor C1, the capacitor C24, the capacitor C25, the capacitor C26, the inductor L1, the transformer T1, the transformer T2 and the rectifier bridge BD1 are arranged for EMC filtering and rectification; the surge protection circuit is formed by the piezoresistor RV1, the piezoresistor RV2, the piezoresistor RV3, the diode DZ1, the diode DZ2 and the diode DZ3, and the lightning protection test of differential mode 4KV and common mode 6KV can be carried out.
Further, the QR flyback circuit comprises a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R22, a capacitor C3, a diode D2, a diode D9, a field effect transistor Q2 and a magnetic induction coil TR 1A;
one end of the resistor R9 is electrically connected with one end of the capacitor C3 and one end of the magnetic induction coil TR1A, the other end of the resistor R9 is electrically connected with the other end of the capacitor C3 and the cathode of the diode D9, the anode of the diode D9 is electrically connected with the other end of the magnetic induction coil TR1A and the drain of the field effect transistor Q2, the gate of the field effect transistor Q2 is electrically connected with one end of the resistor R7, the other end of the resistor R7 is electrically connected with the source of the field effect transistor Q2, one end of the resistor R22 and one end of the resistor R8, and the other end of the resistor R8 is grounded.
As can be seen from the above description, the QR flyback circuit adopts a QR quasi-resonance operating mode, and forms LC resonance through the magnetic induction coil TR1A and the D-S (drain-source) parasitic capacitance of the field-effect transistor Q2, so that the field-effect transistor Q2 is at the valley bottom each time it is turned off, and the switch is reduced; the field effect transistor Q2 is switched on, and current flows through the magnetic induction coil TR1A, the field effect transistor Q2 and the resistor R8 to charge the magnetic induction coil TR 1A; the current of the magnetic induction coil TR1A is sampled by setting a resistor R8 and a resistor R22; when the charging current reaches a predetermined value, the fet Q2 turns off.
Further, the secondary side synchronous rectification circuit comprises a chip U2, a resistor R30, a resistor R31, a resistor R32, a capacitor C8, a capacitor C27, an electrolytic capacitor CE4, an electrolytic capacitor CE5, a magnetic induction coil TR1B, a transformer T4 and a field effect transistor Q3;
the chip U2 comprises a first pin, a second pin, a third pin, a fourth pin and a fifth pin, the first pin of the chip U2 is electrically connected with one end of the resistor R30, the other end of the resistor R30 is electrically connected with the source of the field effect transistor Q3 and one end of the magnetic induction coil TR1B respectively, the source of the field effect transistor Q3 is electrically connected with one end of the resistor R33, the second pin of the chip U2, the fourth pin of the chip U2, one end of the electrolytic capacitor CE4, one end of the electrolytic capacitor CE5, one end of the secondary winding of the transformer T4 and one end of the capacitor C27 respectively, the source of the field effect transistor Q3, one end of the resistor R33, the second pin of the chip U2, the fourth pin of the chip U2, one end of the electrolytic capacitor CE4, one end of the electrolytic capacitor CE5, one end of the secondary winding of the transformer T4 and one end of the capacitor C27 are all grounded, the other end of the chip U2 is electrically connected with the third pin 27 of the capacitor C27, a fifth pin of the chip U2 is electrically connected to one end of the resistor R31, the other end of the resistor R31 is electrically connected to the gate of the field effect transistor Q3 and the other end of the resistor R32, the other end of the electrolytic capacitor CE4 is electrically connected to the other end of the electrolytic capacitor CE5, the other end of the magnetic induction coil TR1B and one end of the primary winding of the transformer T4, the other end of the primary winding of the transformer T4 is electrically connected to one end of the capacitor C8, and the other end of the capacitor C8 is electrically connected to the other end of the secondary winding of the transformer T4.
As can be seen from the above description, output rectification and filtering are realized by arranging the magnetic induction coil TR1B, the field effect transistor Q3, the electrolytic capacitor CE4, the electrolytic capacitor CE5, the transformer T4 and the capacitor C8; when the field effect transistor is conducted, the tube voltage drop is smaller than the conducting voltage of the diode, so that the field effect transistor Q3 is used for replacing the diode for rectification, and the conducting loss of the field effect transistor Q3 can be reduced; by setting the current for the source-drain of the bleeder field effect transistor Q3; filtering is provided for the third pin of the chip U2 by arranging a capacitor C27; during rectification, when current flows through the field effect transistor Q3, a voltage is generated at the source-drain electrode of the field effect transistor Q3, the voltage at the two ends of the source-drain electrode is detected through the resistor 30, and when the voltage difference at the two ends of the source-drain electrode is larger than the set value of a chip in the flyback control circuit, a high level is input into the field effect transistor Q3 through the resistor R31, so that the field effect transistor Q3 is conducted, and the conduction loss is reduced; as the discharge current decreases, the voltage difference across the source-drain decreases, and as the current approaches 0, fet Q3 turns off, waiting for the next cycle to turn on.
Further, the optical coupling isolation feedback circuit comprises a chip U3, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a resistor R39 and a capacitor C28;
the chip U3 comprises a first pin, a second pin and a third pin, the first pin of the chip U3 is electrically connected with one end of the resistor R38 and one end of the resistor R39 respectively, the other end of the resistor R39 is electrically connected with the other end of the resistor R8, one end of the second pin of the chip U3, one end of the capacitor C28 and one end of the resistor R36 respectively, the other end of the resistor R39, the other end of the resistor R8, the second pin of the chip U3, one end of the capacitor C28 and one end of the resistor R36 are all grounded, the other end of the capacitor C28 is electrically connected with one end of the resistor R37, the other end of the resistor R37 is electrically connected with the third pin of the chip U3 and one end of the resistor R35 respectively, and the other end of the resistor R35 is electrically connected with one end of the resistor R34.
As can be seen from the above description, the resistor R37 and the capacitor C28 compensate for the loop of the chip U3, and when the output voltage of the optocoupler-isolation feedback circuit becomes high, the voltage of the second pin of the chip U3 becomes high through the sampling circuit formed by the resistor R36, the resistor R38 and the resistor R39, so that the current flowing through the first pin and the third pin of the chip U3 increases; the output ripple of the LED driving circuit can be reduced through the optical coupling isolation feedback circuit, so that the aim of no stroboflash is fulfilled.
Furthermore, the QR flyback circuit is electrically connected with the secondary side synchronous rectification circuit through an isolation switch transformer.
Referring to fig. 1 to 4, a first embodiment of the present invention is:
referring to fig. 1, a low-ripple non-strobe LED driving circuit includes a filtering anti-surge rectifying circuit 1, a PFC circuit 2, a QR flyback circuit 3, a secondary side synchronous rectifying circuit 4, a flyback control circuit 5, and an optical coupling isolation feedback circuit 6;
the PFC circuit 2 is respectively and electrically connected with the filtering anti-surge rectifying circuit 1, the QR flyback circuit 3 and the flyback control circuit 5, the QR flyback circuit 3 is respectively and electrically connected with the flyback control circuit 5 and the secondary side synchronous rectifying circuit 4, and the optical coupling isolation feedback circuit 6 is respectively and electrically connected with the secondary side synchronous rectifying circuit 4 and the flyback control circuit 5.
Referring to fig. 2, the filtering anti-surge rectifying circuit 1 includes a capacitor C1 (a thin film capacitor, with a capacitance value of 0.47uF), a capacitor C24 (a Y capacitor, with a capacitance value of 1000pF, with a rated voltage of 305VAC), a capacitor C25 (a Y capacitor, with a capacitance value of 1000pF, with a rated voltage of 305VAC), a capacitor C26 (an X capacitor, with a capacitance value of 0.47uF, with a rated voltage of 305VAC), a rectifying bridge BD1 (model US8KB80R, with a voltage value of 800V, with a current value of 8A), a diode DZ1 (a gas discharge diode, model BK22001002), a diode ZD2 (a gas discharge diode, model BK22001002), a diode ZD3 (a gas discharge diode, model BK22001002), a varistor RV1 (model TVR14511), a varistor RV2 (model TVR14511), a varistor RV3 (model TVR14511), a thermistor 1 (model SCK102R 102), and a common mode transformer 493 102 (amt 1), type T12.7x8x6, inductance value 12mH)), transformer T2 (common mode inductance, type F12x14x5, inductance value 30mH), inductance L1 (type 50-26B, inductance value 0.15mH), and fuse resistance F1 (type 2010T, current value 4A, voltage value 300V);
a first end of the rectifier bridge BD1 is electrically connected to one end of the primary winding of the transformer T2, the other end of the primary winding of the transformer T2 is electrically connected to one end of the capacitor C24, one end of the varistor RV2, one end of the capacitor C26 and one end of the thermistor NTC1, the other end of the thermistor NTC1 is electrically connected to one end of the diode DZ1 and one end of the primary winding of the transformer T1, the other end of the diode DZ1 is electrically connected to the other end of the primary winding of the transformer T1, one end of the varistor RV1 and one end of the safety resistor F1, the other end of the varistor RV1 is electrically connected to one end of the secondary winding of the transformer T1, the other end of the secondary winding of the transformer T1 is electrically connected to the other end of the capacitor C26, one end of the resistor RV3, one end of the capacitor C25, one end of the secondary winding of the transformer T2 and one end of the diode ZD2, the other end of the capacitor C25 is electrically connected to the other end of the capacitor C24 and one end of the diode ZD3, the other end of the diode ZD3 is electrically connected to the other end of the varistor RV2 and the other end of the varistor RV3, the other end of the secondary winding of the transformer T2 is electrically connected to the second end of the rectifier bridge BD1, the third end of the rectifier bridge BD1 is electrically connected to one end of the capacitor C1 and one end of the inductor L1, and the fourth end of the rectifier bridge BD1 is electrically connected to the other end of the capacitor C1.
The QR flyback circuit 3 comprises a resistor R5 (with the resistance value of 100 omega and packaged in 0805), a resistor R6 (with the resistance value of 22 omega and packaged in 0805), a resistor R7 (with the resistance value of 20K omega and packaged in 0805), a resistor R8 (with the resistance value of 0.2 omega and packaged in 2512), a resistor R9 (with the resistance value of 150K omega and packaged in 0805), a resistor R22 (with the resistance value of 1K omega and packaged in 0805), a capacitor C3 (with the capacitance value of 2.2nF and the voltage value of 1KV, X7R and packaged in 1206), a diode D2 (with the model of TK10A80E S4X (S) TO-220), a diode D9 (with the model of ES1J-T SMA), a field-effect transistor Q2 (with the model of TK10A80E S4 TO-220) and a magnetic induction coil TR1 TR 32238 (with the model of PQ 3225);
one end of the resistor R9 is electrically connected with one end of the capacitor C3 and one end of the magnetic induction coil TR1A, the other end of the resistor R9 is electrically connected with the other end of the capacitor C3 and the cathode of the diode D9, the anode of the diode D9 is electrically connected with the other end of the magnetic induction coil TR1A and the drain of the field effect transistor Q2, the gate of the field effect transistor Q2 is electrically connected with one end of the resistor R7, the other end of the resistor R7 is electrically connected with the source of the field effect transistor Q2, one end of the resistor R22 and one end of the resistor R8, and the other end of the resistor R8 is grounded.
Referring TO fig. 3, the secondary side synchronous rectification circuit 4 includes a chip U2 (model number TEA1792TS), a resistor R30 (resistance value 1K Ω, package 0805), a resistor R31 (resistance value 4.7 Ω, package 0805), a resistor R32 (resistance value 10K Ω, package 0805), a capacitor C8 (capacitance value 100nF, package 0805), a capacitor C27 (capacitance value 1uF, package 0805), an electrolytic capacitor CE4 (capacitance value 1000uF, voltage value 35V), an electrolytic capacitor CE5 (capacitance value 1000uF, voltage value 35V), a magnetic coil TR1B (model number PQ3225), a transformer T4 (common mode inductor), and a field-effect transistor Q3 (model number IPP052NE7N3G TO-220);
the chip U2 comprises a first pin, a second pin, a third pin, a fourth pin and a fifth pin, the first pin of the chip U2 is electrically connected with one end of the resistor R30, the other end of the resistor R30 is electrically connected with the source of the field effect transistor Q3 and one end of the magnetic induction coil TR1B respectively, the source of the field effect transistor Q3 is electrically connected with one end of the resistor R33, the second pin of the chip U2, the fourth pin of the chip U2, one end of the electrolytic capacitor CE4, one end of the electrolytic capacitor CE5, one end of the secondary winding of the transformer T4 and one end of the capacitor C27 respectively, the source of the field effect transistor Q3, one end of the resistor R33, the second pin of the chip U2, the fourth pin of the chip U2, one end of the electrolytic capacitor CE4, one end of the electrolytic capacitor CE5, one end of the secondary winding of the transformer T4 and one end of the capacitor C27 are all grounded, the other end of the chip U2 is electrically connected with the third pin 27 of the capacitor C27, a fifth pin of the chip U2 is electrically connected to one end of the resistor R31, the other end of the resistor R31 is electrically connected to the gate of the field effect transistor Q3 and the other end of the resistor R32, the other end of the electrolytic capacitor CE4 is electrically connected to the other end of the electrolytic capacitor CE5, the other end of the magnetic induction coil TR1B and one end of the primary winding of the transformer T4, the other end of the primary winding of the transformer T4 is electrically connected to one end of the capacitor C8, and the other end of the capacitor C8 is electrically connected to the other end of the secondary winding of the transformer T4.
Referring to fig. 4, the optical coupling isolation feedback circuit 6 includes a chip U3 (model TL431), a resistor R34 (resistance 1K Ω, package 0805), a resistor R35 (resistance 1K Ω, package 0805), a resistor R36 (resistance 27K Ω, package 0805), a resistor R37 (resistance 10K Ω, package 0805), a resistor R38 (resistance 5.1K Ω, package 0805), a resistor R39 (resistance 5.1K Ω, package 0805), and a capacitor C28 (capacitance 100nF, package 0805);
the chip U3 comprises a first pin, a second pin and a third pin, the first pin of the chip U3 is electrically connected with one end of the resistor R38 and one end of the resistor R39 respectively, the other end of the resistor R39 is electrically connected with the other end of the resistor R8, one end of the second pin of the chip U3, one end of the capacitor C28 and one end of the resistor R36 respectively, the other end of the resistor R39, the other end of the resistor R8, the second pin of the chip U3, one end of the capacitor C28 and one end of the resistor R36 are all grounded, the other end of the capacitor C28 is electrically connected with one end of the resistor R37, the other end of the resistor R37 is electrically connected with the third pin of the chip U3 and one end of the resistor R35 respectively, and the other end of the resistor R35 is electrically connected with one end of the resistor R34.
The QR flyback circuit 3 is electrically connected with the secondary side synchronous rectification circuit 4 through an isolation switch transformer.
The working principle of the low-ripple non-stroboscopic LED driving circuit is as follows:
when the circuit is started, current supplies power to the chip U1 through the resistor R10, the resistor R26, the resistor R28 and the capacitor C10; the circuit is used for input voltage detection and under-voltage protection; the capacitor C11, the resistor R14, the capacitor C12 and the capacitor C13 are used for compensating the internal error amplifier circuit; the resistor R1, the resistor R2 and the diode D1 are used for driving the field effect transistor Q1; the resistor R19 and the resistor R4 are used for PFC current detection; the diode D10, the resistor R18 and the capacitor C22 are used for PFC inductance current detection; the resistor R11, the resistor R12, the resistor R13, the resistor R20, the resistor R21 and the capacitor C20 are used for detecting a PFC constant voltage point.
The magnetic induction coil TR1D is an auxiliary winding of a transformer TR1, and a diode D5, a resistor R25, an electrolytic capacitor CE2, a resistor R27, a triode Q4 and a voltage-stabilizing diode ZD1 provide VCC voltage for a chip U1; the diode D6, the resistor R23, the resistor R24, the diode D11 and the capacitor C17 are used for detecting the valley bottom of the QR flyback circuit 3, so that the power supply is kept conducted at the valley bottom, and the working efficiency is improved; the resistor R17, the capacitor C16 and the resistor R29 are used for filtering feedback signals of the optical coupling isolation feedback circuit 6; the resistor R33 and the voltage stabilizing diode ZD2 are used for outputting overvoltage protection; the resistor R16 and the piezoresistor NTC2 are used for over-temperature protection; the resistor R22, the resistor R8 and the capacitor C19 are flyback current detection circuits and are used for flyback overcurrent protection.
The transformer T3, the diode D4, the diode D3, the electrolytic capacitor CE1, the field effect transistor Q1 and the resistor R4 form a BOOST circuit; when the power-on circuit is started, the chip U1 provides driving voltage to switch on the field effect transistor Q1, current flows through a primary winding of the transformer T3 through the capacitor C2, the field effect transistor Q1 and the resistor R4 to charge the transformer T3, PFC voltage is sampled to an operational amplifier inside the chip U1 through the resistor R11, the resistor R12, the resistor R13, the resistor R20, the resistor R21 and the capacitor C20, a reference signal is generated, and when the charging current reaches a set value, the field effect transistor Q1 is switched off. The current of the transformer T3 discharges the electrolytic capacitor CE1 through the diode D3. The current of the PFC main inductor is detected through a transformer T3, a diode D10, a resistor R18, and a capacitor C22. When the PFC current is 0, the fet Q1 is turned on again, and so on. By adjusting the on-time of the field effect transistor Q1, the current changes along with the change of the input voltage, thereby achieving the purposes of PF correction and constant voltage.
The QR flyback circuit 3 adopts a QR quasi-resonance working mode, and forms LC resonance through a magnetic induction coil TR1A and a D-S (drain-source) parasitic capacitor of a field-effect tube Q2, so that the field-effect tube Q2 is positioned at the valley bottom every time of being turned off, and the switch is reduced; the field effect transistor Q2 is switched on, and current flows through the magnetic induction coil TR1A, the field effect transistor Q2 and the resistor R8 to charge the magnetic induction coil TR 1A; the current of the magnetic induction coil TR1A is sampled by setting a resistor R8 and a resistor R22; when the charging current reaches a predetermined value, the fet Q2 turns off. The magnetic induction coil TR1A is a primary winding of the transformer TR1, the magnetic induction coil TR1B is a secondary winding of the transformer TR1, and the secondary winding of the transformer TR1 induces a voltage to transmit energy to an output end through a secondary rectifying circuit. When the transformer TR1 is completely discharged, the transformer TR1 and a D-S (drain-source) junction parasitic capacitor of the field effect transistor Q1 form LC series resonance, and the drain voltage of the field effect transistor Q2 can change along with the oscillation frequency; the voltage of the transformer TR1 is sampled through the diode D6, the resistor R23, the resistor R24 and the diode D11, when valley voltage is detected, the field effect transistor Q2 is conducted again, at the moment, the turn-on loss is minimum, and the overall efficiency is improved. The output load is big, little change, through opto-coupler isolation feedback circuit 6, can control field effect transistor Q2's switching frequency through chip U1, reaches the purpose of constant voltage and low ripple.
Output rectification and filtering are realized by arranging a magnetic induction coil TR1B, a field effect transistor Q3, an electrolytic capacitor CE4, an electrolytic capacitor CE5, a transformer T4 and a capacitor C8; when the field effect transistor is conducted, the tube voltage drop is smaller than the conducting voltage of the diode, so that the field effect transistor Q3 is used for replacing the diode for rectification, and the conducting loss of the field effect transistor Q3 can be reduced; by setting the current for the source-drain of the bleeder field effect transistor Q3; filtering is provided for the third pin of the chip U2 by arranging a capacitor C27; during rectification, when current flows through the field effect transistor Q3, a voltage is generated at the source-drain electrode of the field effect transistor Q3, the voltage at the two ends of the source-drain electrode is detected through the resistor 30, and when the voltage difference at the two ends of the source-drain electrode is larger than the set value of the chip U1, a high level is input into the field effect transistor Q3 through the resistor R31, so that the field effect transistor Q3 is conducted, and the conduction loss is reduced; as the discharge current decreases, the voltage difference across the source-drain decreases, and as the current approaches 0, fet Q3 turns off, waiting for the next cycle to turn on.
The resistor R37 and the capacitor C28 are used for loop compensation of the chip U3, when the output voltage of the optical coupling isolation feedback circuit 6 becomes high, the voltage of the second pin of the chip U3 becomes high through a sampling circuit formed by the resistor R36, the resistor R38 and the resistor R39, and then the current flowing through the first pin and the third pin of the chip U3 is increased; the output ripple of the LED driving circuit can be reduced through the optical coupling isolation feedback circuit 6, so that the aim of no stroboscopic effect is fulfilled.
Referring TO fig. 2, the PFC circuit adopts a critical operating mode, and mainly includes a transformer T3 (model number PQ2620), a fast recovery diode D4 (model number ES3J SMC), a fast recovery diode D3 (model number MUR460DO-201AD), an electrolytic capacitor CE1 (capacitance value 100uF, voltage value 450V), a field effect transistor Q1 (model number FMV16N60ESC-P TO-220F), and a resistor R4 (chip resistor, resistance value 0.17 Ω, packaged as 2512) TO form a Boost circuit; when the power-on circuit is started, a chip U1 (model is NCL30030B3DR2G SO16) provides a driving voltage, a field-effect tube Q1 is conducted, current flows through a primary winding of a transformer T3 from a capacitor C2, the field-effect tube Q1 and a resistor R4 charge the transformer T3, and the transformer T3 is charged through a resistor R11 (the resistance value is 470K Ω and the package is 0805), a resistor R12 (the resistance value is 470K Ω and the package is 0805), a resistor R13 (the resistance value is 470K Ω and the package is 0805) and a resistor R20 (the resistance value is 75K Ω and the package is 0805), a resistor R21 (the resistance value is 51K Ω and the package is 0805), a capacitor C20 (the chip capacitor is 330pF, the voltage value is 50V, the model is NPO and the package is 0603) samples the voltage of the PFC circuit to an internal operational amplifier of the chip U1 and generates a; when the charging current reaches a set value, the field effect transistor Q1 is turned off; the current of the transformer T3 discharges the electrolytic capacitor CE1 through the diode D3, and the current of the primary winding of the transformer T3 is detected through the auxiliary winding of the transformer T3, the diode D10 (model 1N41 4148W SOD-123), the resistor R18 (resistance value 1K Ω, packaged in 0805), the capacitor C22 (patch capacitor, capacitance value 22pF, voltage value 50V, model NPO, packaged in 0603), and when the current of the PFC circuit is 0, the fet Q1 is turned on again, and the process is repeated. By adjusting the on-time of the field effect transistor Q1, the current changes along with the change of the input voltage, thereby achieving the purposes of PF correction and constant voltage.
The flyback control circuit comprises a chip U1 (model number is NCL30030B3DR2G SO16), a capacitor C15 (a chip capacitor, the capacitance value is 330pF, the voltage value is 50V, the model number is NPO, the package is 0603), a capacitor C23 (a chip capacitor, the capacitance value is 47nF, the voltage value is 50V, the model number is X7R, the package is 0603), a zener diode ZD2 (the model number is BZT52C43V SOD123), a resistor R33 (a chip resistor, the resistance value is 2K omega, the package is 0805), a diode D6 (the model number is S1M SMA), a resistor R23 (a chip resistor, the capacitance value is 10K omega, the package is 0805), a resistor R24 (a chip resistor, the resistance value is 10K omega, the package is 0805), a diode D11 (the model number is 1N58 5819HW-7-F SOD123), a capacitor C19 (a chip capacitor, the voltage value is 100pF, the voltage value is 50, the package is 0805), and an electrolytic capacitor C3 (a chip capacitor), voltage value 35V), capacitor C18 (chip capacitor, capacitance value 1uF, voltage value 50V, model X7R, package 0805), capacitor C17 (chip capacitor, capacitance value 22pF, voltage value 50V, model X7R, package 0805), resistor R17 (chip resistor, resistance value 100K Ω, package 0805), capacitor C16 (chip capacitor, capacitance value 330pF, voltage value 50V, model NPO, package 0603), resistor R29 (chip resistor, resistance value 1K Ω, package 0805), capacitor C21 (chip capacitor, capacitance value 330pF, voltage value 50V, model NPO, package 0603), resistor R735 (chip resistor, resistance value 1K Ω, package 0805), resistor R5 (chip resistor, resistance value 30, package 0805), package 2 (581F-4148F), SOD-387), and package 0805) A resistor R6 (a chip resistor with a resistance value of 22 omega packaged in 0805), a resistor R16 (a chip resistor with a resistance value of 5.1K omega packaged in 0805), a thermistor NTC2 (model TSM2A473F39H1RZ 0805), and a diode ZD1 (model BZT52C18V SOD 123); and the chip capacitor C17 is used for detecting the valley bottom of the flyback circuit, so that the power supply is kept conducted at the valley bottom, and the working efficiency is improved. The resistor R17 and the patch capacitor C16 are used for filtering secondary side optical coupling feedback signals; the chip resistor R16 and the thermistor NTC2 are used for over-temperature protection; the resistor R22, the resistor R8 and the capacitor C19 are flyback current detection circuits and are used for flyback overcurrent protection.
The low-ripple non-stroboscopic LED drive circuit designed by the scheme has the following advantages:
1. the front stage adopts the PFC circuit 2, can realize the wide voltage input, can meet various market requirements; the PF value and the working efficiency can be improved, harmonic waves are reduced, and the interference to a power grid is reduced.
2. The input end uses devices such as a piezoresistor, a discharge tube and the like, has good anti-surge and lightning stroke effects, and can adapt to various severe electrical environments.
3. The LED driving circuit has various protections of overvoltage, overcurrent, overtemperature, output short circuit and the like, and has good reliability.
4. By using the QR flyback circuit 3 and the secondary side synchronous rectification circuit 4, the switching loss and the conduction loss of the device can be reduced, and the overall efficiency can be improved.
5. The LED lamp adopts an isolated constant voltage output working mode, has low output voltage and good safety, uses 12/24V standard voltage, and has wide application in LED lamp belts, G4 lamp beads, ceiling lamps and the like; the light distribution has no special requirement, corresponding light sources can be directly purchased in the market, the maintenance and the use of terminal customers are facilitated, and the service cycle of the whole lamp is prolonged.
6. Through flyback control circuit 5 and opto-coupler isolation feedback circuit 6, the output ripple is little, can realize that the LED lamp does not have the stroboscopic, avoids the injury that the LED stroboscopic caused the human body, satisfies people to the demand of high-quality light source.
To sum up, the utility model provides a pair of stroboscopic LED drive circuit is not had to low ripple through setting up filtering anti-surge rectifier circuit, and filtering anti-surge rectifier circuit gives the power supply of PFC circuit after with the alternating voltage filter rectification of input, and the PFC circuit is used for power factor to correct and provides invariable voltage for QR turns over the flyback circuit, reduces the output ripple. The flyback control circuit and the secondary side synchronous rectification circuit are arranged to convert the output voltage into the voltage required by the LED driving. The secondary side synchronous rectification circuit outputs a voltage sampling signal, and the output signal of the secondary side synchronous rectification circuit is fed back to the QR flyback circuit through the optical coupling feedback isolation circuit, so that the constant voltage and low ripple output of the LED driving circuit are realized.
The above mentioned is only the embodiment of the present invention, and not the limitation of the patent scope of the present invention, all the equivalent transformations made by the contents of the specification and the drawings, or the direct or indirect application in the related technical field, are included in the patent protection scope of the present invention.

Claims (6)

1. A low-ripple non-stroboscopic LED drive circuit is characterized by comprising a filtering anti-surge rectification circuit, a PFC circuit, a QR flyback circuit, a secondary side synchronous rectification circuit, a flyback control circuit and an optical coupler isolation feedback circuit;
the PFC circuit is respectively and electrically connected with the filtering anti-surge rectifying circuit, the QR flyback circuit and the flyback control circuit, the QR flyback circuit is respectively and electrically connected with the flyback control circuit and the secondary side synchronous rectifying circuit, and the optical coupling isolation feedback circuit is respectively and electrically connected with the secondary side synchronous rectifying circuit and the flyback control circuit.
2. The LED driving circuit with low ripple and no stroboscopic effect as claimed in claim 1, wherein the filtering anti-surge rectifying circuit comprises a capacitor C1, a capacitor C24, a capacitor C25, a capacitor C26, a rectifier bridge BD1, a diode DZ1, a diode ZD2, a diode ZD3, a piezoresistor RV1, a piezoresistor RV2, a piezoresistor RV3, a thermistor NTC1, a transformer T1, a transformer T2, an inductor L1 and a fuse resistor F1;
a first end of the rectifier bridge BD1 is electrically connected to one end of the primary winding of the transformer T2, the other end of the primary winding of the transformer T2 is electrically connected to one end of the capacitor C24, one end of the varistor RV2, one end of the capacitor C26 and one end of the thermistor NTC1, the other end of the thermistor NTC1 is electrically connected to one end of the diode DZ1 and one end of the primary winding of the transformer T1, the other end of the diode DZ1 is electrically connected to the other end of the primary winding of the transformer T1, one end of the varistor RV1 and one end of the safety resistor F1, the other end of the varistor RV1 is electrically connected to one end of the secondary winding of the transformer T1, the other end of the secondary winding of the transformer T1 is electrically connected to the other end of the capacitor C26, one end of the resistor RV3, one end of the capacitor C25, one end of the secondary winding of the transformer T2 and one end of the diode ZD2, the other end of the capacitor C25 is electrically connected to the other end of the capacitor C24 and one end of the diode ZD3, the other end of the diode ZD3 is electrically connected to the other end of the varistor RV2 and the other end of the varistor RV3, the other end of the secondary winding of the transformer T2 is electrically connected to the second end of the rectifier bridge BD1, the third end of the rectifier bridge BD1 is electrically connected to one end of the capacitor C1 and one end of the inductor L1, and the fourth end of the rectifier bridge BD1 is electrically connected to the other end of the capacitor C1.
3. The low-ripple and non-strobe LED driving circuit according to claim 1, wherein the QR flyback circuit comprises a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R22, a capacitor C3, a diode D2, a diode D9, a field effect transistor Q2 and a magnetic induction coil TR 1A;
one end of the resistor R9 is electrically connected with one end of the capacitor C3 and one end of the magnetic induction coil TR1A, the other end of the resistor R9 is electrically connected with the other end of the capacitor C3 and the cathode of the diode D9, the anode of the diode D9 is electrically connected with the other end of the magnetic induction coil TR1A and the drain of the field effect transistor Q2, the gate of the field effect transistor Q2 is electrically connected with one end of the resistor R7, the other end of the resistor R7 is electrically connected with the source of the field effect transistor Q2, one end of the resistor R22 and one end of the resistor R8, and the other end of the resistor R8 is grounded.
4. The LED driving circuit with low ripple and no stroboscopic effect as claimed in claim 1, wherein the secondary side synchronous rectification circuit comprises a chip U2, a resistor R30, a resistor R31, a resistor R32, a capacitor C8, a capacitor C27, an electrolytic capacitor CE4, an electrolytic capacitor CE5, a magnetic induction coil TR1B, a transformer T4 and a field effect transistor Q3;
the chip U2 comprises a first pin, a second pin, a third pin, a fourth pin and a fifth pin, the first pin of the chip U2 is electrically connected with one end of the resistor R30, the other end of the resistor R30 is electrically connected with the source of the field effect transistor Q3 and one end of the magnetic induction coil TR1B respectively, the source of the field effect transistor Q3 is electrically connected with one end of the resistor R33, the second pin of the chip U2, the fourth pin of the chip U2, one end of the electrolytic capacitor CE4, one end of the electrolytic capacitor CE5, one end of the secondary winding of the transformer T4 and one end of the capacitor C27 respectively, the source of the field effect transistor Q3, one end of the resistor R33, the second pin of the chip U2, the fourth pin of the chip U2, one end of the electrolytic capacitor CE4, one end of the electrolytic capacitor CE5, one end of the secondary winding of the transformer T4 and one end of the capacitor C27 are all grounded, the other end of the chip U2 is electrically connected with the third pin 27 of the capacitor C27, a fifth pin of the chip U2 is electrically connected to one end of the resistor R31, the other end of the resistor R31 is electrically connected to the gate of the field effect transistor Q3 and the other end of the resistor R32, the other end of the electrolytic capacitor CE4 is electrically connected to the other end of the electrolytic capacitor CE5, the other end of the magnetic induction coil TR1B and one end of the primary winding of the transformer T4, the other end of the primary winding of the transformer T4 is electrically connected to one end of the capacitor C8, and the other end of the capacitor C8 is electrically connected to the other end of the secondary winding of the transformer T4.
5. The low-ripple and non-strobe LED drive circuit of claim 1, wherein the optocoupler-isolation feedback circuit comprises a chip U3, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a resistor R39 and a capacitor C28;
the chip U3 comprises a first pin, a second pin and a third pin, the first pin of the chip U3 is electrically connected with one end of the resistor R38 and one end of the resistor R39 respectively, the other end of the resistor R39 is electrically connected with the other end of the resistor R8, one end of the second pin of the chip U3, one end of the capacitor C28 and one end of the resistor R36 respectively, the other end of the resistor R39, the other end of the resistor R8, the second pin of the chip U3, one end of the capacitor C28 and one end of the resistor R36 are all grounded, the other end of the capacitor C28 is electrically connected with one end of the resistor R37, the other end of the resistor R37 is electrically connected with the third pin of the chip U3 and one end of the resistor R35 respectively, and the other end of the resistor R35 is electrically connected with one end of the resistor R34.
6. The low-ripple and non-strobe LED drive circuit of claim 1, wherein the QR flyback circuit is electrically connected to the secondary side synchronous rectification circuit through an isolation switch transformer.
CN201921414195.9U 2019-08-28 2019-08-28 Low-ripple non-stroboscopic LED drive circuit Active CN210431974U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110493922A (en) * 2019-08-28 2019-11-22 厦门亚锝电子科技有限公司 A kind of LED drive circuit of the low ripple without stroboscopic

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110493922A (en) * 2019-08-28 2019-11-22 厦门亚锝电子科技有限公司 A kind of LED drive circuit of the low ripple without stroboscopic

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