CN210429848U - Heterojunction battery and subassembly packaging structure thereof - Google Patents

Heterojunction battery and subassembly packaging structure thereof Download PDF

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Publication number
CN210429848U
CN210429848U CN201921821113.2U CN201921821113U CN210429848U CN 210429848 U CN210429848 U CN 210429848U CN 201921821113 U CN201921821113 U CN 201921821113U CN 210429848 U CN210429848 U CN 210429848U
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China
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cover plate
amorphous silicon
tco film
silicon layer
battery
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CN201921821113.2U
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丁士引
张忠文
杨蕾
王涛
余波
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Tongwei Solar Hefei Co Ltd
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Tongwei Solar Hefei Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells

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Abstract

The utility model discloses a heterojunction battery pack packaging structure, which comprises a lower cover plate and an upper cover plate, wherein the surface of the lower cover plate is plated with a lower TCO film, and the upper TCO film is plated on the bottom surface of the upper cover plate; the solder ribbon cross-connects adjacent lower and upper TCO films. The utility model discloses still disclose a heterojunction battery, including the battery piece, the battery piece comprises N type silica-based, upper intrinsic amorphous silicon layer, N type amorphous silicon layer, upper surface TCO membrane, lower floor's intrinsic amorphous silicon layer, P type amorphous silicon layer and lower surface TCO membrane. The utility model discloses a heterojunction battery does not have the grid line design, welds through plating TCO membrane collocation at upper and lower apron and brings the inside interconnection of realization subassembly to through laying around the battery piece and weld and bring reduction assembly Rs, and carry out the encapsulation mode that does not have the lamination, greatly reduced encapsulates the energy consumption.

Description

Heterojunction battery and subassembly packaging structure thereof
Technical Field
The utility model relates to a ground is with brilliant silicon solar energy subassembly technical field specifically is a heterojunction battery and subassembly packaging structure thereof.
Background
The structure of a conventional heterojunction cell is shown in the attached figure 1 of the specification, wherein a TCO film is transparent and has good conductivity, so that carriers are collected through the TCO film, then current is collected through grid lines, and the grid lines can shield incident light in the area of the grid lines while collecting the current as in a conventional cell, so that current loss is caused.
The existing heterojunction packaging method mainly comprises the following steps: welding technology, tile folding technology, conductive adhesive tape film pasting technology and the like.
The welding technology comprises the following steps: 1, the electrode is prepared by adopting a low-temperature silver paste material in the conventional cell piece 100 of the heterojunction, the electrode prepared by the low-temperature silver paste has far inferior weldability to the silver paste used by the conventional cell, and the risk is brought to the long-term reliability of the assembly due to low welding tension; 2. the electrodes and the welding strips are attached to the surface of the battery piece, and the main grid lines 101 and the auxiliary grid lines 102 can shield part of incident light rays, so that the output current of the battery piece is reduced; the welding technology heterojunction module battery string structure is shown in the specification and the attached figure 3, the welding technology heterojunction module packaging structure is shown in the specification and the attached figure 4, the battery pieces are connected to obtain a conventional battery string 103, and then the conventional battery string 103 is laminated by POE/EVA 104 and a glass back plate 105.
The tile folding technology comprises the following steps: the method is a technology of bonding adjacent small battery pieces together through conductive adhesive, and a plurality of laminated small pieces 200 are equivalent to a super battery, wherein the conductive adhesive 106 plays a role in bonding the battery pieces and conducting current, the laminated design naturally causes shielding in a certain area, the overlapped part in the specification and the drawings 5 and 6 can shield the battery pieces in a certain area, the shielding of the secondary grid lines 102 is added to reduce the output current of the battery pieces, the structure of the laminated battery piece 201 is shown in the specification and the drawings 7, the packaging structure of the laminated battery is shown in the specification and the drawings 8, and the packaging mode is basically the same as that of the welded conventional battery piece 100.
Conductive adhesive tape film pasting technology: the method is a substitute for a heterojunction welding technology, and the welding technology is replaced by a conductive adhesive 106 film pasting technology due to the problems of the tensile force and the long-term reliability of the welding technology. Similarly, the output current of the battery piece can be reduced due to the shielding of the conductive adhesive tape and the auxiliary grid, and the technical scheme is similar to the welding technology.
Aiming at the prior art, the obvious defects in the prior art can be summarized as follows: 1. due to the arrangement of the main grid line and the auxiliary grid line, the surface of the battery piece is easily shielded, the shading area is increased, and the loss of photoelectric conversion is caused; 2. the main grid line and the auxiliary grid line are arranged for conducting current, but a large amount of slurry can be consumed, so that the consumption of single slurry is increased; 3. either technique requires a lamination process to crosslink the EVA/POE, which requires high power hot oil to provide the crosslinking environment, and is energy intensive.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a heterojunction battery and subassembly packaging structure thereof to solve the problem that proposes among the above-mentioned background art.
In order to achieve the above object, the utility model provides a following technical scheme:
a heterojunction battery pack packaging structure comprises a lower cover plate and an upper cover plate, wherein a sealing ring is arranged between the lower cover plate and the upper cover plate, the sealing ring is inserted into a sealing ring clamping groove, the sealing ring clamping groove is formed in the lower cover plate, a plurality of clamping groove holes are formed in the surface of the lower cover plate positioned in the sealing ring, clamping point columns are inserted into the clamping groove holes, and one ends, far away from the lower cover plate, of the clamping point columns are connected with the upper cover plate;
the lower cover plate is plated with a lower TCO film on the surface, the clamping point columns are arranged on the periphery of the lower TCO film, the clamping point columns on one side penetrate through the lower TCO film, the lower TCO film is provided with a battery piece, one side of the battery piece, far away from the lower TCO film, is connected with an upper TCO film, and the upper TCO film is plated on the bottom surface of the upper cover plate;
and a welding strip is arranged between the adjacent battery pieces and is in cross connection with the adjacent lower TCO film and the upper TCO film.
Preferably, the checkpoint post divide into battery piece card post and welds the area card post, the battery piece card post sets up around the battery piece, it sets up between adjacent battery piece to weld the area card post, it sets up between battery piece card post and welds the area card post to weld the area.
Preferably, the sealing ring is provided with a sealing ring notch.
Preferably, the lower cover plate and the upper cover plate are both made of glass or organic transparent resin plates.
Preferably, the thickness of the organic transparent resin plate is 4-10mm, the high temperature resistance is 250 ℃, and the organic transparent resin plate can bear 1200PA pressure.
The utility model provides a heterojunction battery, includes the battery piece, the battery piece comprises N type silica-based, upper intrinsic amorphous silicon layer, N type amorphous silicon layer, upper surface TCO membrane, lower floor's intrinsic amorphous silicon layer, P type amorphous silicon layer and lower surface TCO membrane, the silica-based top of N type has set gradually upper intrinsic amorphous silicon layer, N type amorphous silicon layer and upper surface TCO membrane, and the silica-based below of N type has set gradually intrinsic amorphous silicon layer, P type amorphous silicon layer and lower surface TCO membrane of lower floor.
Compared with the prior art, the beneficial effects of the utility model are that:
1. the light irradiation loss of the heterojunction battery piece can be effectively reduced: the problem that the main grid line and the auxiliary grid line of the heterojunction cell block the light receiving area of the cell is completely solved, the current of the cell is greatly improved, and the improvement of the heterojunction cell Isc and FF is facilitated, so that the photoelectric conversion efficiency Eff is improved;
2) the unit consumption of the main grid and the auxiliary grid of the heterojunction cell can be eliminated: the current is collected in a mode without main and auxiliary grid lines, the design of the main and auxiliary grid lines is cancelled, the low-temperature silver cost is cancelled, and the use cost of the battery paste is reduced;
3) the EVA/POE encapsulation can be eliminated: EVA/POE is not used for packaging any more, the packaging mode of the assembly is changed, and the packaging cost of the assembly end is reduced;
4) improve the high-efficient interconnection of heterojunction battery: current is not collected through the grid lines any more, and current loss caused in the grid line collecting process is reduced;
5) and (3) low-temperature packaging: EVA/POE encapsulation is not needed, an EVA/POE crosslinking step is not needed, a laminating procedure is cancelled, the auxiliary material cost is reduced, and the encapsulation energy consumption is greatly reduced.
The utility model discloses a heterojunction battery does not have the grid line design, welds through plating TCO membrane collocation at upper and lower apron and brings the inside interconnection of realization subassembly to through laying around the battery piece and weld and bring reduction assembly Rs, and carry out the encapsulation mode that does not have the lamination, greatly reduced encapsulates the energy consumption.
Drawings
FIG. 1 is a schematic diagram of a conventional cell structure according to the prior art;
FIG. 2 is a schematic plan view of a conventional prior art cell;
FIG. 3 is a schematic diagram of a conventional battery string connection configuration of the prior art;
fig. 4 is a schematic diagram of a conventional cell packaging structure in the prior art;
FIG. 5 is a schematic plan view of a prior art stack of shingled cells;
FIG. 6 is a schematic view of a prior art shingled cell string;
FIG. 7 is a perspective view of a prior art shingled battery string;
FIG. 8 is a schematic view of a prior art stack-tile cell string package;
fig. 9 is a schematic structural view of a heterojunction cell of the present invention;
fig. 10 is a schematic plan view of the lower cover plate of the present invention;
fig. 11 is a schematic view of a three-dimensional structure of the lower cover plate of the present invention;
fig. 12 is a schematic sectional view of the lower cover plate structure of the present invention;
fig. 13 is a schematic plan view of the structure of the battery plate of the present invention;
fig. 14 is a schematic structural plan view of the lower cover plate of the present invention when the fastening point posts are inserted;
fig. 15 is a schematic structural plan view of the lower cover plate of the present invention when the battery piece and the solder strip are disposed;
fig. 16 is a schematic perspective view of the structure of the lower cover plate of the present invention when the battery piece and the solder strip are disposed;
fig. 17 is a schematic plan view of the structure of the lower cover plate of the present invention when the upper TCO film is laid;
fig. 18 is a schematic perspective view of the lower cover plate of the present invention when an upper TCO film is laid;
fig. 19 is a schematic sectional view of the structure of the adjacent battery plates interconnected by the solder strip of the present invention;
fig. 20 is a schematic perspective view of the structure of the adjacent battery plates of the present invention when they are interconnected by the solder strip;
FIG. 21 is a schematic view of the upper and lower TCO films of the present invention abutting each other;
fig. 22 is a front view and a split view of the package structure of the present invention;
fig. 23 is an exploded view of the package structure according to the present invention.
In the figure: 1N type silicon substrate, 2 upper intrinsic amorphous silicon layers, 3N type amorphous silicon layers, 4 upper surface TCO films, 5 lower intrinsic amorphous silicon layers, 6P type amorphous silicon layers, 7 lower surface TCO films, 11 lower cover plates, 12 upper cover plates, 13 sealing rings, 131 sealing ring gaps, 14 sealing ring clamping grooves, 15 clamping groove holes, 16 clamping point columns, 161 battery piece clamping columns, 162 welding strip clamping columns, 17 lower TCO films, 18 battery pieces, 19 upper TCO films, 20 welding strips, 100 conventional battery pieces, 101 main grid lines, 102 auxiliary grid lines, 103 conventional battery strings, 104 POE/EVA, 105 glass back plates, 106 conductive adhesive, 200 tile-stacked small pieces and 201 tile-stacked battery pieces.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1-23, the present invention provides a technical solution:
a heterojunction battery is used for carrying out a component packaging structure and comprises a battery piece 18, wherein the battery piece 18 is composed of an N-type silicon substrate 1, an upper intrinsic amorphous silicon layer 2, an N-type amorphous silicon layer 3, an upper TCO film 4, a lower intrinsic amorphous silicon layer 5, a P-type amorphous silicon layer 6 and a lower TCO film 7, the upper intrinsic amorphous silicon layer 2, the N-type amorphous silicon layer 3 and the upper TCO film 4 are sequentially arranged above the N-type silicon substrate 1, the lower intrinsic amorphous silicon layer 5, the P-type amorphous silicon layer 6 and the lower TCO film 7 are sequentially arranged below the N-type silicon substrate 1, the light receiving area of the battery piece is not shielded by any main grid line and any auxiliary grid line any more at the front side and the back side of the heterojunction battery through the arrangement of the upper TCO film 4 and the lower TCO film 7, and better interconnection and packaging among the battery pieces are synchronously realized through the component packaging structure, the interconnection between the cells 18 is accomplished by solder ribbons within the package structure.
The utility model provides a heterojunction battery pack packaging structure, including lower cover plate 11 and upper cover plate 12, be provided with sealing washer 13 between lower cover plate 11 and the upper cover plate 12, sealing washer 13 is inserted and is located in sealing washer draw-in groove 14, sealing washer draw-in groove 14 is seted up in lower cover plate 11, sealing washer 13 is used for connecting upper cover plate 12 and lower cover plate 11, and be used for sealing up the void space between upper cover plate 12 and lower cover plate 11, and, sealing washer 13 is provided with sealing washer breach 131, make when encapsulating, after sealing washer 13 connects lower cover plate 11 and upper cover plate 12, carry out evacuation and the internal circuit through sealing washer breach 131 with the void space between upper cover plate 12 and lower cover plate 11 and derive the back, use silica gel to carry out complete sealing with sealing washer breach 131.
The surface of the lower cover plate 11 positioned in the sealing ring 13 is provided with a plurality of clamping groove holes 15, clamping point columns 16 are inserted in the clamping groove holes 15, one ends, far away from the lower cover plate 11, of the clamping point columns 16 are connected with the upper cover plate 12, the upper ends and the lower ends of the clamping point columns 16 are respectively connected with the side faces, opposite to the lower cover plate 11 and the upper cover plate 12, of the lower cover plate 11, and the clamping point columns 16 are mainly used for limiting the battery piece 18 and the welding strip 20 and preventing the battery piece from being subjected to non-active displacement due to external vibration after being packaged.
The surface of the lower cover plate 11 is plated with a lower TCO film 17, the point clamping columns 16 are arranged on the periphery of the lower TCO film 17, the point clamping columns 16 on one side penetrate through the lower TCO film 17, the lower TCO film 17 is provided with battery pieces 18, one sides, far away from the lower TCO film 17, of the battery pieces 18 are connected with upper TCO films 19, the upper TCO films 19 are plated on the bottom surface of the upper cover plate 12, welding strips 20 are arranged between the adjacent battery pieces 18, and the welding strips 20 are connected with the adjacent lower TCO films 17 and the adjacent upper TCO films 19 in a.
The clamping point column 16 is divided into a cell clamping column 161 and a solder strip clamping column 162, the cell clamping column 161 is arranged around the cell 18, the solder strip clamping column 162 is arranged between the adjacent cells 18, the solder strip 20 is arranged between the cell clamping column 161 and the solder strip clamping column 162, in this embodiment, 38 clamping groove holes 15 are arranged in total, two clamping groove holes 15 are arranged around each cell 18, one cell clamping column 161 is inserted into each clamping groove hole 15, and the four cells 18 are sequentially connected in sequence, two clamping groove holes 15 are arranged between every two cells 18, and the solder strip clamping column 162 is inserted therein to fix the solder strip between the solder strip clamping column 162 and the cell clamping column 161, the lower end of the solder strip 20 is contacted with the lower TCO film 17 below one cell 18, the upper end of the solder strip 20 is contacted with the upper TCO film 19 above the other cell 18, the interconnection and packaging of the cell pieces 18 are realized through the plated upper and lower TCO films.
The lower cover plate 11 and the upper cover plate 12 are both made of glass or organic transparent resin plates, the thickness of the organic transparent resin plates is 4-10mm, the high temperature resistance is 250 ℃, the organic transparent resin plates can bear 1200PA pressure, and the organic transparent resin plates have the characteristics of good light transmittance, ultraviolet band radiation cutoff, good plasticity, flame retardance and the like, and are convenient to meet the requirements of light receiving, packaging and the like.
When the battery pieces are packaged and interconnected, the process is as follows:
1. firstly, laying an organic transparent resin lower cover plate 11 plated with a lower TCO film 17, as shown in the attached figure 11 of the specification;
2, laying a heterojunction battery piece 1 and an indium tin solder strip 20 on the lower TCO film 17, as shown in the attached figure 16 of the specification;
3 laying an organic transparent resin upper cover plate 12 coated with an upper TCO film 19, and correspondingly clamping the organic transparent resin upper cover plate 12 with a lower cover plate 11, so that the lower TCO film 17 and the upper TCO film 19 are interconnected through an indium tin solder strip 20, as shown in the attached figure 18 of the specification;
4 after the clamping, the sealing ring notch 131 is vacuumized, and then the sealing ring notch 131 is sealed by using silica gel to realize complete packaging.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims (4)

1. A heterojunction battery pack packaging structure comprising a lower cover plate (11) and an upper cover plate (12), characterized in that: a sealing ring (13) is arranged between the lower cover plate (11) and the upper cover plate (12), the sealing ring (13) is inserted into a sealing ring clamping groove (14), the sealing ring clamping groove (14) is formed in the lower cover plate (11), a plurality of clamping groove holes (15) are formed in the surface of the lower cover plate (11) positioned in the sealing ring (13), clamping point columns (16) are inserted into the clamping groove holes (15), and one ends, far away from the lower cover plate (11), of the clamping point columns (16) are connected with the upper cover plate (12);
the lower TCO film (17) is plated on the surface of the lower cover plate (11), the checkpoint columns (16) are arranged on the periphery of the lower TCO film (17), the checkpoint column (16) on one side penetrates through the lower TCO film (17), a battery piece (18) is arranged on the lower TCO film (17), an upper TCO film (19) is connected to one side, far away from the lower TCO film (17), of the battery piece (18), and the upper TCO film (19) is plated on the bottom surface of the upper cover plate (12);
and a welding strip (20) is arranged between the adjacent cell pieces (18), and the welding strip (20) is used for cross-connecting the adjacent lower TCO film (17) and the upper TCO film (19).
2. The heterojunction battery pack packaging structure of claim 1, wherein: the bayonet point post (16) divide into battery piece card post (161) and welds area card post (162), battery piece card post (161) sets up around battery piece (18), it sets up between adjacent battery piece (18) to weld area card post (162), it sets up between battery piece card post (161) and welds area card post (162) to weld area (20).
3. The heterojunction battery pack packaging structure of claim 1, wherein: the sealing ring (13) is provided with a sealing ring notch (131).
4. A heterojunction battery for use in the package assembly of any one of claims 1 to 3, comprising a battery plate (18), characterized in that: the solar cell is characterized in that the cell piece (18) is composed of an N-type silicon substrate (1), an upper intrinsic amorphous silicon layer (2), an N-type amorphous silicon layer (3), an upper TCO film (4), a lower intrinsic amorphous silicon layer (5), a P-type amorphous silicon layer (6) and a lower TCO film (7), the upper intrinsic amorphous silicon layer (2), the N-type amorphous silicon layer (3) and the upper TCO film (4) are sequentially arranged above the N-type silicon substrate (1), and the lower intrinsic amorphous silicon layer (5), the P-type amorphous silicon layer (6) and the lower TCO film (7) are sequentially arranged below the N-type silicon substrate (1).
CN201921821113.2U 2019-10-28 2019-10-28 Heterojunction battery and subassembly packaging structure thereof Active CN210429848U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201921821113.2U CN210429848U (en) 2019-10-28 2019-10-28 Heterojunction battery and subassembly packaging structure thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201921821113.2U CN210429848U (en) 2019-10-28 2019-10-28 Heterojunction battery and subassembly packaging structure thereof

Publications (1)

Publication Number Publication Date
CN210429848U true CN210429848U (en) 2020-04-28

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CN201921821113.2U Active CN210429848U (en) 2019-10-28 2019-10-28 Heterojunction battery and subassembly packaging structure thereof

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CN (1) CN210429848U (en)

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