CN210429815U - Image sensor, chip and handheld device - Google Patents

Image sensor, chip and handheld device Download PDF

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Publication number
CN210429815U
CN210429815U CN201921228828.7U CN201921228828U CN210429815U CN 210429815 U CN210429815 U CN 210429815U CN 201921228828 U CN201921228828 U CN 201921228828U CN 210429815 U CN210429815 U CN 210429815U
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image sensor
metal
layer
semiconductor substrate
metallization layers
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CN201921228828.7U
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Chinese (zh)
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赵维民
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Shenzhen Goodix Technology Co Ltd
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Shenzhen Goodix Technology Co Ltd
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Abstract

An image sensor includes a semiconductor substrate (102) and a plurality of pixels, wherein each pixel of the plurality of pixels includes: a photosensor (104) disposed on the semiconductor substrate; a back-end-of-line stack (106) disposed on the semiconductor substrate, wherein the back-end-of-line stack comprises: a plurality of metallization layers (M1-MT); and a capacitor top metal layer (CTM) disposed between two consecutive ones of the plurality of metallization layers, the capacitor top metal having a polarizing layer (110) formed by a plurality of metal gate lines overlying the photosensor. The application also discloses a chip and a handheld device.

Description

Image sensor, chip and handheld device
Technical Field
The present disclosure relates to image sensors, image sensor chips, and handheld devices using the same, and more particularly, to an image sensor with a polarizing layer, an image sensor chip and a handheld device using the same.
Background
CMOS image sensors have been mass produced and applied, for example, CMOS image sensors can be used to implement an off-screen optical fingerprint sensing device.
Generally, the optical fingerprint sensing device under the screen is disposed on the back of the display screen, and when a finger touches the front of the display screen, the light emitted from the display screen to the front reflects the fingerprint information into the image sensor of the optical fingerprint sensing device under the screen to read the fingerprint information. To improve the accuracy of fingerprint information interpretation, reducing the noise received by the off-screen optical fingerprint sensing device has become an important task in the art.
SUMMERY OF THE UTILITY MODEL
An object of the present application is to disclose an image sensor and a chip and a handheld device using the same, so as to solve the above problems.
An embodiment of the present application discloses an image sensor including a semiconductor substrate and a plurality of pixels, wherein each of the plurality of pixels includes: a photosensor disposed on the semiconductor substrate; a back-end-of-line stack disposed on the semiconductor substrate, wherein the back-end-of-line stack comprises: a plurality of metallization layers; and the capacitor top metal layer is arranged between two continuous metallization layers in the metallization layers, and the capacitor top metal is provided with a polarizing layer formed by a plurality of metal grid lines and covers the photosensitive sensor.
An embodiment of the application discloses a chip, including above-mentioned image sensor.
An embodiment of the present application discloses a handheld device for performing optical fingerprint sensing under a screen, including: a display screen assembly; and the image sensor is used for obtaining the fingerprint information of the specific object.
According to the embodiment of the application, the polarizing layer is added in the image sensor, so that the accuracy of optical fingerprint sensing under a screen can be improved.
Drawings
FIG. 1 is a cross-sectional view of an embodiment of one of the pixels of an image sensor of the present application;
FIG. 2 is a cross-sectional view of another embodiment of an image sensor of the present application;
FIG. 3 is a schematic diagram of an embodiment of an image sensor of the present application in a handheld device;
FIG. 4 is a cross-sectional view of the image sensor of FIG. 3;
FIGS. 5-8 are top views of embodiments of the image sensor of FIG. 1;
fig. 9 to 12 are top views of embodiments of a plurality of pixels of the image sensor of the present application;
fig. 13 to 16 are schematic views illustrating a manufacturing process of the image sensor shown in fig. 1.
Wherein the reference numerals are as follows:
100. 200 image sensor
102 semiconductor substrate
104 photosensitive sensor
106 back end of line stack
108 interlayer dielectric layer
110 polarizing layer
112 aperture
114 micro lens
M1-MT metallization layer
CBM capacitor bottom metal layer
Top metal layer of CTM capacitor
120 logic circuit
122 transistor
124 metal-insulator-metal capacitor
126 capacitor lower plate
128 capacitor upper plate
130 through hole
132 through hole
208 display screen assembly
300 hand-held device
201 first side
202 display panel
203 second side
204 polarizer
206 protective cover plate
210 finger
Detailed Description
The following disclosure provides various embodiments or examples, which can be used to implement various features of the present disclosure. The embodiments of components and arrangements described below are provided to simplify the present disclosure. It is to be understood that such descriptions are merely illustrative and are not intended to limit the present disclosure. For example, in the description that follows, forming a first feature on or over a second feature may include certain embodiments in which the first and second features are in direct contact with each other; and may also include embodiments in which additional elements are formed between the first and second features described above, such that the first and second features may not be in direct contact. Further, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
Moreover, spatially relative terms, such as "under," "below," "over," "above," and the like, may be used herein to facilitate describing a relationship between one element or feature relative to another element or feature as illustrated in the figures. These spatially relative terms are intended to encompass a variety of different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
Although numerical ranges and parameters setting forth the broad scope of the application are approximations, the numerical values set forth in the specific examples are reported as precisely as possible. Any numerical value, however, inherently contains certain standard deviations found in their respective testing measurements. As used herein, "about" generally refers to actual values within plus or minus 10%, 5%, 1%, or 0.5% of a particular value or range. Alternatively, the term "about" means that the actual value falls within the acceptable standard error of the mean, subject to consideration by those of ordinary skill in the art to which this application pertains. It is understood that all ranges, amounts, values and percentages used herein (e.g., to describe amounts of materials, length of time, temperature, operating conditions, quantitative ratios, and the like) are modified by the term "about" in addition to the experimental examples or unless otherwise expressly stated. Accordingly, unless indicated to the contrary, the numerical parameters set forth in the specification and attached claims are approximations that may vary depending upon the desired properties sought to be obtained. At the very least, these numerical parameters are to be understood as meaning the number of significant digits recited and the number resulting from applying ordinary carry notation. Herein, numerical ranges are expressed from one end to the other or between the two ends; unless otherwise indicated, all numerical ranges set forth herein are inclusive of the endpoints.
The optical fingerprint sensing device under the screen is arranged on the back of the display screen, when a finger contacts the front of the display screen, the information of the fingerprint is reflected into the image sensor in the optical fingerprint sensing device under the screen by utilizing the light emitted from the display screen to the front so as to judge the fingerprint information. Since light emitted from a portion of the display screen directly enters the image sensor of the optical fingerprint sensing device under the screen toward the back to form a light leakage path, shot noise (shot noise) is generated, and thus the image sensor of the optical fingerprint sensing device under the screen may be provided with a polarizing layer to filter the light leakage. The present application utilizes a Capacitor Top Metal (CTM) in a metal-insulator-metal (MIM) capacitor structure to implement a polarization layer to filter light leakage and increase accuracy in fingerprint information interpretation, as described in detail below. It should be noted that although the image sensor of the present application can improve the accuracy of the off-screen optical fingerprint sensing device, the application is not limited thereto, in other words, the image sensor of the present application can be applied to other occasions besides the off-screen optical fingerprint sensing device.
Fig. 1 is a cross-sectional view of an embodiment of one of the pixels of the image sensor of the present application. It should be noted that the image sensor 100 may include a plurality of pixels, and only one of the pixels is shown in the image sensor 100 in fig. 1. In this embodiment, the image sensor 100 is a front-side-illumination (FSI) image sensor 100 comprising a semiconductor substrate 102, a back-end-of-line (BEOL) stack 106, and a microlens 114. Wherein the semiconductor substrate 102 may be a bulk semiconductor substrate, such as a bulk silicon substrate or a silicon-on-insulator (SOI) substrate. The photosensor 104 is disposed on the semiconductor substrate 102. The back end of line stack 106 is disposed on the front side of the semiconductor substrate 102 in the figure. The microlenses 114 are arranged on the back-end-of-line stack 106 such that the back-end-of-line stack 106 is between the semiconductor substrate 102 and the microlenses 114. In some embodiments, color filters may be further formed between the microlenses 114 and the back-end process stack 106.
The back-end-of-line stack 106 includes an inter-layer dielectric (ILD) layer 108, and the back-end-of-line stack 106 includes metallization layers M1-MT stacked within the ILD layer from below (near the end of the semiconductor substrate 102) up (near the end of the microlens 102), where T is the number of metallization layers. The interlevel dielectric layer may be a low-k dielectric (i.e., a dielectric having a dielectric constant of less than about 3.9) or an oxide. The metallization layers M1-MT may be electrically coupled to each other through vias and to the semiconductor substrate 102 through contacts. The metallization layers M1-MT, vias and contacts may be, for example, a metal such as aluminum copper, germanium, copper or some other metal.
In the present embodiment, the back-end-of-line stack 106 can implement a MIM capacitor structure, i.e., the top two metallization layers MT-1 and MT of the metallization layers M1-MT of the back-end-of-line stack 106 further include a capacitor top metal layer CTM therebetween, and the metallization layer MT-1 (also called a capacitor bottom metal layer (CBM)), the capacitor top metal layer CTM and the interlayer dielectric layer between the metallization layer MT-1 and the capacitor top metal layer CTM can jointly form a MIM capacitor structure, and the capacitor top metal layer CTM and the bottom metal can be coupled to the metallization layer MT.
However, in the present embodiment, the metallization layer MT-1, the capacitor top metal layer CTM, and the metallization layer MT are not only used to implement the mim structure, but the capacitor top metal layer CTM is used to implement the polarization layer. As shown in fig. 1, the capacitor top metal layer CTM may be patterned to have a plurality of metal gate lines overlying the photosensor 104 to serve as a polarizing layer 110. Specifically, according to the design of the polarizing layer 110, only light in a specific direction can pass through, so the polarizing layer 110 implemented by the metal layer CTM on the top of the capacitor can filter light in a direction other than the specific direction, so that light entering the image sensor 100 from the microlens 114 first passes through the plurality of metal gate lines of the polarizing layer 110, and then enters the photosensor 104 after filtering light without specific direction, and not all light passing through the microlens 102 enters the photosensor 106.
In general semiconductor manufacturing process rules, in the metallization layers M1-MT, the width of the upper metallization layer is limited to be thicker, the required pitch is larger, the width of the lower metallization layer can be allowed to be thinner, and the required pitch is smaller, so that a finer metal gate line can be formed by using the lower metallization layer, and the size requirement of the metal gate line of the polarization layer for a specific wavelength can be satisfied. However, when the polarization layer is implemented in a lower metallization layer, the high density of metal gate lines needs to be spread over the photosensitive sensor 104, which may cause an excessive density difference between adjacent metallization layers, and adversely affect the flatness of all upper metallization layers. The capacitor top metal layer CTM and the common metallization layers M1-MT have different semiconductor manufacturing process rules, and generally, the capacitor top metal layer CTM is located between the two topmost metallization layers MT-1 and MT, i.e., the two consecutive metallization layers farthest from the semiconductor substrate 102, but may allow for a finer metal gate line than the metallization layers MT-1 and MT, i.e., the width of the metal gate line in the capacitor top metal layer CTM is smaller than the metal lines in the metallization layers MT-1 and MT, so as to meet the size requirement of the metal gate line of the polarization layer for a specific wavelength. In addition, the use of the top metal layer CTM of the capacitor to form the metal gate line only affects the upper metallization layer MT at most, and has a limited effect, and thus is more advantageous than the use of the lower metallization layer.
In this embodiment, the metallization layer MT-1 should be kept as empty as possible where the path between the micro-lens 114 and the photosensitive sensor 104 passes, i.e., the metallization layer MT-1 is not provided with a metal pattern at a position directly below the photosensitive sensor 104 to avoid light shielding, for example, from a top view, the metallization layer MT-1 is not provided with a metal pattern overlapping with the photosensitive sensor 104. Similarly, the metallization layer MT should be kept as empty as possible at the passing position of the path between the microlens 114 and the photosensitive sensor 104, i.e. the metallization layer MT is not provided with a metal pattern at the position right below the photosensitive sensor 104 to avoid shielding light, however, in some embodiments, the metallization layer MT may be used as an aperture size control, for example, the metallization layer MT is patterned to form a pattern with a specific aperture, the amount of light entering is controlled, i.e. the aperture 112 is formed between the microlens 114 and the photosensitive sensor 104, but the present application is not limited thereto, and the structure of the polarization layer 110 may be formed by using a plurality of metal grating lines of the top metal layer CTM of the capacitor alone.
Fig. 2 is a cross-sectional view of another embodiment of an image sensor of the present application. The image sensor 200 of fig. 2 includes the image sensor 100 of fig. 1 and the peripheral logic circuit 120. Fig. 2 is a schematic diagram, and in some embodiments, the logic circuit 120 and the image sensor 100 are not necessarily disposed in close proximity as shown in fig. 2, but may be spaced apart from each other. The logic circuit 120 includes a transistor 122 disposed on the semiconductor substrate 102. The metallization layers M1 MT in the back-end-of-line stack 106 may be used to connect the transistor 122 to other components (e.g., the image sensor 100 and/or other transistors not shown). The logic circuit 120 further includes a metal-insulator-metal capacitor 124 having a lower capacitor plate 126 and an upper capacitor plate 128 electrically coupled to the metallization layer MT by vias 130 and 132, respectively. Wherein the lower capacitor plate 126 is disposed on the metallization layer MT-1 and the upper capacitor plate 128 is disposed on the top capacitor metal layer CTM.
The present application further provides a chip that may be suitable for use in an off-screen optical fingerprint sensing system that includes an image sensor 100/200. The present application further provides a handheld device, and fig. 3 is a schematic diagram of an embodiment of the image sensor of the present application applied to a handheld device, as shown in fig. 3, the image sensor 100/200 is disposed below the display screen assembly 208 of the handheld device 300. The handheld device 300 may be used to perform off-screen optical fingerprint sensing. The handheld device 300 may be any handheld electronic device such as a smart phone, a personal digital assistant, a handheld computer system, or a tablet computer. Fig. 4 is a cross-sectional view of fig. 3, and it should be noted that although the image sensor of fig. 3 may be the image sensor 100 or the image sensor 200, the cross-sectional view of fig. 4 includes only the image sensor 100 for the sake of brevity. As shown in fig. 4, the display panel assembly 208 includes a display panel 202, a polarizer 204, and a protective cover 206, wherein the display panel 202 has a first side 201 and a second side 203 opposite to the first side 201, the polarizer 204 is disposed on the second side 203 of the display panel 202, and the image sensor 100/200 is disposed on the first side 201 of the display panel 202, such that the display panel 11 is located between the image sensor 100/200 and the polarizer 204, and the protective cover 12 is disposed on the polarizer 204, i.e., on the outermost layer of the display panel assembly 208, to directly contact the finger 210.
In the embodiment, the display panel 202 may be an organic electroluminescent display panel (OLED), but the disclosure is not limited thereto. When the handheld device 300 performs fingerprint recognition, the display panel 202 emits light to prompt a user to press a fingerprint on the display screen assembly 208, and when the finger 210 approaches/contacts the protective cover 206 of the display screen assembly 208, the light L1 directly emitted to the finger 210 in the light emitted by the display panel 202 is reflected and enters the polarizer 204, the polarizer 204 filters out the light L1RNP in an unspecified direction, and only part of the light L1RP is left to enter the image sensor 100.
In addition, among the light rays emitted from the display panel 202, the light ray L2 directly emitted to the image sensor 100 is referred to as light leakage, and the light leakage L2 enters the image sensor 100 without passing through the polarizer 204, so that about half of the light rays L2NP in the light leakage L2 cannot pass through the polarizing layer formed by the plurality of metal gate lines of the polarizing layer 110, and only the other half of the light rays L2P can pass through the polarizing layer formed by the plurality of metal gate lines of the polarizing layer 110, thereby greatly reducing the interference of the light leakage L2 on the fingerprint recognition of the image sensor 100.
In some embodiments, a quarter-wave retarder may be further disposed between the polarizer 204 and the display panel 202 as required, and another quarter-wave retarder corresponding to the quarter-wave retarder may be further disposed between the display panel 202 and the image sensor 100 as required. Also, in some embodiments, the first side 201 of the display panel 202 may be provided with an anti-reflection layer (anti-reflection layer) and/or a buffer layer.
FIG. 5 is a top view of one embodiment of the image sensor 100 of FIG. 1. In contrast, fig. 1 is a cross-sectional view of the image sensor 100 of fig. 5 along the section line a-a'. The polarizing layer formed by a plurality of metal gate lines of the polarizing layer 110 of the image sensor 100 in fig. 5 has a vertical grid-like structure, the lengths of the plurality of metal gate lines are the same, the width of the metal gate line is d1, and the centerline spacing between adjacent metal gate lines is d2, where d2 is approximately equal to twice d 1.
Fig. 6 is a top view of another embodiment of the image sensor 100 of fig. 1. In contrast, fig. 1 is a cross-sectional view of the image sensor 100 of fig. 6 along the section line a-a'. The polarizing layer of the polarizing layer 110 of the image sensor 100 in fig. 6 has a vertical grid-like structure, the width of the metal grid line is d1, and the centerline spacing between adjacent metal grid lines is d2, where d2 is equal to about twice d 1. Unlike fig. 5, the lengths of the plurality of metal gate lines are not the same but are set according to the shape and size of the microlens 114.
Fig. 7 is a top view of yet another embodiment of the image sensor 100 of fig. 1. In contrast, fig. 1 is a cross-sectional view of the image sensor 100 of fig. 7 taken along the section line a-a'. The polarizing layer formed by a plurality of metal gate lines of the polarizing layer 110 of the image sensor 100 in fig. 7 has a grid-like structure with an angle of 45 degrees, the lengths of the plurality of metal gate lines are the same, the width of the metal gate line is d1, and the centerline spacing between adjacent metal gate lines is d2, where d2 is approximately equal to twice d 1.
Fig. 8 is a top view of yet another embodiment of the image sensor 100 of fig. 1. In contrast, fig. 1 is a cross-sectional view of the image sensor 100 of fig. 8 taken along the section line a-a'. The polarizing layer of the polarizing layer 110 of the image sensor 100 in fig. 8 has a grid-like structure with a 45-degree angle, the width of the metal gate line is d1, and the centerline spacing between adjacent metal gate lines is d2, where d2 is equal to about twice d 1. Unlike fig. 7, the lengths of the plurality of metal gate lines are not the same but are set according to the shape and size of the microlens 114.
Fig. 9 is a top view of an embodiment of a plurality of pixels of an image sensor of the present application. The image sensor in FIG. 9 shows four of the pixels 100 of FIG. 5; fig. 10 is a top view of an embodiment of a plurality of pixels of an image sensor of the present application. The image sensor in FIG. 10 shows four of the pixels 100 of FIG. 6; fig. 11 is a top view of an embodiment of a plurality of pixels of an image sensor of the present application. The image sensor of FIG. 11 shows four of the pixels 100 of FIG. 7; fig. 12 is a top view of an embodiment of a plurality of pixels of an image sensor of the present application. The image sensor in fig. 12 shows four pixels 100 of fig. 8. It should be noted that in practice an image sensor may comprise more than four pixels. And the plurality of pixels of the image sensor of the present application are not limited to having the same metal gate line, and in some embodiments, the plurality of pixels of the image sensor may have different metal gate line patterns, for example, the image sensor 100 of fig. 5 to 8 may be mixedly disposed to form a plurality of pixels having different metal gate line patterns.
Fig. 13 to 16 are a manufacturing flow of the image sensor 100 of fig. 1. In fig. 13, a semiconductor substrate 102 is first obtained, and a photosensor 104 is formed on the semiconductor substrate 102. Next, in FIG. 14, a back-end-of-line stack is provided over the front side of the semiconductor substrate 102, including metallization layers M1-MT-1 stacked within the interlayer dielectric layer. For example, sputtering, electroplating or evaporation processes may be used to form the metallization layers M1-MT-1. Next, as shown in fig. 15, a polarizing layer 110 in the capacitor top metal layer CTM is formed on the metallization layer MT-1 according to the polarization characteristics to be set. Next, as shown in fig. 16, a metallization layer MT is formed on the metallization layer MT-1. Finally, the microlens 114 is formed, and the image sensor 100 of fig. 1 is obtained. In some embodiments, color filters may be further formed between the microlenses 114 and the back-end process stack 106.
The application utilizes the capacitor top metal in the metal-insulator-metal capacitor structure to realize the polarizing layer so as to filter light leakage and increase the accuracy when judging fingerprint information.
The foregoing description has set forth briefly the features of certain embodiments of the present application so that those skilled in the art may more fully appreciate the various aspects of the present application. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should understand that they can still make various changes, substitutions and alterations herein without departing from the spirit and scope of the present disclosure.

Claims (17)

1. An image sensor comprising a semiconductor substrate and a plurality of pixels, wherein each pixel of the plurality of pixels comprises:
a photosensor disposed on the semiconductor substrate;
a back-end-of-line stack disposed on the semiconductor substrate, wherein the back-end-of-line stack comprises:
a plurality of metallization layers; and
and the capacitor top metal layer is arranged between two continuous metallization layers in the metallization layers, is provided with a polarizing layer formed by a plurality of metal grid lines and covers the photosensitive sensor.
2. The image sensor of claim 1, further comprising a microlens disposed on the back-end-of-line stack such that the back-end-of-line stack is between the microlens and the semiconductor substrate.
3. The image sensor of claim 1, wherein the plurality of metal gridlines of the polarizing layer are configured to filter out non-directionally specific light.
4. The image sensor of claim 3, wherein the plurality of metal grid lines of the polarizing layer are arranged in parallel.
5. The image sensor of claim 3, wherein the plurality of metal gate lines of the polarizing layer are equally spaced.
6. The image sensor of claim 1, wherein the two consecutive metallization layers are the two consecutive metallization layers of the plurality of metallization layers that are furthest away from the semiconductor substrate.
7. The image sensor of claim 1 wherein the plurality of metal gate lines of the polarizing layer have a width less than the metal lines in the two successive metallization layers.
8. The image sensor of claim 1, wherein lengths of the plurality of metal gate lines of the polarizing layer are the same as each other.
9. The image sensor as claimed in claim 1, wherein lengths of the plurality of metal gate lines of the polarizing layer are set according to a shape of the microlens.
10. The image sensor of claim 1, further comprising:
a logic circuit, comprising:
a transistor provided in the semiconductor substrate; and
a metal-insulator-metal capacitor is provided with a back-end-of-line stack.
11. The image sensor of claim 10, wherein the metal-insulator-metal capacitor comprises:
a capacitor lower plate arranged on the metallization layer close to the semiconductor substrate in the two continuous metallization layers; and
and the capacitor upper plate is arranged on the capacitor top metal layer.
12. The image sensor of claim 11, wherein the capacitive lower plate and the capacitive upper plate are coupled to a metallization layer of the two consecutive metallization layers that is remote from the semiconductor substrate.
13. A chip adapted for use in an off-screen optical fingerprint sensing system, the chip comprising:
the image sensor of any one of claims 1-12.
14. A handheld device for performing optical underscreen fingerprint sensing, comprising:
a display screen assembly; and
the image sensor of any one of claims 1-12, configured to obtain object-specific fingerprint information.
15. The handheld device of claim 14, wherein the display screen assembly comprises:
a display panel; and
a polarizer.
16. The handheld device of claim 15, wherein the polarizer and the polarizing layer have the same polarizing properties.
17. The handheld device of claim 15, wherein the display assembly further comprises a protective cover.
CN201921228828.7U 2019-07-30 2019-07-30 Image sensor, chip and handheld device Active CN210429815U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111052385A (en) * 2019-07-30 2020-04-21 深圳市汇顶科技股份有限公司 Image sensor, manufacturing method thereof, chip and handheld device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111052385A (en) * 2019-07-30 2020-04-21 深圳市汇顶科技股份有限公司 Image sensor, manufacturing method thereof, chip and handheld device

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