CN210429272U - VCOM voltage regulating circuit of LCD display screen - Google Patents
VCOM voltage regulating circuit of LCD display screen Download PDFInfo
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- CN210429272U CN210429272U CN201922037560.5U CN201922037560U CN210429272U CN 210429272 U CN210429272 U CN 210429272U CN 201922037560 U CN201922037560 U CN 201922037560U CN 210429272 U CN210429272 U CN 210429272U
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Abstract
The utility model relates to the technical field of electronics, a VCOM voltage regulating circuit of LCD display screen is disclosed, include: the voltage control circuit comprises a voltage output unit, a voltage division control circuit, a current storage buffer circuit and a PWM square wave control unit; the voltage division control circuit comprises a first resistor R1, a second resistor R2 and a triode Q, one end of the first resistor R1 is connected to the output end of the voltage output unit, the other end of the first resistor R1 is connected to one end of the second resistor R2, the other end of the second resistor R2 is connected with the collector of the triode Q, the emitter of the triode Q is grounded, and the base of the triode Q is connected to the output end of the PWM square wave control unit; the accumulation buffer circuit includes a first capacitor C1. The utility model provides a VCOM voltage regulating circuit of LCD display screen, through the duty cycle that sets up the PWM square wave, change first electric capacity C1's charge-discharge time then, finally can realize adjusting the purpose of VOCM voltage value. The adjusting mode is convenient, fast, simple and effective.
Description
Technical Field
The utility model relates to the technical field of electronics, especially, relate to a VCOM voltage regulating circuit of LCD display screen.
Background
The VCOM voltage is a reference voltage for liquid crystal molecule deflection, and has a direct influence on the display effect of the LCD panel, so that the VCOM voltage value is required to be stable. At present, the design of the display screen reference voltage VCOM adopts a voltage division circuit form to fixedly output a stable VCOM voltage value, and once the voltage value is set, the adjustment and the change can not be carried out subsequently. The VCOM voltage of the mode is output by adopting a fixed value, and under an ideal state, when all display screen parameters are stable and unchanged, the influence of the design mode on the display effect of the display screen is small. However, due to differences in physical structures of the LCD panels, parameter errors in design, and the like, the required VCOM voltage value and the actually designed VCOM voltage value of each LCD panel may be different. Therefore, when the conventional VCOM design circuit is used for batch production, the display effect of each LCD cannot be guaranteed to be normal, and once the abnormal display condition occurs, the abnormal display condition can be improved only by debugging hardware parameters again, so that time and labor are wasted, and potential risks are increased.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a VCOM voltage regulating circuit of LCD display screen aims at solving the trouble problem of VCOM voltage control of LCD display screen among the prior art.
In order to solve the technical problem, the utility model discloses a technical scheme be: a VCOM voltage regulating circuit of an LCD panel is provided, including: the voltage control circuit comprises a voltage output unit, a voltage division control circuit, a current storage buffer circuit and a PWM square wave control unit;
the voltage division control circuit comprises a first resistor R1, a second resistor R2 and a triode Q, one end of the first resistor R1 is connected to the output end of the voltage output unit, the other end of the first resistor R1 is connected to one end of the second resistor R2, the other end of the second resistor R2 is connected with a collector of the triode Q, an emitter of the triode Q is grounded, and a base of the triode Q is connected to the output end of the PWM square wave control unit;
the current storage buffer circuit comprises a first capacitor C1, one end of a first capacitor C1 is connected to the connection point of the first resistor R1 and the second resistor R2, and the other end of the first capacitor C1 is grounded; the VCOM voltage output end of the regulating circuit is connected to the connection point of the first resistor R1 and the second resistor R2;
the PWM square wave control unit is configured to control turning off or turning on of the transistor Q, when the PWM square wave control unit is at a low level, the transistor Q is in a turning off state, the VCOM voltage rises, and the first capacitor C1 starts to be charged at the same time, so that the rising rate of the VCOM voltage decreases; when the PWM square wave control unit is at a high level, the transistor Q is in a conducting state, the VCOM voltage output by the VCOM voltage output terminal becomes low due to the voltage division function of the voltage division control circuit, and the first capacitor C1 starts discharging, so that the falling rate of the VCOM voltage is slowed down.
Furthermore, the current storage buffer circuit further comprises a second capacitor C2, one end of the second capacitor C2 is connected to the connection point of the first resistor R1 and the second resistor R2, and the other end of the second capacitor C2 is grounded.
Further, the voltage division control circuit further comprises a third resistor R3 and a fourth resistor R4; the output end of the PWM square wave control unit is connected with the base electrode through a third resistor R3, one end of a third resistor R3 is connected with the base electrode, the other end of the third resistor R3 is connected with the output end of the PWM square wave control unit, one end of a fourth resistor R4 is connected with a connection point of the third resistor R3 and the base electrode, and the other end of the fourth resistor R4 is grounded.
Further, the voltage output unit generates a direct current voltage by using a DC-DC power supply chip.
Further, the triode Q is an NPN type triode.
Further, the PWM square wave control unit is an MCU chip.
Compared with the prior art, the embodiment of the application mainly has the following beneficial effects:
according to the VCOM voltage regulating circuit of the LCD screen, the base electrode of the triode Q is connected with the PWM square wave control unit for controlling the on-off of the triode Q, and the PWM square wave control unit can generate 100KHz PWM square wave signals. The on-off of the triode is controlled by the PWM square wave signal, so that the first capacitor C1 in the circuit is in a charging state and a discharging state continuously, and the charging time and the discharging time of the first capacitor C1 are adjusted by adjusting the duty ratio of the PWM square wave. The larger the PWM square wave duty ratio is, the longer the first capacitor C1 discharges, the shorter the first capacitor C1 charges, and the lower the VCOM voltage is; the smaller the PWM square wave duty cycle, the shorter the discharge time of the first capacitor C1, and the longer the charge time of the first capacitor C1, the higher the VCOM voltage. When the PWM square wave control unit is at a low level, the transistor Q in the circuit is in a cut-off state, the transistor Q is not turned on from the collector to the emitter, and the VCOM voltage in the circuit is u0(t) 1/Cdt ≈ 1/RCdt, the first capacitor C1 is charged (the initial voltage depends on the charging time t, and the longer the charging time, the closer the VCOM voltage is to the input voltage); when the PWM square wave control unit is at a high level, the transistor Q in the circuit is in a conducting state, the transistor Q is conducting from the collector to the emitter, the VCOM voltage output by the VCOM voltage output terminal becomes low due to the voltage dividing function of the voltage dividing control circuit, but since the first capacitor C1 is in a discharging state at this time, the falling rate of the VCOM voltage can be slowed down; when the PWM square wave control unit is again at a low level, the transistor Q is again in an off state, the VCOM voltage rises, and at the same time the first capacitor C1 starts to charge, and the rising rate of the VCOM voltage is reduced due to the charging of the first capacitor C1. In this process, the VCOM voltage gradually decreases in magnitude, and the value thereof becomes infinitely stable as the energization time gradually increases. Therefore, the purpose of adjusting the voltage value of the VOCM can be finally achieved by setting the duty ratio of the PWM square wave and then changing the charging and discharging time of the first capacitor C1. This regulation mode convenient and fast, it is simple effective, can carry out accurate regulation to each display screen according to user's demand moreover.
Drawings
Fig. 1 is a circuit structure diagram of a VCOM voltage regulating circuit of an LCD panel according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a VCOM voltage regulating circuit of an LCD panel according to an embodiment of the present invention.
Reference numerals: the device comprises a 1-voltage output unit, a 2-voltage division control circuit, a 3-current storage buffer circuit, a 4-PWM square wave control unit and a 5-LCD display screen.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The same or similar reference numerals in the drawings of the present embodiment correspond to the same or similar components; in the description of the present invention, it should be understood that if there are the terms "upper", "lower", "left", "right", etc. indicating the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, it is only for convenience of description and simplification of the description, but it is not intended to indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and therefore the terms describing the positional relationship in the drawings are only for illustrative purposes and are not to be construed as limitations of the present patent, and those skilled in the art can understand the specific meanings of the terms according to specific situations.
The following describes the implementation of the present invention in detail with reference to specific embodiments.
Referring to fig. 1, fig. 1 is a circuit diagram of a VCOM voltage regulating circuit of an LCD panel according to an embodiment of the present invention; the present embodiment provides a VCOM voltage regulator circuit of an LCD display, including: the device comprises a voltage output unit 1, a voltage division control circuit 2, a current storage buffer circuit 3 and a PWM square wave control unit 4;
the voltage division control circuit 2 comprises a first resistor R1, a second resistor R2 and a triode Q, one end of the first resistor R1 is connected to the output end of the voltage output unit 1, the other end of the first resistor R1 is connected to one end of the second resistor R2, the other end of the second resistor R2 is connected with the collector of the triode Q, the emitter of the triode Q is grounded, and the base of the triode Q is connected to the output end of the PWM square wave control unit 4;
the current storage buffer circuit 3 comprises a first capacitor C1, one end of a first capacitor C1 is connected with the connection point of a first resistor R1 and a second resistor R2, and the other end of the first capacitor C1 is grounded; the VCOM voltage output end of the regulating circuit is connected to the connection point of the first resistor R1 and the second resistor R2;
the PWM square wave control unit 4 is configured to control the transistor Q to be turned off or on, when the PWM square wave control unit 4 is at a low level, the transistor Q is in an off state, the VCOM voltage rises, and the first capacitor C1 starts to be charged, so that the rising rate of the VCOM voltage decreases; when the PWM square wave control unit 4 is at a high level, the transistor Q is in a conducting state, the VCOM voltage outputted from the VCOM voltage output terminal becomes low due to the voltage division function of the voltage division control circuit 2, and the first capacitor C1 starts to discharge, so that the falling rate of the VCOM voltage is slowed down.
In the VCOM voltage regulating circuit of the LCD panel, the base of the transistor Q is connected to a PWM square wave control unit 4 for controlling the switching of the transistor Q, wherein the PWM square wave control unit 4 can generate a 100KHz PWM square wave signal. The on-off of the triode is controlled by the PWM square wave signal, so that the first capacitor C1 in the circuit is in a charging state and a discharging state continuously, and the charging time and the discharging time of the first capacitor C1 are adjusted by adjusting the duty ratio of the PWM square wave. The larger the PWM square wave duty ratio is, the longer the first capacitor C1 discharges, the shorter the first capacitor C1 charges, and the lower the VCOM voltage is; the smaller the PWM square wave duty cycle, the shorter the discharge time of the first capacitor C1, and the longer the charge time of the first capacitor C1, the higher the VCOM voltage. When the PWM square wave control unit 4 is at a low level, the transistor Q in the circuit is in a cut-off state, the transistor Q is not turned on from the collector to the emitter, and the VCOM voltage in the circuit is u0(t) ═ 1/Cdt ≈ 1/RCdt, the first capacitor C1 is charged (the initial voltage depends on the charging time t, and the longer the charging time, the closer the VCOM voltage is to the input voltage); when the PWM square wave control unit 4 is at a high level, the transistor Q is in a conducting state, the transistor Q is conducting from the collector to the emitter, the VCOM voltage output from the VCOM voltage output terminal becomes low due to the voltage division function of the voltage division control circuit 2, but since the first capacitor C1 is in a discharging state at this time, the falling rate of the VCOM voltage can be slowed down; when the PWM square wave control unit 4 is again at the low level, the transistor Q is again in the off state, the VCOM voltage rises, and at the same time the first capacitor C1 starts to charge, and the rising rate of the VCOM voltage is reduced due to the charging of the first capacitor C1. In this process, the VCOM voltage gradually decreases in magnitude, and the value thereof becomes infinitely stable as the energization time gradually increases. Therefore, the purpose of regulating the voltage value of the VOCM can be finally achieved by setting the duty ratio of the PWM square wave and then changing the charging and discharging time of the first capacitor C1. This regulation mode convenient and fast, it is simple effective, can carry out accurate regulation to each display screen according to user's demand moreover.
As an embodiment of the present invention, the current storage buffer circuit 3 further includes a second capacitor C2, one end of the second capacitor C2 is connected to the connection point of the first resistor R1 and the second resistor R2, and the other end of the second capacitor C2 is grounded. When the PWM square wave control unit 4 is at a low level, the transistor Q in the circuit is in a cut-off state, the transistor Q is not conducted from the collector to the emitter, and the first capacitor C1 and the second capacitor C2 are charged simultaneously; when the PWM square wave control unit 4 is at a high level, the transistor Q is in a conducting state, the transistor Q is conducting from the collector to the emitter, the VCOM voltage output by the VCOM voltage output terminal becomes low due to the voltage division function of the voltage division control circuit 2, but the first capacitor C1 and the second capacitor C2 are in a discharging state at the same time, so that the falling rate of the VCOM voltage can be slowed down more effectively; when the PWM square wave control unit 4 is again at the low level, the transistor Q is again turned off, the VCOM voltage in the circuit rises, the first capacitor C1 and the second capacitor C2 start to charge at the same time, and the rising rate of the VCOM voltage is significantly reduced due to the simultaneous charging of the first capacitor C1 and the second capacitor C2. By adding a second capacitor C2 in parallel with the first capacitor C1, the VCOM voltage variation amplitude can be further reduced, thereby shortening the power-on time and further saving time for adjustment.
As an embodiment of the present invention, the voltage division control circuit 2 further includes a third resistor R3 and a fourth resistor R4; the output end of the PWM square wave control unit 4 is connected with the base through a third resistor R3, one end of a third resistor R3 is connected with the base, the other end of the third resistor R3 is connected with the output end of the PWM square wave control unit 4, one end of a fourth resistor R4 is connected with the connection point of the third resistor R3 and the base, and the other end of the fourth resistor R4 is grounded.
As an embodiment of the present invention, the voltage output unit 1 generates a DC voltage by using a DC-DC power supply chip. The DC-DC power supply chip can output stable direct-current voltage and has high reliability.
Specifically, the transistor Q is an NPN transistor, and is configured to control a current level in the circuit. The NPN type triode consists of three semiconductors, including two N type semiconductors and one P type semiconductor, wherein the P type semiconductor is located in the middle, and the two N type semiconductors are located on two sides.
Specifically, the PWM square wave control unit 4 is an MCU chip. The aim of regulating the voltage value of the VOCM can be finally achieved by directly setting the duty ratio of the output signal PWM square wave of the MCU chip and then controlling the charging and discharging time of the capacitor.
The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.
Claims (6)
1. A VCOM voltage regulating circuit of LCD display screen is characterized in that it comprises a voltage output unit, a voltage division control circuit, a current storage buffer circuit and a PWM square wave control unit;
the voltage division control circuit comprises a first resistor R1, a second resistor R2 and a triode Q, one end of the first resistor R1 is connected to the output end of the voltage output unit, the other end of the first resistor R1 is connected to one end of the second resistor R2, the other end of the second resistor R2 is connected with a collector of the triode Q, an emitter of the triode Q is grounded, and a base of the triode Q is connected to the output end of the PWM square wave control unit;
the current storage buffer circuit comprises a first capacitor C1, one end of a first capacitor C1 is connected to the connection point of the first resistor R1 and the second resistor R2, and the other end of the first capacitor C1 is grounded; the VCOM voltage output end of the regulating circuit is connected to the connection point of the first resistor R1 and the second resistor R2;
the PWM square wave control unit is configured to control turning off or turning on of the transistor Q, when the PWM square wave control unit is at a low level, the transistor Q is in a turning off state, the VCOM voltage rises, and the first capacitor C1 starts to be charged at the same time, so that the rising rate of the VCOM voltage decreases; when the PWM square wave control unit is at a high level, the transistor Q is in a conducting state, the VCOM voltage output by the VCOM voltage output terminal becomes low due to the voltage division function of the voltage division control circuit, and the first capacitor C1 starts discharging, so that the falling rate of the VCOM voltage is slowed down.
2. The VCOM voltage regulating circuit of an LCD panel, as claimed in claim 1, wherein the current accumulation buffer circuit further comprises a second capacitor C2, one end of the second capacitor C2 is connected to the connection point of the first resistor R1 and the second resistor R2, and the other end of the second capacitor C2 is connected to ground.
3. The VCOM voltage regulating circuit of LCD display screen of claim 1, wherein the voltage division control circuit further comprises a third resistor R3 and a fourth resistor R4; the output end of the PWM square wave control unit is connected with the base electrode through a third resistor R3, one end of a third resistor R3 is connected with the base electrode, the other end of the third resistor R3 is connected with the output end of the PWM square wave control unit, one end of a fourth resistor R4 is connected with a connection point of the third resistor R3 and the base electrode, and the other end of the fourth resistor R4 is grounded.
4. The VCOM voltage regulating circuit of an LCD panel according to claim 1, wherein the voltage output unit generates a DC voltage using a DC-DC power supply chip.
5. The VCOM voltage regulating circuit for an LCD panel according to any one of claims 1 to 4, wherein the transistor Q is an NPN transistor.
6. The VCOM voltage regulating circuit of an LCD display screen according to any one of claims 1 to 4, wherein the PWM square wave control unit is an MCU chip.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201922037560.5U CN210429272U (en) | 2019-11-22 | 2019-11-22 | VCOM voltage regulating circuit of LCD display screen |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201922037560.5U CN210429272U (en) | 2019-11-22 | 2019-11-22 | VCOM voltage regulating circuit of LCD display screen |
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| CN210429272U true CN210429272U (en) | 2020-04-28 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113890336A (en) * | 2021-12-07 | 2022-01-04 | 深圳易加油信息科技有限公司 | Voltage regulation control circuit, system and method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113890336A (en) * | 2021-12-07 | 2022-01-04 | 深圳易加油信息科技有限公司 | Voltage regulation control circuit, system and method |
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