CN210380330U - Circuit for improving battery use efficiency - Google Patents
Circuit for improving battery use efficiency Download PDFInfo
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- CN210380330U CN210380330U CN201921598153.5U CN201921598153U CN210380330U CN 210380330 U CN210380330 U CN 210380330U CN 201921598153 U CN201921598153 U CN 201921598153U CN 210380330 U CN210380330 U CN 210380330U
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Abstract
The utility model discloses an improve circuit of battery availability factor, including a battery, control chip U1, MOS pipe Q2, diode D1 and output, the anodal third pin that is connected to main control chip U1 through a resistance R7 of battery, the positive pole of battery is still connected with diode D1 ' S positive pole through an inductance L1, diode D1 ' S negative pole is connected to the output, main control chip U1 ' S first pin is connected to MOS pipe Q2 ' S G utmost point through a resistance R8, MOS pipe Q2 ' S D utmost point is connected to diode D1 ' S positive pole, MOS pipe Q2 ' S S utmost point ground connection, main control chip U1 ' S sixth pin ground connection, main control chip U1 ' S sixth pin is connected with the fifth pin through resistance R6, main control chip U1 ' S fifth pin is connected with diode D1 ' S negative pole through resistance R5. The utility model discloses a high frequency efficient PWM control chip control MOS pipe is closed and turn-offs, charges and discharges the inductance to improve output voltage.
Description
Technical Field
The utility model relates to a power management technical field, in particular to improve circuit of battery availability factor.
Background
At present, lithium batteries are widely applied in various occasions, but with the use of the batteries, the voltage of the batteries is reduced, the reduction of the voltage means the reduction of output power, so that the power amplifier is distorted early, and the working performance of the device is influenced.
SUMMERY OF THE UTILITY MODEL
The utility model discloses the technical problem that will solve is: the utility model provides an improve circuit of battery availability factor, through high frequency efficient PWM control chip, control MOS pipe closure and shutoff, charge and discharge the inductance to improve output voltage, compare through inside and the voltage that the outside feedback is returned, control PWM output signal's duty cycle, thereby control output voltage's stability.
The utility model provides a technical scheme that above-mentioned problem adopted does: a circuit for improving the service efficiency of a battery comprises the battery, a control chip U1, a MOS tube Q2, a diode D1 and an output end, wherein the anode of the battery is connected to a third pin of a main control chip U1 through a resistor R7, the anode of the battery is further connected with the anode of the diode D1 through an inductor L1, the cathode of the diode D1 is connected to the output end, the first pin of the main control chip U1 is connected to the G pole of the MOS tube Q2 through a resistor R8, the D pole of the MOS tube Q2 is connected to the anode of the diode D1, the S pole of the MOS tube Q2 is grounded, the sixth pin of the main control chip U1 is grounded, the sixth pin of the main control chip U1 is connected with the fifth pin through a resistor R6, and the fifth pin of the main control chip U1 is connected with the cathode of the diode D1 through a resistor R5.
Preferably, the second pin of the main control chip U1 is grounded through a capacitor C5, the eighth pin of the main control chip U1 is grounded through a capacitor C12, the seventh pin of the main control chip U1 is grounded through a resistor R1, and the seventh pin of the main control chip U1 is also grounded through a capacitor C6. Thus, the protection time is set by the capacitor C5 and the capacitor C12, and the resistor R1 and the capacitor C6 control the working frequency RT network to generate oscillation.
Preferably, a capacitor C3 is connected between the positive electrode and the negative electrode of the battery, a capacitor C1 is connected in parallel at two ends of the capacitor C3, and a capacitor C8 is connected in parallel at two ends of the capacitor C1. Thus, the output voltage of the battery is filtered through the capacitor C3, the capacitor C1 and the capacitor C8.
Preferably, the output terminal is grounded through a capacitor C2, a capacitor C9 is connected in parallel to two ends of the capacitor C2, and a capacitor C4 is connected in parallel to two ends of the capacitor C9. Thus, the output voltage of the output terminal is stored by the capacitor C2, the capacitor C9 and the capacitor C4.
Preferably, the third pin of the main control chip U1 is grounded through a diode Z2, and a capacitor C7 is connected in parallel to two ends of the diode Z2. Therefore, the main control chip is prevented from being broken down by large current, and the main control chip is protected.
Preferably, the intelligent electronic device further comprises a standby circuit, wherein the standby circuit comprises a temperature sensor, a transistor Q1, a transistor Q3 and a diode Z1, the temperature sensor is connected with the b pole of the transistor Q3, the e pole of the transistor Q3 is grounded, the positive pole of the battery is connected with the C pole of the transistor Q3 through a resistor R4, a resistor R3 is connected between the C pole and the e pole of the transistor Q3, two ends of the resistor R3 are connected with a capacitor C10 in parallel, the C pole of the transistor Q3 is connected with the negative pole of the diode Z1, the positive pole of the diode Z1 is connected with the b pole of the transistor Q1, the e pole of the transistor Q1 is grounded, and the C pole of the transistor Q1 is connected with the fourth pin of the main control chip U1 through the resistor R2. Therefore, the temperature monitoring device has a monitoring function on the external temperature, and when the temperature is too high, the main control chip does not work, so that the chip is protected and prevented from being damaged.
Compared with the prior art, the utility model has the advantages of: the MOS tube is controlled to be closed and turned off through the high-frequency and high-efficiency PWM main control chip, and the inductor is charged and discharged, so that the output voltage is improved; the duty ratio of the output signal of the main control chip is controlled by comparing the voltage fed back from the inside and the outside, so that the stability of the output voltage is controlled; the environment temperature is monitored, and when the temperature is too high, the main control chip is automatically cut off, so that the main control chip does not work.
Drawings
Fig. 1 is a circuit diagram of the present invention for improving the efficiency of battery usage.
Detailed Description
Embodiments of the present invention are further described below with reference to the accompanying drawings.
As shown in fig. 1, the present embodiment relates to a circuit for improving battery usage efficiency, which includes a battery, a control chip U1, a MOS transistor Q2, a diode D1 and an output terminal, wherein an anode of the battery is connected to a third pin of a main control chip U1 through a resistor R7, the anode of the battery is further connected to an anode of a diode D1 through an inductor L1, a cathode of the diode D1 is connected to the output terminal, a first pin of the main control chip U1 is connected to a G pole of the MOS transistor Q2 through a resistor R8, a D pole of the MOS transistor Q2 is connected to the anode of the diode D1, an S pole of the MOS transistor Q2 is grounded, and a sixth pin of the main control chip U1 is grounded. The output end is grounded through a capacitor C2, a capacitor C9 is connected in parallel with two ends of the capacitor C2, and a capacitor C4 is connected in parallel with two ends of the capacitor C9.
Through setting up main control chip U1 and MOS pipe Q2 additional, control the switching on and turn off of MOS pipe Q2 through main control chip U1, and then charge and discharge inductance L1 to improve the output voltage of output. In this embodiment, D1 is a rectifying diode, and the main control chip U1 may adopt a high-frequency and high-efficiency PWM control chip FP 5139.
Specifically speaking: when the MOS transistor Q2 is turned on, it is equivalent to the MOS transistor Q2 short-circuiting to ground, and the current generated thereby charges the inductor L1. When the MOS transistor Q2 is turned off, the current generated by charging on the inductor L1 will continue to flow through the diode D1 to the output terminal, charging the output capacitor. The output capacitance includes a capacitance C2, a capacitance C4, and a capacitance C9.
In this embodiment, the sixth pin of the main control chip U1 is connected to the fifth pin through a resistor R6, and the fifth pin of the main control chip U1 is connected to the cathode of the diode D1 through a resistor R5. The voltage fed back from the inside and the outside is added for comparison, and the duty ratio of the output signal of the main control chip U1 is controlled, so that the stability of the output voltage is controlled.
Specifically speaking: when the output voltage Vo of the output end is reduced, the duty ratio of the output signal D of the main control chip U1 is increased, the charging time of the inductor L1 is increased, and therefore the output voltage Vo is increased. When the output voltage Vo is increased, the duty ratio of the output signal D of the main control chip U1 is decreased, and the charging time of the inductor L1 is decreased, so that the output voltage Vo is decreased.
The second pin of the main control chip U1 is grounded through a capacitor C5, the eighth pin of the main control chip U1 is grounded through a capacitor C12, the seventh pin of the main control chip U1 is grounded through a resistor R1, and the seventh pin of the main control chip U1 is also grounded through a capacitor C6. The protection time is set through the capacitor C5 and the capacitor C12, and the resistor R1 and the capacitor C6 control the working frequency RT network, so that oscillation is mainly generated to enable the main control chip U1 to work.
In this embodiment, a capacitor C3 is connected between the positive electrode and the negative electrode of the battery, a capacitor C1 is connected in parallel to two ends of the capacitor C3, and a capacitor C8 is connected in parallel to two ends of the capacitor C1. The input voltage signal of the battery is stabilized by arranging a capacitor C1, a capacitor C3 and a capacitor C8 to perform filtering on the input voltage of the battery.
In this embodiment, a power supply circuit is further included, and includes a diode Z2 and a capacitor C7. The third pin of the main control chip U1 is connected to the cathode of the diode Z2, the anode of the diode Z2 is grounded, and two ends of the diode Z2 are connected in parallel with a capacitor C7. The design prevents large current from breaking through the main control chip U1, and plays a role in protecting the main control chip U1.
The intelligent electronic control system further comprises a shutdown wait circuit, the shutdown wait circuit comprises a temperature sensor, a triode Q1, a triode Q3 and a diode Z1, the temperature sensor is connected with the b pole of the triode Q3, the e pole of the triode Q3 is grounded, the positive pole of a battery is connected with the C pole of the triode Q3 through a resistor R4, a resistor R3 is connected between the C pole and the e pole of the triode Q3, two ends of the resistor R3 are connected with a capacitor C10 in parallel, the C pole of the triode Q3 is connected with the negative pole of the diode Z1, the positive pole of the diode Z1 is connected with the b pole of the triode Q1, the e pole of the triode Q1 is grounded, and the C pole of the master control triode Q1 is connected with the fourth pin of the master control chip U1 through a resistor R2. Therefore, the temperature monitoring device plays a role in monitoring the external temperature, and when the temperature is too high, the main control chip U1 does not work, so that the chip is protected and prevented from being damaged.
The utility model has the advantages that: the MOS tube is controlled to be closed and turned off through the high-frequency and high-efficiency PWM main control chip, and the inductor is charged and discharged, so that the output voltage is improved; the duty ratio of the output signal of the main control chip is controlled by comparing the voltage fed back from the inside and the outside, so that the stability of the output voltage is controlled; the environment temperature is monitored, and when the temperature is too high, the main control chip is automatically cut off, so that the main control chip does not work.
While the foregoing description shows and describes several preferred embodiments of the invention, it is to be understood, as noted above, that the invention is not limited to the forms disclosed herein, but is not intended to be exhaustive or to exclude other embodiments and may be used in various other combinations, modifications, and environments and is capable of changes within the scope of the inventive concept as expressed herein, commensurate with the above teachings, or the skill or knowledge of the relevant art. But that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the invention, which is to be limited only by the claims appended hereto.
Claims (6)
1. A circuit for improving the service efficiency of a battery is characterized in that: the battery comprises a battery, a control chip U1, a MOS tube Q2, a diode D1 and an output end, wherein the anode of the battery is connected to a third pin of a main control chip U1 through a resistor R7, the anode of the battery is also connected with the anode of the diode D1 through an inductor L1, the cathode of the diode D1 is connected to the output end, a first pin of the main control chip U1 is connected to the G pole of the MOS tube Q2 through a resistor R8, the D pole of the MOS tube Q2 is connected to the anode of the diode D1, the S pole of the MOS tube Q2 is grounded, a sixth pin of the main control chip U1 is grounded, a sixth pin of the main control chip U1 is connected with a fifth pin through a resistor R6, and the fifth pin of the main control chip U1 is connected with the cathode of the diode D1 through a resistor R5.
2. The circuit of claim 1, wherein the circuit further comprises: the second pin of the main control chip U1 is grounded through a capacitor C5, the eighth pin of the main control chip U1 is grounded through a capacitor C12, the seventh pin of the main control chip U1 is grounded through a resistor R1, and the seventh pin of the main control chip U1 is also grounded through a capacitor C6.
3. The circuit of claim 2, wherein the circuit further comprises: a capacitor C3 is connected between the positive electrode and the negative electrode of the battery, a capacitor C1 is connected in parallel at two ends of the capacitor C3, and a capacitor C8 is connected in parallel at two ends of the capacitor C1.
4. The circuit of claim 2, wherein the circuit further comprises: the output end is grounded through a capacitor C2, a capacitor C9 is connected in parallel with two ends of the capacitor C2, and a capacitor C4 is connected in parallel with two ends of the capacitor C9.
5. The circuit of claim 2, wherein the circuit further comprises: the third pin of the main control chip U1 is grounded through a diode Z2, and a capacitor C7 is connected in parallel to two ends of the diode Z2.
6. The circuit of claim 2, wherein the circuit further comprises: the intelligent electronic control system further comprises a shutdown wait circuit, the shutdown wait circuit comprises a temperature sensor, a triode Q1, a triode Q3 and a diode Z1, the temperature sensor is connected with the b pole of the triode Q3, the e pole of the triode Q3 is grounded, the positive pole of a battery is connected with the C pole of the triode Q3 through a resistor R4, a resistor R3 is connected between the C pole and the e pole of the triode Q3, two ends of the resistor R3 are connected with a capacitor C10 in parallel, the C pole of the triode Q3 is connected with the negative pole of the diode Z1, the positive pole of the diode Z1 is connected with the b pole of the triode Q1, the e pole of the triode Q1 is grounded, and the C pole of the master control triode Q1 is connected with the fourth pin of the master control chip U1 through a resistor R2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921598153.5U CN210380330U (en) | 2019-09-24 | 2019-09-24 | Circuit for improving battery use efficiency |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921598153.5U CN210380330U (en) | 2019-09-24 | 2019-09-24 | Circuit for improving battery use efficiency |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210380330U true CN210380330U (en) | 2020-04-21 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201921598153.5U Active CN210380330U (en) | 2019-09-24 | 2019-09-24 | Circuit for improving battery use efficiency |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN210380330U (en) |
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2019
- 2019-09-24 CN CN201921598153.5U patent/CN210380330U/en active Active
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