CN210325154U - Receiving card and display control card assembly - Google Patents

Receiving card and display control card assembly Download PDF

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Publication number
CN210325154U
CN210325154U CN201921224370.8U CN201921224370U CN210325154U CN 210325154 U CN210325154 U CN 210325154U CN 201921224370 U CN201921224370 U CN 201921224370U CN 210325154 U CN210325154 U CN 210325154U
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differential signal
card
electrically connected
receiving
physical layer
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CN201921224370.8U
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王雪
梁伟
韦桂锋
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Xian Novastar Electronic Technology Co Ltd
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Xian Novastar Electronic Technology Co Ltd
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Abstract

The embodiment of the utility model provides a receive the card and adopt the display control card subassembly of receiving the card. The receiving card includes, for example: the circuit board comprises a circuit board, and a programmable logic device, a memory device, a plug assembly, a direct current power supply circuit and a plurality of target type interfaces which are arranged on the circuit board, wherein each target type interface comprises a power supply signal pin group and a plurality of pairs of differential signal pins; wherein the memory device and the connector assembly are electrically connected to the programmable logic device; and the target type interfaces are respectively electrically connected with the SerDes channels configured by the programmable logic device and are also electrically connected with the direct-current power supply circuit. The embodiment of the utility model provides an adopt the target type for example USB3.0 interface and connect to the SerDes passageway of programmable logic device, can promote the transmission rate of whole receiving card by this.

Description

Receiving card and display control card assembly
Technical Field
The utility model relates to a LED shows technical field, especially relates to a receiving card and a display control board subassembly.
Background
Besides the advantages of high brightness and wide color gamut, the LED display screen has the advantages of being capable of being flexibly spliced into a large display screen. The LED display screen is formed by splicing one display box body which is provided with receiving cards, and the receiving cards arranged on the display box body are connected through a network cable and used for transmitting image data signals. The LED display screen industry has been developed for many years, but the products generally stay at the transmission rate of 1Gbps for the current market; with the development of the LED display screen towards the small-distance display screen, the transmission rate of 1Gbps is obviously insufficient.
SUMMERY OF THE UTILITY MODEL
In order to overcome the defects and shortcomings in the related art, the embodiment of the utility model provides a receiving card and a display control card assembly.
On the one hand, the embodiment of the utility model provides a receiving card that provides, include: the circuit board comprises a circuit board, and a programmable logic device, a memory device, a plug assembly, a direct current power supply circuit and a plurality of target type interfaces which are arranged on the circuit board, wherein each target type interface comprises a power supply signal pin group and a plurality of pairs of differential signal pins; wherein the memory device and the connector assembly are electrically connected to the programmable logic device; and the target type interfaces are respectively electrically connected with the SerDes channels configured by the programmable logic device and are also electrically connected with the direct-current power supply circuit.
In the embodiment, a target type interface comprising a power signal pin group and a plurality of pairs of differential signal pins, such as a USB3.0 interface, is adopted and connected to a SerDes channel of a programmable logic device, and the SerDes channel is a high-speed serial data channel, so that the transmission rate of the whole receiving card can be increased; furthermore, the target type interface can also transmit power signals outwards, so that the connection of the receiving card and other devices can be simplified.
In one embodiment of the present invention, each of the SerDes channels includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is a data transmission differential signal pair and the other pair of differential signal lines is a data reception differential signal pair.
In an embodiment of the present invention, the plurality of target type interfaces are two USB3.0 interfaces, and each of the USB3.0 interfaces is electrically connected to one of the SerDes channels configured by the programmable logic device; the receiving card further includes: a first physical layer transceiver, a second physical layer transceiver, a first ethernet interface and a second ethernet interface, wherein the first ethernet interface is electrically connected to a second SerDes channel of the programmable logic device via the first physical layer transceiver, and the second ethernet interface is electrically connected to another second SerDes channel of the programmable logic device via the second physical layer transceiver; wherein each of the second SerDes lanes includes two pairs of second differential signal lines, and one of the two pairs of second differential signal lines is a data-transmitting differential signal line pair and the other pair of second differential signal lines is a data-receiving differential signal line pair.
In one embodiment of the invention, each of the first physical layer transceiver and the second physical layer transceiver is a 5GBase-T or 10GBase-T type ethernet physical layer transceiver.
In an embodiment of the present invention, the first ethernet interface is an RJ45 gateway of an integrated network; or the first Ethernet interface comprises a separated network transformer and an RJ45 network port, and the network transformer is connected between the first physical layer transceiver and the RJ45 network port.
In an embodiment of the present invention, the plurality of target type interfaces are four USB3.0 interfaces, and each of the USB3.0 interfaces is electrically connected to one of the SerDes channels configured by the programmable logic device.
In an embodiment of the present invention, the connector assembly includes a display data single-ended signal pin group, a display control signal single-ended signal pin group, and a display data differential signal pin group; the programmable logic device is electrically connected with the display data single-ended signal pin group and the display data differential signal pin group, and the display data differential signal pin group is an LVDS differential signal pin group; and the programmable logic device is electrically connected with the display control signal single-ended signal pin group.
In another aspect, an embodiment of the present invention provides a display control card assembly, including: the receiving card and at least one daughter card. Wherein each daughter card is connected to one of the target type interfaces of the receiving card through a cable for transmitting data signals and power signals.
In an embodiment of the present invention, the at least one daughter card includes a wireless transmission daughter card, and the wireless transmission daughter card includes: the wireless transmission device comprises a second circuit board, and a direct current-direct current circuit, a wireless transmission chip and a wireless receiving chip which are arranged on the second circuit board; a pad group is arranged on the second circuit board and is electrically connected with one end of the cable; the direct current-to-direct current circuit is electrically connected with the pad group, the wireless transmitting chip and the wireless receiving chip and is used for acquiring a power supply signal from the pad group and providing working voltage for the wireless transmitting chip and the wireless receiving chip; the wireless transmitting chip and the wireless receiving chip are arranged at intervals and are electrically connected with the pad group through a third SerDes channel, the third SerDes channel comprises two pairs of third differential signal lines, one pair of the third differential signal lines in the two pairs of the third differential signal lines is used as a data transmitting differential signal line pair, and the other pair of the third differential signal lines is used as a data receiving differential signal line pair; and the working frequency of the wireless transmitting chip and the wireless receiving chip is positioned in a millimeter wave frequency band.
In an embodiment of the present invention, the at least one daughter card includes a wired network transmission daughter card, and the wired network transmission daughter card includes: the second type interface, the direct current-to-direct current circuit, the third physical layer transceiver and the third Ethernet interface are arranged on the third circuit board; the second type interface and the target type interface are the same type interface and are connected with one end of the cable; the direct current-to-direct current circuit is electrically connected with the second type interface and the third physical layer transceiver and is used for acquiring a power supply signal from the second type interface and providing working voltage for the third physical layer transceiver; the third physical layer transceiver is electrically connected to the second type interface through a fourth SerDes channel, and the third Ethernet interface is electrically connected to the third physical layer transceiver; the fourth SerDes lane includes two pairs of fourth differential signal lines, and one of the two pairs of fourth differential signal lines is used as a data-transmitting differential signal line pair and the other pair of fourth differential signal lines is used as a data-receiving differential signal line pair.
To sum up, the embodiment of the present invention provides an above-mentioned technical scheme can have following one or more beneficial effect: the receiving card adopts a target type interface comprising a power signal pin group and a plurality of pairs of differential signal pin groups, such as a USB3.0 interface, and the target type interface is connected to a SerDes channel of the programmable logic device, even the quantity and the function of differential signal lines in the SerDes channel are defined, and the SerDes channel is a high-speed serial data channel, so that the transmission rate of the whole receiving card can be improved. Furthermore, the target type interface can also transmit power signals outwards, so that the connection of the receiving card and other devices can be simplified. In addition, based on the interface flexibility of the receiving card, the structure diversification of the display control card assembly can be realized.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a receiving card according to an embodiment of the present invention.
Fig. 2 is another perspective view of the receiver card of fig. 1.
FIG. 3 is a pin functional diagram of the connector assembly of FIG. 1 receiving a card.
Fig. 4A is a schematic diagram of a pin layout of a portion of the programmable logic device shown in fig. 1.
Fig. 4B is a pin layout diagram of the physical layer transceiver shown in fig. 1.
Fig. 4C is a schematic diagram of the pin distribution of the USB3.0 interface shown in fig. 1.
FIG. 5 is a schematic diagram of a display control card assembly using the receiving card shown in FIG. 1.
Fig. 6 is a schematic structural diagram of the wireless transmission daughter card shown in fig. 5.
Fig. 7 is a schematic structural diagram of another receiving card according to an embodiment of the present invention.
FIG. 8 is a diagram of a display control card assembly using the receiving card of FIG. 7.
FIG. 9 is a schematic diagram of another display control card assembly using the receiver card of FIG. 7.
Fig. 10 is a schematic structural diagram of a daughter card of the wired network transmission shown in fig. 9.
FIG. 11 is a diagram of another display control card assembly using the receiving card of FIG. 7.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
Referring to fig. 1, 2 and 3, an embodiment of the present invention provides a receiving card 30, including: a circuit board 31, and a connector assembly 32, a programmable logic device 33, a memory device 34, physical layer transceivers 35a and 35b, ethernet interfaces 36a and 36b, USB3.0 interfaces 37a and 37b, and a dc power circuit 38, which are provided on the circuit board 31.
The connector assembly 32 is electrically connected to the programmable logic device 33, and is composed of two connectors 32a and 32b, which are provided in pairs and have the same Pin number, for example, where the connectors 32a and 32b are 120Pin high-contact connectors, respectively, but the embodiment of the present invention is not limited thereto. Furthermore, as can be seen from fig. 2, the connector assembly 32 is located on one side of the circuit board 31 (e.g., the bottom side of the circuit board 31), and the programmable logic device 33, the memory device 34, the physical layer transceivers 35a and 35b, the ethernet interfaces 36a and 36b, the USB3.0 interfaces 37a and 37b, and the dc power circuit 38 are located on the other side of the circuit board 31 (e.g., the top side of the circuit board 31); this arrangement facilitates the mating attachment of the receiving card 30 to a patch panel (not shown). In addition, as shown in fig. 3, the connector module 32 includes a display data single-ended signal pin group 321, a display control signal single-ended signal pin group 323, and a display data differential signal pin group 325, and the programmable logic device 33 is electrically connected to the display data single-ended signal pin group 321 and the display data differential signal pin group 325 for outputting display data such as RGB data in a manner of two selected from a single-ended signal and an LVDS (Low Voltage differential signaling); and the programmable logic device 33 is electrically connected to the single-ended signal pin set of the display control signal for outputting the display control signal such as a row decoding signal, an enable signal, a latch signal, a clock signal or even a row blanking signal with a single-ended signal; in other words, the display data single-ended signal pin group 321 and the display data differential signal pin group 325 are, for example, an RGB data single-ended signal pin group and an RGB data differential signal pin group, respectively, and even the display data differential signal pin group 325 is, for example, an LVDS differential signal pin group. In this way, the receiving card 30 can not only use single-ended signal transmission of RGB data, but also directly use differential signal transmission of LVDS when providing the LED module with display data. Compared with the traditional single-ended signal, the LVDS differential signal has the advantages that: (1) the anti-interference capability is strong, the interference noise is generally loaded on the two signal lines in an equivalent and simultaneous manner, and the difference value is 0, namely the noise does not influence the logic significance of the signal; (2) electromagnetic interference (EMI) can be effectively inhibited, and because the two wires are close to each other and have equal signal amplitude, the amplitudes of coupling electromagnetic fields between the two wires and the ground wire are also equal, and simultaneously the signal polarities of the two wires are opposite, the electromagnetic fields are mutually offset, and the EMI to the outside is also small.
The Programmable logic device 33 is, for example, an FPGA (Field Programmable Gate Array) device, as shown in fig. 4A, configured with four SerDes channels, that is, TX1_ N, TX1_ P, RX1_ N and RX1_ P, TX2_ N, TX2_ P, RX2_ N and RX2_ P, TX3_ N, TX3_ P, RX3_ N and RX3_ P, and TX4_ N, TX4_ P, RX4_ N and RX4_ P. The memory devices 34 are electrically connected to the programmable logic device 33, which is a volatile memory such as DDR4, DDR3, DDR2, LPDDR2, SDRAM, etc., and the number of used memory devices can be determined according to actual needs.
Ethernet interfaces 36a and 36b electrically connect the two SerDes channels configured by programmable logic device 33 through physical layer transceivers 35a and 35b, respectively. In this embodiment, each SerDes channel includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is used for data transmission (i.e., as a data transmission differential signal line pair) and the other pair of differential signal lines is used for data reception (i.e., as a data reception differential signal line pair). The physical layer transceivers 35a and 35b are, for example, ethernet physical layer transceivers of 10GBase-T or 5GBase-T type, which may use chips such as AQR111C, AQR114C, BCM54892, BCM54992 and BCM 54991; for example, as shown in fig. 4B, a single phy transceiver electrically connects four differential signal lines, such as TX2_ N, TX2_ P, RX2_ N and RX2_ P, of a SerDes channel of a programmable logic device. The present embodiment incorporates SerDes channels such that the transmission rate of a single Ethernet interface 36a/36b may be 10Gbps/5Gbps/2.5Gbps/1 Gbps. Furthermore, the ethernet interfaces 36a and 36b may be RJ45 ports of an integrated network, or RJ45 ports of a separate design, or RJ45 ports of a 2 × 1 integrated network.
The USB3.0 interfaces 37a and 37b are electrically connected to the plurality of SerDes channels configured in the programmable logic device 33, respectively, and the USB3.0 interfaces 37a and 37b are also electrically connected to the dc power circuit 38 for obtaining power signals to be transmitted to the outside. The USB3.0 interface 37a, 37b here is an interface having a plurality of pairs of high-speed differential signal pins and power signal pin groups, and therefore it may be replaced with another interface having a plurality of pairs of differential signal pins and power signal pin groups, such as a Mini HDMI interface. For example, as shown in fig. 4C, a single USB3.0 interface electrically connects four differential signal lines of a SerDes channel of a programmable logic device, such as TX1_ N, TX1_ P, RX1_ N and RX1_ P.
In light of the above, a display control card assembly using a wireless transmission daughter card 40 shown in fig. 5 is derived for two USB3.0 interfaces (e.g., Micro USB3.0 interface or other types of USB3.0 interfaces) of the receiving card 30. The main purpose of the wireless transmission solution shown in fig. 5 is to solve the problem that the industrial network cable is easy to be damaged and unstable when being frequently plugged and unplugged, and the cost of early installation and later maintenance is high. Meanwhile, with the development of the LED display screen industry, the demand of small-spacing LED display screens is more and more, and the design of front maintenance is more and more popular; aiming at the front maintenance scheme of the LED display screen, wireless transmission undoubtedly provides a very high-quality scheme, and the LED display screen is convenient to design and install and maintain on site.
Specifically, as shown in fig. 5, each USB3.0 interface 37a, 37b is connected to a wireless transport daughter card 40 via USB3.0 lines. The USB3.0 line herein is a cable capable of transmitting a data signal and a power signal at the same time. Further, as shown in fig. 6, the radio daughter card 40 includes: the wireless transmission device comprises a circuit board, and a direct current-direct current circuit 43, a wireless transmission chip 45a and a wireless reception chip 45b which are arranged on the circuit board. The circuit board is provided with a pad group 41, and the pad group 41 is electrically connected with one end of the USB3.0 line. The dc-dc conversion circuit 43 is electrically connected to the pad set 41, the wireless transmitting chip 45a and the wireless receiving chip 45b, and is configured to obtain a power signal from the pad set 41 and supply an operating voltage to the wireless transmitting chip 45a and the wireless receiving chip 45 b. The wireless transmitting chip 45a and the wireless receiving chip 45b are arranged at intervals and electrically connected with the pad group 41 through a SerDes channel; the SerDes lane includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is used for data transmission (i.e., as a data transmission differential signal line pair) and the other pair of differential signal lines is used for data reception (i.e., as a data reception differential signal line pair). Further, the operating frequencies of the wireless transmission chip 45a and the wireless reception chip 45b are located in the millimeter wave band. The millimeter wave band herein typically means a frequency range of 30GHz to 300GHz with a corresponding wavelength of 1 mm to 10 mm. The wireless transmitting chip 45a and the wireless receiving chip 45b working in the millimeter wave band in this embodiment are very suitable for the application of the display box in the LED display screen, because the LED display screen is typically formed by splicing a plurality of display boxes, when the wireless transmission daughter card 40 is installed in each display box, the first consideration is how to avoid the wireless signal crosstalk between two wireless transmission daughter cards 40 that do not need to receive and transmit data in the same LED display screen, and the wireless transmitting chip 45a and the wireless receiving chip 45b in the wireless transmission daughter card 40 in this embodiment work in the millimeter wave band, compared with the wireless transmission modules such as the WiFi module and the bluetooth module in the prior art, the possibility of wireless signal crosstalk can be greatly reduced. In addition, based on the performance of the wireless chip and the availability of the frequency band, the working frequency of the wireless transmitting chip 45a and the wireless receiving chip 45b is preferably in the frequency range of 57GHZ-67GHZ or 71GHZ-87GHZ, such as 60GHZ or 80 GHZ.
Referring to fig. 7, in the receiver card 50 of the present embodiment, the ethernet interface + physical layer transceiver of the receiver card 30 shown in fig. 1 is removed, and all SerDes channels of the programmable logic device are connected to interfaces such as USB 3.0. The design not only can reduce the size of the receiving card, but also can lead the design scheme of the LED display screen control system adopting the receiving card to become diversified.
Specifically, as shown in fig. 7, the receiving card 50 includes: a circuit board 51 and a connector assembly 52, a programmable logic device 53, a memory device 54, a plurality of, for example, four USB3.0 interfaces 57a and 57b and 59a and 59b, and a dc power supply circuit 58 provided on the circuit board 51. The structures and functions of the connector assembly 52, the programmable logic device 53 and the memory device 54 are similar to those of the connector assembly 32, the programmable logic device 33 and the memory device 34 shown in fig. 1, and thus are not described herein again.
Furthermore, the USB3.0 interfaces 57a, 57b, 59a, and 59b are electrically connected to the plurality of SerDes channels configured by the programmable logic device 53, respectively, and the USB3.0 interfaces 57a, 57b, 59a, and 59b are also electrically connected to the dc power circuit 58 for obtaining the power signals to be transmitted to the outside. The USB3.0 interfaces 57a, 57b, 59a, 59b herein are interfaces having a plurality of pairs of high-speed differential signal pins and power signal pins, and thus may be replaced with other interfaces having a plurality of pairs of differential signal pins and power signal pin groups, such as Mini HDMI interfaces.
In addition, for the receiving card 50 provided with four USB3.0 interfaces 57a, 57b, 59a, 59b in fig. 7, the determination of the transmission rate and the signal transmission mode can be directly performed on the daughter card, because each USB3.0 interface can have multiple connection schemes, and can be used for connecting to a wireless transmission daughter card or connecting to a wired network transmission daughter card, and the multiple connection schemes of the four USB3.0 interfaces 57a, 57b, 59a, 59b of the receiving card 50 are listed below with reference to fig. 7 to 10.
Specifically, as shown in fig. 8, four USB3.0 interfaces 57a, 57b, 59a, and 59b may be connected to the wireless daughter card 40 through USB3.0 lines, respectively, so as to implement wireless signal transmission.
Alternatively, as shown in fig. 9, four USB3.0 interfaces 57a, 57b, 59a, 59b may be connected to the wired network transport daughter card 60 through USB3.0 lines, respectively. As for the wired network transmission daughter card 60, as shown in fig. 10, it includes: the USB interface circuit comprises a circuit board, and a USB3.0 interface 61, a direct current-to-direct current circuit 63, a physical layer transceiver 65 and an Ethernet interface 67 which are arranged on the circuit board. The USB3.0 interface 61 is connected to one end of a USB3.0 line, which is an interface having a plurality of pairs of high-speed differential signal pins and power signal pins. The dc-dc circuit 63 electrically connects the USB3.0 interface 61 and the physical layer transceiver 65, and is configured to obtain a power signal from the USB3.0 interface 61 and provide an operating voltage to the physical layer transceiver 65. The physical layer transceiver 65 is electrically connected to the USB3.0 interface 61 through a SerDes channel, and the SerDes channel here includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is used for data transmission (i.e., as a data transmission differential signal line pair) and the other pair of differential signal lines is used for data reception (i.e., as a data reception differential signal line pair). Furthermore, the PHY transceiver 65 may be selected from 1GBase-T/2.5GBase-T/5GBase-T/10GBase-T Ethernet PHY transceivers, etc. In addition, the ethernet interface 67 is electrically connected to the physical layer transceiver 65, which is, for example, an RJ45 network port integrated into a network transformer, or a RJ45 network port separated design.
Alternatively, as shown in fig. 11, four USB3.0 interfaces 57a, 57b, 59a, 59b may be connected to two wireless transmission daughter cards 40 and two wired network transmission daughter cards 60, respectively.
The above lists only the structures of three display control card assemblies using the receiving card 50, but the embodiment of the present invention is not limited thereto; because of the flexibility of the receiving card 50, it can be used in a variety of scenarios, and therefore the design of the daughter card can be changed from scenario to scenario.
To sum up, the utility model discloses receive card and display control card subassembly can have following one or more beneficial effect: (i) for the transmission rate solution, the problem of insufficient gigabit bandwidth can be effectively solved, the method is more suitable for small-distance application, the bandwidth can be 10G/5G/2.5G/1G or even other bandwidths, the flexibility is higher, and the applicability is stronger; (ii) for the signal transmission mode solution, the problem that a traditional transmission mode network cable is easy to damage due to frequent plugging and unplugging is solved, different signal transmission modes can be selected according to different application scenes, the diversification and actual effective applicability of the LED display screen control system are greatly improved, and the workload of installation and maintenance is greatly reduced; and (iii) the LVDS differential signals are added while the conventional RGB single-ended signals are kept, so that the transmission anti-interference capability can be enhanced, the electromagnetic interference (EMI) can be effectively inhibited, and the EMC can be improved.
In addition, it should be understood that the foregoing embodiments are merely exemplary of the present invention, and the technical solutions of the embodiments can be arbitrarily combined and collocated without conflict between technical features and structures, and not departing from the purpose of the present invention.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.

Claims (10)

1. A receiving card, comprising: the circuit board comprises a circuit board, and a programmable logic device, a memory device, a plug assembly, a direct current power supply circuit and a plurality of target type interfaces which are arranged on the circuit board, wherein each target type interface comprises a power supply signal pin group and a plurality of pairs of differential signal pins; wherein the content of the first and second substances,
the storage device and the plug assembly are electrically connected with the programmable logic device; and
the target type interfaces are respectively and electrically connected with the SerDes channels configured by the programmable logic device and are also electrically connected with the direct-current power supply circuit.
2. The receiving card of claim 1, wherein each of the SerDes lanes includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is a data transmit differential signal pair and the other pair of differential signal lines is a data receive differential signal pair.
3. The receiving card of claim 1, wherein the plurality of target type interfaces are two USB3.0 interfaces, and each of the USB3.0 interfaces electrically connects one of the SerDes channels configured by the programmable logic device; the receiving card further includes: a first physical layer transceiver, a second physical layer transceiver, a first ethernet interface and a second ethernet interface, wherein the first ethernet interface is electrically connected to a second SerDes channel of the programmable logic device via the first physical layer transceiver, and the second ethernet interface is electrically connected to another second SerDes channel of the programmable logic device via the second physical layer transceiver; wherein each of the second SerDes lanes includes two pairs of second differential signal lines, and one of the two pairs of second differential signal lines is a data-transmitting differential signal line pair and the other pair of second differential signal lines is a data-receiving differential signal line pair.
4. A receiving card as recited in claim 3, wherein each of the first physical layer transceiver and the second physical layer transceiver is a 5GBase-T or 10GBase-T type ethernet physical layer transceiver.
5. A receiving card as recited in claim 3 wherein said first ethernet interface is an integrated network-variant RJ45 port; or the first Ethernet interface comprises a separated network transformer and an RJ45 network port, and the network transformer is connected between the first physical layer transceiver and the RJ45 network port.
6. The receiving card of claim 1, wherein the plurality of target type interfaces are four USB3.0 interfaces, and each of the USB3.0 interfaces electrically connects one of the SerDes lanes of the programmable logic device configuration.
7. The receiver card of claim 1, wherein the connector assembly comprises a set of display data single-ended signal pins, a set of display control signal single-ended signal pins, and a set of display data differential signal pins; the programmable logic device is electrically connected with the display data single-ended signal pin group and the display data differential signal pin group, and the display data differential signal pin group is an LVDS differential signal pin group; and the programmable logic device is electrically connected with the display control signal single-ended signal pin group.
8. A display control card assembly, comprising: a receiving card as claimed in any one of claims 1 to 7, and at least one daughter card;
wherein each daughter card is connected to one of the target type interfaces of the receiving card through a cable for transmitting data signals and power signals.
9. The display control card assembly of claim 8, wherein the at least one daughter card comprises a wireless transmission daughter card, and the wireless transmission daughter card comprises: the wireless transmission device comprises a second circuit board, and a direct current-direct current circuit, a wireless transmission chip and a wireless receiving chip which are arranged on the second circuit board; a pad group is arranged on the second circuit board and is electrically connected with one end of the cable; the direct current-to-direct current circuit is electrically connected with the pad group, the wireless transmitting chip and the wireless receiving chip and is used for acquiring a power supply signal from the pad group and providing working voltage for the wireless transmitting chip and the wireless receiving chip; the wireless transmitting chip and the wireless receiving chip are arranged at intervals and are electrically connected with the pad group through a third SerDes channel, the third SerDes channel comprises two pairs of third differential signal lines, one pair of the third differential signal lines in the two pairs of the third differential signal lines is used as a data transmitting differential signal line pair, and the other pair of the third differential signal lines is used as a data receiving differential signal line pair; and the working frequency of the wireless transmitting chip and the wireless receiving chip is positioned in a millimeter wave frequency band.
10. The display control card assembly of claim 8 or 9, wherein the at least one daughter card comprises a wired network transport daughter card, and the wired network transport daughter card comprises: the second type interface, the direct current-to-direct current circuit, the third physical layer transceiver and the third Ethernet interface are arranged on the third circuit board; the second type interface and the target type interface are the same type interface and are connected with one end of the cable; the direct current-to-direct current circuit is electrically connected with the second type interface and the third physical layer transceiver and is used for acquiring a power supply signal from the second type interface and providing working voltage for the third physical layer transceiver; the third physical layer transceiver is electrically connected to the second type interface through a fourth SerDes channel, and the third Ethernet interface is electrically connected to the third physical layer transceiver; the fourth SerDes lane includes two pairs of fourth differential signal lines, and one of the two pairs of fourth differential signal lines is used as a data-transmitting differential signal line pair and the other pair of fourth differential signal lines is used as a data-receiving differential signal line pair.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112673413A (en) * 2019-07-31 2021-04-16 西安诺瓦星云科技股份有限公司 Receiving card and display control card assembly

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112673413A (en) * 2019-07-31 2021-04-16 西安诺瓦星云科技股份有限公司 Receiving card and display control card assembly

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