CN210199748U - Cable network transmission daughter card and display control card assembly - Google Patents
Cable network transmission daughter card and display control card assembly Download PDFInfo
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- CN210199748U CN210199748U CN201921223564.6U CN201921223564U CN210199748U CN 210199748 U CN210199748 U CN 210199748U CN 201921223564 U CN201921223564 U CN 201921223564U CN 210199748 U CN210199748 U CN 210199748U
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Abstract
The embodiment of the utility model provides a wired network transmission daughter card and relevant display control card subassembly are related to. The wired network transmission daughter card comprises: the device comprises a circuit board, and a target type interface, a direct current-to-direct current circuit, a physical layer transceiver and an Ethernet interface which are arranged on the circuit board, wherein the target type interface comprises a power signal pin group and a plurality of pairs of differential signal pins; the direct current-to-direct current circuit is electrically connected with the target type interface and the physical layer transceiver and is used for acquiring a power supply signal from the target type interface and providing working voltage for the physical layer transceiver; and the physical layer transceiver is electrically connected with the target type interface through the SerDes channel, and the Ethernet interface is electrically connected with the physical layer transceiver. The embodiment of the utility model provides a pass through the SerDes passageway with the physical layer transceiver and be connected to target type interface such as USB3.0 interface, it can further be connected to the receiving card in order to provide wired network transmission, can promote the transmission rate of whole receiving card by this.
Description
Technical Field
The utility model relates to a LED shows technical field, especially relates to a wired network transmission daughter card and a display control card subassembly.
Background
Besides the advantages of high brightness and wide color gamut, the LED display screen has the advantages of being capable of being flexibly spliced into a large display screen. The LED display screen is formed by splicing one display box body which is provided with receiving cards, and the receiving cards arranged on the display box body are connected through a network cable and used for transmitting image data signals. The LED display screen industry has been developed for many years, but the products generally stay at the transmission rate of 1Gbps for the current market; with the development of the LED display screen towards the small-distance display screen, the transmission rate of 1Gbps is obviously insufficient.
SUMMERY OF THE UTILITY MODEL
To overcome the deficiencies and drawbacks of the related art, embodiments of the present invention provide a wired network transmission daughter card and a display control card assembly.
On the one hand, the embodiment of the utility model provides a wired network transmission daughter card, include: the device comprises a circuit board, and a target type interface, a direct current-to-direct current circuit, a physical layer transceiver and an Ethernet interface which are arranged on the circuit board, wherein the target type interface comprises a power signal pin group and a plurality of pairs of differential signal pins; the direct current-to-direct current circuit is electrically connected with the target type interface and the physical layer transceiver and is used for acquiring a power supply signal from the target type interface and providing working voltage for the physical layer transceiver; and the physical layer transceiver is electrically connected with the target type interface through a SerDes channel, and the Ethernet interface is electrically connected with the physical layer transceiver.
The physical layer transceiver is connected to a target type interface such as a USB3.0 interface through a SerDes channel and is manufactured into a daughter card form, and the physical layer transceiver can be further connected to a receiving card to provide wired network transmission, so that the transmission rate of the whole receiving card can be improved.
In one embodiment of the present invention, the SerDes channel includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is a pair of data-transmitting differential signal lines and the other pair of differential signal lines is a pair of data-receiving differential signal lines.
In an embodiment of the present invention, the target type interface is a USB3.0 interface.
In an embodiment of the present invention, the target type interface is a Mini HDMI interface.
In one embodiment of the present invention, the physical layer transceiver is a 5GBase-T or 10GBase-T type ethernet physical layer transceiver.
In an embodiment of the present invention, the ethernet interface is an RJ45 network interface of an integrated network.
In one embodiment of the present invention, the ethernet interface includes a separate network transformer and an RJ45 port, and the network transformer is electrically connected between the physical layer transceiver and the RJ45 port.
In an embodiment of the present invention, the dc-dc converter circuit includes a power management chip.
On the other hand, the embodiment of the utility model provides a display control card subassembly, include: at least one of the foregoing wired network transmission daughter cards, and a receiving card. Wherein the receiving card comprises: the second type interfaces and the target type interfaces are the same type interfaces, the second type interfaces are respectively electrically connected with a plurality of second SerDes channels configured by the programmable logic device and are also electrically connected with the direct current power supply circuit, each second SerDes channel comprises two pairs of second differential signal lines, one pair of the second differential signal lines in the two pairs of the second differential signal lines is used as a data transmission differential signal pair, the other pair of the second differential signal lines is used as a data reception differential signal pair, and each wired network transmission cable is connected with one of the second type interfaces through a daughter card cable.
In an embodiment of the present invention, the receiving card further includes a plug assembly, and the plug assembly includes a display data single-ended signal pin group, a display control signal single-ended signal pin group, and a display data differential signal pin group; the programmable logic device is electrically connected with the display data single-ended signal pin group and the display data differential signal pin group, and the display data differential signal pin group is an LVDS differential signal pin group; and the programmable logic device is electrically connected with the display control signal single-ended signal pin group.
To sum up, the embodiment of the present invention provides an above-mentioned technical scheme can have following one or more beneficial effect: the physical layer transceiver is connected to a target type interface such as a USB3.0 interface through a SerDes channel and is made into a daughter card form, which can be further connected to a receiving card to provide wired network transmission, thereby improving the transmission rate of the whole receiving card. In addition, based on the interface flexibility of the receiving card, the structure diversification of the display control card assembly can be realized.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a receiving card according to an embodiment of the present invention.
Fig. 2 is another perspective view of the receiver card of fig. 1.
FIG. 3 is a pin functional diagram of the connector assembly of FIG. 1 receiving a card.
FIG. 4 is a schematic diagram of a display control card assembly using the receiving card shown in FIG. 1.
Fig. 5A is a schematic structural diagram of the cable network transmission daughter card shown in fig. 4.
FIG. 5B is a schematic diagram of the pin distribution of the USB3.0 interface shown in FIG. 5A.
Fig. 5C is a schematic diagram of a pin layout of the physical layer transceiver shown in fig. 5A.
FIG. 6 is a schematic diagram of another display control card assembly using the receiving card shown in FIG. 1.
Fig. 7 is a schematic structural diagram of the wireless transmission daughter card shown in fig. 6.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
Referring to fig. 1, 2 and 3, an embodiment of the present invention provides a receiving card 50, including: a circuit board 51, and a connector assembly 52, a programmable logic device 53, a memory device 54, USB3.0 interfaces 57a, 57b, 59a, and 59bb, and a dc power circuit 58 provided on the circuit board 51.
The connector assembly 52 is electrically connected to the programmable logic device 53, and is composed of two connectors 52a and 52b, which are provided in pairs and have the same Pin number, for example, where the connectors 52a and 52b are 120Pin high-contact connectors, respectively, but the embodiment of the present invention is not limited thereto. Furthermore, as can be seen from fig. 2, the connector assembly 52 is located on one side of the circuit board 51 (e.g., the bottom side of the circuit board 51), and the programmable logic device 53, the memory device 54, the USB3.0 interfaces 57a, 57b, 59a, and 59b, and the dc power supply circuit 58 are located on the other side of the circuit board 51 (e.g., the top side of the circuit board 51); this arrangement facilitates the mating attachment of the receiving card 51 to a patch panel (not shown). In addition, as shown in fig. 3, the connector module 52 includes a display data single-ended signal pin group 521, a display control signal single-ended signal pin group 523, and a display data Differential signal pin group 525, and the programmable logic device 53 is electrically connected to the display data single-ended signal pin group 521 and the display data Differential signal pin group 525 for outputting display data such as RGB data in a manner of selecting either single-ended signals or Low Voltage Differential Signaling (LVDS); and the programmable logic device 33 is electrically connected to the single-ended signal pin set of the display control signal for outputting the display control signal such as a row decoding signal, an enable signal, a latch signal, a clock signal or even a row blanking signal with a single-ended signal; in other words, the display data single-ended signal pin group 521 and the display data differential signal pin group 525 are, for example, an RGB data single-ended signal pin group and an RGB data differential signal pin group, respectively, or even the display data differential signal pin group 525 is, for example, an LVDS differential signal pin group. In this way, the receiving card 51 can not only use single-ended signal transmission of RGB data, but also use LVDS differential signal transmission directly when supplying the LED module with display data. Compared with the traditional single-ended signal, the LVDS differential signal has the advantages that: (1) the anti-interference capability is strong, the interference noise is generally loaded on the two signal lines in an equivalent and simultaneous manner, and the difference value is 0, namely the noise does not influence the logic significance of the signal; (2) electromagnetic interference (EMI) can be effectively inhibited, and because the two wires are close to each other and have equal signal amplitude, the amplitudes of coupling electromagnetic fields between the two wires and the ground wire are also equal, and simultaneously the signal polarities of the two wires are opposite, the electromagnetic fields are mutually offset, and the EMI to the outside is also small.
The Programmable logic device 53 is, for example, an FPGA (Field Programmable Gate Array) device. The memory device 54 is electrically connected to the programmable logic device 53, which is a volatile memory such as DDR4, DDR3, DDR2, LPDDR2, SDRAM, or the like, and the number of memory devices to be used can be determined according to actual needs.
The USB3.0 interfaces 57a, 57b, 59a, and 59b are electrically connected to a plurality of, for example, four SerDes channels configured in the programmable logic device 53, respectively, and the USB3.0 interfaces 57a, 57b, 59a, and 59b are also electrically connected to the dc power circuit 58 for obtaining power signals to be transmitted to the outside. The USB3.0 interfaces 57a, 57b, 59a, and 59b herein are interfaces having a plurality of pairs of high-speed differential signal pins and power signal pin groups, and thus may be replaced with other interfaces having a plurality of pairs of differential signal pins and power signal pin groups, such as Mini HDMI interfaces. In the embodiment, all SerDes channels of the programmable logic device are connected to interfaces such as a USB3.0 and the like, which include a power signal pin group and a plurality of pairs of differential signal pins, so that the size of the receiving card can be reduced, and the design scheme of the LED display screen control system using the receiving card can be diversified.
In addition, for the receiving card 50 provided with four USB3.0 interfaces 57a, 57b, 59a, 59b in fig. 1, the determination of the transmission rate and the signal transmission mode can be directly performed on the daughter card, because for each USB3.0 interface, there are multiple connection schemes, which can be used to connect to the wireless transmission daughter card or to connect to the wired network transmission daughter card, and the multiple connection schemes of the four USB3.0 interfaces 57a, 57b, 59a, 59b of the receiving card 50 are listed below with reference to fig. 4 to fig. 7.
Specifically, as shown in fig. 4, four USB3.0 interfaces 57a, 57b, 59a, 59b may be connected to the wired network transport daughter card 60 through USB3.0 lines, respectively. As for the wired network transmission daughter card 60, as shown in fig. 5A, it includes: the USB interface circuit comprises a circuit board, and a USB3.0 interface 61, a direct current-to-direct current circuit 63, a physical layer transceiver 65 and an Ethernet interface 67 which are arranged on the circuit board. The USB3.0 interface 61 is connected to one end of a USB3.0 line, and is an interface having a plurality of pairs of high-speed differential signal pins and a power signal pin group. The dc-dc converter 63 is electrically connected to the USB3.0 interface 61 and the physical layer transceiver 65, and is configured to obtain a power signal from the USB3.0 interface 61 and provide an operating voltage to the physical layer transceiver 65, where the dc-dc converter 63 of this embodiment employs a power management chip (PMIC), for example. The physical layer transceiver 65 is electrically connected to the USB3.0 interface 61 through a SerDes channel, where the SerDes channel includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is used for data transmission (i.e., as a data transmission differential signal line pair) and the other pair of differential signal lines is used for data reception (i.e., as a data reception differential signal line pair); for example, as shown in fig. 5B and 5C, the phy transceiver 65 is connected to the USB3.0 interface 61 through four differential signal lines, such as TX2_ P, TX2_ N, RX2_ P and RX2_ N, of a SerDes channel. The phy transceiver 65 may be a 5GBase-T or 10GBase-T ethernet phy transceiver, for example, using chips such as AQR111C, AQR114C, BCM54892, BCM54992, and BCM 54991. Furthermore, the ethernet interface 67 is electrically connected to the physical layer transceiver 65, which is, for example, an RJ45 network port integrated into a network transformer, or a RJ45 network port and a network transformer separated from each other and connected between the physical layer transceiver 65 and the RJ45 network port. It is also worth mentioning here that the USB3.0 interface 61 is an interface having a plurality of pairs of high-speed differential signal pins and power signal pin groups, and thus it may be replaced with another interface having a plurality of pairs of differential signal pins and power signal pin groups, such as a Mini HDMI interface.
Alternatively, as shown in fig. 6, four USB3.0 interfaces 57a, 57b, 59a, 59b may be connected to two wireless transmission daughter cards 80 and two wired network transmission daughter cards 60, respectively. Specifically, as shown in fig. 7, the radio daughter card 80 includes: the wireless transmission device comprises a circuit board, and a direct current-direct current circuit 83, a wireless transmission chip 85a and a wireless receiving chip 85b which are arranged on the circuit board. The circuit board is provided with a pad group 81, and the pad group 81 is electrically connected with one end of the USB3.0 line. The dc-dc circuit 83 is electrically connected to the pad set 81, the wireless transmitting chip 85a and the wireless receiving chip 85b, and is configured to obtain a power signal from the pad set 81 and supply an operating voltage to the wireless transmitting chip 85a and the wireless receiving chip 85 b. The wireless transmitting chip 85a and the wireless receiving chip 85b are arranged at intervals and electrically connected with the pad group 81 through a SerDes channel; the SerDes lane includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is used for data transmission (i.e., as a data transmission differential signal line pair) and the other pair of differential signal lines is used for data reception (i.e., as a data reception differential signal line pair). Further, the operating frequencies of the wireless transmission chip 85a and the wireless reception chip 85b are located in the millimeter wave band. The millimeter wave band herein typically means a frequency range of 30GHz to 300GHz with a corresponding wavelength of 1 mm to 10 mm. The wireless transmitting chip 85a and the wireless receiving chip 85b working in the millimeter wave band in this embodiment are very suitable for the application of the display boxes in the LED display screen, because the LED display screen is typically formed by splicing a plurality of display boxes, when the wireless transmission daughter card 80 is installed in each display box, the first consideration is how to avoid the wireless signal crosstalk between two wireless transmission daughter cards 80 that do not need to receive and transmit data in the same LED display screen, and the wireless transmitting chip 85a and the wireless receiving chip 85b in the wireless transmission daughter card 80 in this embodiment work in the millimeter wave band, which can greatly reduce the possibility of the wireless signal crosstalk compared with the wireless transmission modules in the prior art, such as WiFi module and bluetooth module. In addition, based on the performance of the wireless chip and the easy availability of the frequency band, the working frequency of the wireless transmitting chip 85a and the wireless receiving chip 85b is preferably in the frequency range of 57GHZ-67GHZ or 71GHZ-87GHZ, such as 60GHZ or 80 GHZ.
The above lists only the structures of two display control card assemblies using the receiving card 50, but the embodiments of the present invention are not limited thereto; because of the flexibility of the receiving card 50, it can be used in a variety of scenarios, and therefore the design of the daughter card can be changed from scenario to scenario.
To sum up, the utility model discloses receive card and display control card subassembly can have following one or more beneficial effect: (i) for the transmission rate solution, the problem of insufficient gigabit bandwidth can be effectively solved, the method is more suitable for small-distance application, the bandwidth can be 10G/5G/2.5G/1G or even other bandwidths, the flexibility is higher, and the applicability is stronger; (ii) for the signal transmission mode solution, different signal transmission modes can be selected according to different application scenes, so that the diversification and actual effective applicability of the LED display screen control system are greatly improved, and the workload of installation and maintenance is greatly reduced; and (iii) the LVDS differential signals are added while the conventional RGB single-ended signals are kept, so that the transmission anti-interference capability can be enhanced, the electromagnetic interference (EMI) can be effectively inhibited, and the EMC can be improved.
In addition, it should be understood that the foregoing embodiments are merely exemplary of the present invention, and the technical solutions of the embodiments can be arbitrarily combined and collocated without conflict between technical features and structures, and not departing from the purpose of the present invention.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.
Claims (10)
1. A daughter card for wired network transmission, comprising: the device comprises a circuit board, and a target type interface, a direct current-to-direct current circuit, a physical layer transceiver and an Ethernet interface which are arranged on the circuit board, wherein the target type interface comprises a power signal pin group and a plurality of pairs of differential signal pins; wherein,
the direct current-to-direct current circuit is electrically connected with the target type interface and the physical layer transceiver and is used for acquiring a power supply signal from the target type interface and providing working voltage for the physical layer transceiver; and
the physical layer transceiver is electrically connected to the target type interface through a SerDes channel, and the Ethernet interface is electrically connected to the physical layer transceiver.
2. The wired network transport daughter card of claim 1, wherein the SerDes channel includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is a data transmitting differential signal line pair and the other pair of differential signal lines is a data receiving differential signal line pair.
3. A wired network transport daughter card according to claim 1 wherein said target type interface is a USB3.0 interface.
4. The wired network transport daughter card of claim 1 wherein the target type interface is a MiniHDMI interface.
5. A wired network transport daughter card according to claim 1 wherein the physical layer transceiver is a 5GBase-T or 10GBase-T type ethernet physical layer transceiver.
6. A wired network transport daughter card according to claim 1 wherein the ethernet interface is an integrated network variant RJ45 port.
7. The wired network transport daughter card of claim 1 wherein the ethernet interface comprises a separate network transformer and an RJ45 port, and the network transformer is electrically connected between the physical layer transceiver and the RJ45 port.
8. A wired network transport daughter card as claimed in claim 1 wherein said dc to dc circuit includes a power management chip.
9. A display control card assembly, comprising: at least one wired network transmission daughter card as claimed in any one of claims 1 to 8, and a receiving card;
wherein the receiving card comprises: the second type interfaces and the target type interfaces are the same type interfaces, the second type interfaces are respectively electrically connected with a plurality of second SerDes channels configured by the programmable logic device and are also electrically connected with the direct current power supply circuit, each second SerDes channel comprises two pairs of second differential signal lines, one pair of the second differential signal lines in the two pairs of the second differential signal lines is used as a data transmission differential signal pair, the other pair of the second differential signal lines is used as a data reception differential signal pair, and each wired network transmission cable is connected with one of the second type interfaces through a daughter card cable.
10. The display control card assembly of claim 9, wherein the receiving card further comprises a connector assembly, and the connector assembly comprises a display data single-ended signal pin set, a display control signal single-ended signal pin set, and a display data differential signal pin set; the programmable logic device is electrically connected with the display data single-ended signal pin group and the display data differential signal pin group, and the display data differential signal pin group is an LVDS differential signal pin group; and the programmable logic device is electrically connected with the display control signal single-ended signal pin group.
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CN111462683A (en) * | 2020-05-12 | 2020-07-28 | 浙江大华技术股份有限公司 | L ED display screen and control method thereof |
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CN111462683A (en) * | 2020-05-12 | 2020-07-28 | 浙江大华技术股份有限公司 | L ED display screen and control method thereof |
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