CN210270649U - Control circuit for valve island bus single-line data transmission - Google Patents
Control circuit for valve island bus single-line data transmission Download PDFInfo
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- CN210270649U CN210270649U CN201921677104.0U CN201921677104U CN210270649U CN 210270649 U CN210270649 U CN 210270649U CN 201921677104 U CN201921677104 U CN 201921677104U CN 210270649 U CN210270649 U CN 210270649U
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- triode
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Abstract
The utility model provides a valve island bus single line data transmission's control circuit, include: NPN triodes Q1, Q2, resistors R1, R2, R3, R4 and diodes D1 and D2; one end of the resistor R1 is connected with a positive voltage VCC1, and the other end is connected with the anode of the diode D1 and the anode of D2; the cathode of the diode D2 is connected with the collector of the triode Q2, the emitter of the triode Q2 is grounded, the base is connected with one end of the resistor R4, and the other end of the resistor R4 is connected with a sending port of a controller in the valve island; the cathode of the diode D1 is connected with one end of the resistor R2 and is connected with a data line FUN in the bus inside the valve island; the other end of the resistor R2 is connected with one end of a resistor R3 and the base electrode of the triode Q1, the other end of the resistor R3 and the emitting electrode of the triode Q1 are grounded, and the collecting electrode of the triode Q1 is connected with a receiving port of the controller in the valve island. The utility model discloses reduce data line quantity, improved the interference killing feature.
Description
Technical Field
The utility model relates to a valve terminal internal bus, especially a single line data transmission's control circuit.
Background
The valve island is a product integrating industrial communication and control, and when the high-speed bus of the valve island transmits information outwards, acquired data also needs to be transmitted to the controller as timely as possible through the high-speed internal bus;
at present, bus implementation methods inside a valve island are mainly divided into two types, namely an external bus structure represented by a parallel bus, an RS485 bus, a CAN bus and the like, which have strong anti-interference capability, but the bus is not fast in order to ensure stability, and another internal bus represented by UART, SPI, FSMC and PCIE has the speed of more than 1M, but the stability is general, the bus is easily influenced by a manufacturing process and an external environment, and the number of IO occupying slave station equipment is large, so that the layout of the whole structure is influenced.
Disclosure of Invention
An object of the utility model is to overcome the not enough of existence among the prior art, provide a valve island bus single line data transmission's control circuit, can reduce the data line radical of valve island internal bus half, improve the quantity of slave station equipment in the carry valve island to strengthen the interference killing feature. The utility model adopts the technical proposal that:
a control circuit for valve island bus single line data transmission, comprising: NPN triodes Q1, Q2, resistors R1, R2, R3, R4 and diodes D1 and D2;
one end of the resistor R1 is connected with a positive voltage VCC1, and the other end is connected with the anode of the diode D1 and the anode of D2; the cathode of the diode D2 is connected with the collector of the triode Q2, the emitter of the triode Q2 is grounded, the base is connected with one end of the resistor R4, and the other end of the resistor R4 is connected with a sending port of a controller in the valve island;
the cathode of the diode D1 is connected with one end of the resistor R2 and is connected with a data line FUN in the bus inside the valve island; the other end of the resistor R2 is connected with one end of a resistor R3 and the base electrode of the triode Q1, the other end of the resistor R3 and the emitting electrode of the triode Q1 are grounded, and the collecting electrode of the triode Q1 is connected with a receiving port of the controller in the valve island.
Furthermore, the control circuit for single-wire data transmission of the valve island bus further comprises an anti-static ESD diode D3; the cathode of the anti-static ESD diode D3 is connected with the cathode of the diode D1, and the anode of D3 is grounded.
Furthermore, the control circuit for valve island bus single-wire data transmission further comprises a piezoresistor R5; one end of the piezoresistor R5 is connected with one end of the resistor R2, and the other end is grounded.
Further, the positive voltage VCC1 is 5v to 24 v.
Further, the positive voltage VCC1 is 12v to 24 v.
Furthermore, a receiving port of the master controller is internally or externally connected with a pull-up resistor.
The utility model has the advantages that: data transmission can be realized through one data line, the number of data lines of a bus in the valve terminal is greatly reduced, and the anti-interference capability is strong.
Drawings
Fig. 1 is an electrical schematic diagram of the present invention.
Detailed Description
The invention is further described with reference to the following specific drawings and examples.
Fig. 1 shows a control circuit (hereinafter referred to as a control circuit) for single-line data transmission of a valve island bus;
the method comprises the following steps: NPN triodes Q1, Q2, resistors R1, R2, R3, R4 and diodes D1 and D2; the ESD protection circuit further comprises an anti-static ESD diode D3, a piezoresistor R5;
one end of the resistor R1 is connected with a positive voltage VCC1, and the other end is connected with the anode of the diode D1 and the anode of D2; the cathode of the diode D2 is connected with the collector of the triode Q2, the emitter of the triode Q2 is grounded, the base is connected with one end of the resistor R4, and the other end of the resistor R4 is connected with a sending port of a controller (a master controller or a controller of slave station equipment) in the valve island;
the cathode of the diode D1 is connected with one end of the resistor R2 and is connected with a data line FUN in the bus inside the valve island; the other end of the resistor R2 is connected with one end of a resistor R3 and the base electrode of a triode Q1, the other end of the resistor R3 is grounded with the emitting electrode of the triode Q1, and the collecting electrode of the triode Q1 is connected with a receiving port of the controller in the valve island;
the cathode of the anti-static ESD diode D3 is connected with the cathode of the diode D1, and the anode of D3 is grounded;
one end of the piezoresistor R5 is connected with one end of the resistor R2, and the other end is grounded. The anti-static ESD diode D3 and the piezoresistor play roles in preventing static electricity and overvoltage;
the master controller in the valve island is connected with a certain data line in the internal bus through the control circuit, the slave station equipment needing to be mounted is connected to the same data line through the other control circuit with the same structure, and the master controller can be communicated with the slave station equipment through the single data line;
the control method of the master controller for data transmission is as follows:
the control method adopts an asynchronous data receiving and sending mode;
in a sending mode, data of a receiving port of the master controller is shielded (shielded by software setting), when a sending port is at a low level, the triode Q2 is turned off, and the data line FUN is pulled up to a high level by a positive voltage VCC 1; when the sending port is at a high level, the transistor Q2 is turned on, so that the data line FUN is pulled low to a low level;
in the receiving mode, the sending port of the master controller does not send data; when the data line FUN is at a high level, the triode Q1 is switched on, the receiving port of the master controller obtains a low level, when the data line FUN is at a low level, the triode Q1 is switched off, and the receiving port of the master controller obtains a high level; the receiving port of the master controller can be internally provided with a pull-up resistor or externally connected with a pull-up resistor;
moreover, if no data exists on the internal bus, the master controller simultaneously turns on the receiving mode when in the sending mode, and the sent data can be verified from the collector of the triode Q1; under normal conditions, the master controller sends a 1 to feed back a 1, and sends a 0 to feed back a 0;
the utility model discloses there are two big improvements:
firstly, a synchronous data transmission mode is changed into an asynchronous data transmission mode, and only one data line is needed to transmit and receive after a group of transmitting and receiving ports on the controller pass through the control circuit; for the internal bus, the number of data lines is reduced by half; tens of slave station devices (at least more than twenty) can be mounted on the internal bus, so that the number of the slave station devices is increased;
secondly, the anti-interference capability is greatly improved; for the controllers of the master controller and the slave devices, the positive voltage VCC1 can be increased from the conventional 5v to 12v or even 24v, while the transceiving ports of the controllers are not affected, and the control circuit also functions as an interface circuit; increasing the positive voltage VCC1 may increase the voltage on the data lines, enhancing interference rejection.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention and not for limiting, and although the present invention has been described in detail with reference to the examples, those skilled in the art should understand that the technical solutions of the present invention can be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should be covered by the scope of the claims of the present invention.
Claims (6)
1. A control circuit for valve island bus single-wire data transmission is characterized in that,
the method comprises the following steps: NPN triodes Q1, Q2, resistors R1, R2, R3, R4 and diodes D1 and D2;
one end of the resistor R1 is connected with a positive voltage VCC1, and the other end is connected with the anode of the diode D1 and the anode of D2; the cathode of the diode D2 is connected with the collector of the triode Q2, the emitter of the triode Q2 is grounded, the base is connected with one end of the resistor R4, and the other end of the resistor R4 is connected with a sending port of a controller in the valve island;
the cathode of the diode D1 is connected with one end of the resistor R2 and is connected with a data line FUN in the bus inside the valve island; the other end of the resistor R2 is connected with one end of a resistor R3 and the base electrode of the triode Q1, the other end of the resistor R3 and the emitting electrode of the triode Q1 are grounded, and the collecting electrode of the triode Q1 is connected with a receiving port of the controller in the valve island.
2. The control circuit for valve island bus single wire data transmission of claim 1,
also included is an anti-static ESD diode D3; the cathode of the anti-static ESD diode D3 is connected with the cathode of the diode D1, and the anode of D3 is grounded.
3. The control circuit for valve island bus single wire data transmission of claim 1,
also includes a voltage dependent resistor R5; one end of the piezoresistor R5 is connected with one end of the resistor R2, and the other end is grounded.
4. The control circuit for valve island bus single wire data transmission of claim 1,
the positive voltage VCC1 is 5v to 24 v.
5. The control circuit for valve island bus single wire data transmission of claim 1,
the positive voltage VCC1 is 12v to 24 v.
6. The control circuit for valve island bus single wire data transmission of claim 1,
the receiving port of the master controller is internally or externally connected with a pull-up resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921677104.0U CN210270649U (en) | 2019-10-09 | 2019-10-09 | Control circuit for valve island bus single-line data transmission |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921677104.0U CN210270649U (en) | 2019-10-09 | 2019-10-09 | Control circuit for valve island bus single-line data transmission |
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| CN210270649U true CN210270649U (en) | 2020-04-07 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110554729A (en) * | 2019-10-09 | 2019-12-10 | 无锡气动技术研究所有限公司 | control circuit and control method for valve island bus single-line data transmission |
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2019
- 2019-10-09 CN CN201921677104.0U patent/CN210270649U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110554729A (en) * | 2019-10-09 | 2019-12-10 | 无锡气动技术研究所有限公司 | control circuit and control method for valve island bus single-line data transmission |
| CN110554729B (en) * | 2019-10-09 | 2024-04-12 | 无锡气动技术研究所有限公司 | Control circuit and control method for single-wire data transmission of valve island bus |
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