CN210201849U - Chaotic circuit formed by memristor based on fractional order inductance - Google Patents

Abstract

The utility model discloses a recall chaotic circuit that hinders ware and constitute based on fractional order inductance, include the fractional order electric capacity C that connects gradually and form closed circuit^qFractional order inductor L^qA negative resistance G, a fractional order capacitor C^qBoth ends of the resistor M are connected in parallel with a fractional order memristor M^qThe fractional order memristor M^qAnd one end of the inductor is connected with the fractional order inductor L^qConnection of the fractional order memristor M^qThe other end is also connected with the negative resistor G; the system has an unstable saddle point and a pair of unstable saddle foci, which indicates that the system is a double-vortex chaotic system with fixed parameters. And the circuit is divided into analysis parts compared with other fractional order circuitsThe order chaotic system has simple topological structure and rich dynamic behaviors, and is greatly promoted to develop.

Description

Chaotic circuit formed by memristor based on fractional order inductance

Technical Field

The utility model belongs to the technical field of chaotic system signal generator design, concretely relates to recall chaotic circuit that hinders ware and constitute based on fractional order inductance.

Background

Memristors are considered the fourth basic circuit element, first proposed by professor zeiss in 1971. Since the development of practical memristors in HP laboratories in 2008, the practical application of memristors has received extensive attention. At present, the research on the memristor mainly focuses on the physical implementation of the memristor, such as a memristor equivalent circuit, a chaotic circuit dynamic behavior based on the memristor, and a memristor neural network. The memristor is used as a basic circuit element, and is mostly applied to various fields in a circuit form at present, so that the application circuit of the memristor is rich and diverse. Because the memristor has natural nonlinearity and plasticity, the memristor can be easily organically combined with other circuit elements to construct a chaotic oscillating circuit based on the memristor.

Fractional calculus is an extension of the mathematical domain that can be used to describe memristive properties. Fractional calculus plays an important role in signal and image processing, control theory, and nonlinear dynamical systems. A large number of researches show that the degree of freedom of the model can be improved by introducing the fractional order parameters into the fractional order model as adjustable parameters, and the actual characteristics of the system can be described more accurately. Since the magnetic flux or charge is mathematically a time integral of voltage or current, it can exhibit its own memory characteristics. Fractional calculus is particularly well suited to describe the memory and genetic properties of the system. It has essentially the same mathematical principles as the memory characteristics of the memory circuit elements. Therefore, the actual memory circuit elements should also be fractional order, either from a mathematical theory perspective or from a symmetry relationship between circuit variables. By popularizing the model to the fractional order, a new fractional order model can be obtained, and richer dynamic behaviors and chaotic behaviors are obtained.

SUMMERY OF THE UTILITY MODEL

The utility model aims at providing a recall chaotic circuit that hinders ware and constitute based on fractional order inductance provides a fractional order and recalls and hinder ware chaotic system circuit, and this circuit shows abundant dynamics action along with the change of order and parameter under different initial conditions.

The true bookThe technical scheme adopted by the novel memristor-based chaotic circuit comprises a fractional order capacitor C which is sequentially connected and forms a closed loop^qFractional order inductor L^qNegative resistance G, fractional order capacitance C^qBoth ends of the resistor M are connected in parallel with a fractional order memristor M^qFractional order memristor M^qAnd one end of the inductor is connected with the fractional order inductor L^qConnected, fractional order memristor M^qThe other end is also connected with a negative resistance G and a fractional order memristor M^qComprises a diode bridge circuit, wherein fractional order inductors are connected in parallel at two ends of the diode bridge circuit

Fractional order capacitor C^qComprising a resistor R_inAnd a resistance R_inA plurality of RC equivalent circuits are connected in parallel, and each RC equivalent circuit comprises capacitors C connected in parallel_nAnd a resistance R_nFractional order inductance L^qAnd fractional order inductance

Respectively comprises a resistor R_inAnd a resistance R_inThe two ends of the resistor are also connected with a plurality of RL equivalent circuits in parallel, and each RL equivalent circuit comprises resistors R connected together in series_nAnd an inductance L_n。

The utility model discloses a characteristics still lie in:

the diode bridge circuit comprises a diode VD with positive and negative ends connected in series₁Diode VD₄And a diode VD connected in series with the positive and negative terminals₃Diode VD₂Diode VD₁Negative terminal of and diode VD₃Is connected with the negative terminal of a diode VD₂And the positive terminal of the diode VD₄Is connected with the positive terminal of the inductor and has fractional order

And diode VD₃Negative terminal of and diode VD₂The positive terminals of the two are connected in parallel.

The utility model has the advantages that:

the utility model relates to a recall chaotic circuit that hinders ware and constitute based on fractional order inductance, this system have an unstable saddle point and a pair of unstable saddle burnt, show that this system is a two whirlpool book chaotic system that has fixed parameter. Compared with other fractional order circuits, the circuit has simple topological structure and rich dynamic behaviors for analyzing the fractional order chaotic system, and has great promotion effect on the development of the chaotic system.

Drawings

FIG. 1 is a chaotic circuit formed by memristors based on fractional order inductance;

FIG. 2 is a single cascaded inductor for a diode bridge circuit

A generalized memristor circuit is formed;

FIG. 3 is a fractional order inductor equivalent circuit;

FIG. 4 is a fractional order capacitor equivalent circuit;

FIG. 5(a) shows v when the fractional order is 0.99₁-i₁A phase diagram;

FIG. 5(b) is a graph showing the v at a fractional order of 0.99₁-i₁A phase diagram;

FIG. 5(c) shows i when the fractional order is 0.99₁-i_mA phase diagram;

FIG. 5(d) is a graph showing the v at a fractional order of 0.99₁-i₁-i_mA phase diagram;

FIG. 6 is a current-voltage characteristic of a fractional order memristor;

FIG. 7 shows the fractional order in the region [0.8,1 ]]In time of change, variable v₁A local maximum value bifurcation map of;

FIG. 8(a) is a phase trace plot of a system with a fractional order of 0.85;

FIG. 8(b) is a phase trace plot of the system with a fractional order of 0.9;

FIG. 8(c) is a phase trace plot of the system with a fractional order of 0.93;

FIG. 8(d) is a phase trace plot of the system with a fractional order of 0.942;

FIG. 8(e) is a phase trace of the system with a fractional order of 0.955;

FIG. 8(f) is a phase trace diagram of the system at a fractional order of 0.962;

fig. 9 is a circuit diagram of a chaotic circuit implemented by the memristor based on fractional order inductance of the present invention;

FIG. 10(a) shows v when the fractional order is 0.99_C-i_LPhase PSpice circuit simulation diagram;

FIG. 10(b) is a graph showing a case where the fractional order is 0.99 order

Phase PSpice circuit simulation diagram;

FIG. 10(c) is a graph showing a case where the fractional order is 0.99

Phase PSpice circuit simulation diagram;

FIG. 10(d) is a graph showing a case where the fractional order is 0.99

Phase PSpice circuit simulation diagram;

FIG. 11(a) shows v when the fractional order is 0.88 order_C-i_LPhase PSpice circuit simulation diagram;

FIG. 11(b) is a graph of the fractional order of 0.88

And (3) phase PSpice circuit simulation diagrams.

Detailed Description

The present invention will be described in detail with reference to the accompanying drawings and specific embodiments.

The utility model relates to a recall chaotic circuit that hinders ware and constitute based on fractional order inductance, as shown in fig. 1, including connecting gradually and forming the fractional order electric capacity C of closed circuit^qFractional order inductor L^qA negative resistance G, a fractional order capacitor C^qBoth ends of the resistor M are connected in parallel with a fractional order memristor M^qThe fractional order memristor M^qAnd one end of the first and second electrodes is connected with the fractional orderFeeling L^qConnection of the fractional order memristor M^qThe other end is also connected with the negative resistor G.

As shown in FIG. 2, the fractional order memristor M^qComprises a diode bridge circuit, wherein fractional order inductors are connected in parallel at two ends of the diode bridge circuit

The diode bridge circuit comprises a diode VD with positive and negative ends connected in series₁Diode VD₄And a diode VD connected in series with the positive and negative terminals₃Diode VD₂Said diode VD₁And the negative terminal of the diode VD₃Is connected to the negative terminal of the diode VD₂And the positive terminal of the diode VD₄Is connected with the positive terminal of the inductor and has fractional order

And diode VD₃Negative terminal of and diode VD₂The positive terminals of the two are connected in parallel.

As shown in fig. 3, the fractional order inductance L^qAnd the fractional order inductor

Respectively comprises a resistor R_inAnd the resistance R_inThe two ends of the resistor are also connected with a plurality of RL equivalent circuits in parallel, and each RL equivalent circuit comprises resistors R connected together in series_nAnd an inductance L_n。

As shown in fig. 4, a fractional order capacitor C^qComprising a resistor R_inAnd the resistance R_inA plurality of RC equivalent circuits are connected in parallel, and each RC equivalent circuit comprises capacitors C connected in parallel_nAnd a resistance R_n。

The utility model relates to a recall mathematical model of chaos circuit that hinders ware and constitute based on fractional order inductance has 3 state variables, is fractional order electric capacity C respectively^qVoltage v across_CThrough a fractional order inductor L^qCurrent i of_LAnd reflects fractional order memristor M^qFlow-through fractional order inductance of internal state variables

Current of

FIG. 2 shows a fractional order memristor M^qCan be represented by the following equation:

i_sis the reverse saturation current of the diode, rho is 1/(2 nV)_T) N is an emission coefficient, V_TIs a thermal voltage. i.e. i₀Is the current through a fractional order inductor, v_gRepresenting the input voltage, i_gRepresenting the input current, L is set to 10 mH. Memory is

The fractional order inductance is implemented as an equivalent circuit as shown in fig. 3. The equivalent circuit expression of the fractional order inductor is as follows:

the serial number of the parallel resistor and the inductor is N-2N +1, and N is the order of the filter.

The fractional order capacitor is realized by an equivalent circuit shown in fig. 4, and the equivalent circuit expression of the fractional order capacitor is as follows:

a mathematical model of the chaos circuit that memristor constitutes based on fractional order inductance can be represented by 3 state variables, respectively fractional order electric capacity C^qVoltage v across_CThrough a fractional order inductor L^qCurrent i of_LAnd reaction fractional order memristor M^qInternal state variablesFlowing through fractional order inductor

Current of

By using kirchhoff's voltage law and kirchhoff's current law for the circuit shown in fig. 1, a mathematical model of this chaotic circuit can be obtained as represented by the following equation:

the following variables and circuit parameters were normalized:

the normalized fractional order mathematical model of the chaotic circuit is obtained as follows:

respectively setting fractional order capacitance, inductance and resistor as C^q＝5nF、L^q＝25mH、G＝0.65mS、

Then, the values of the three parameters are:

α＝1.1834，β＝0.4734,γ＝1.8525×10^-4(6)

numerical simulation:

in order to verify the chaotic circuit formed by the memristor based on the fractional order inductance, MATLAB software is used for carrying out numerical simulation, and a mathematical model is given by an equation (5). The corresponding parameters are as described above, and v at the fractional order of 0.99 can be obtained₁-i₁As shown in fig. 5(a) and 5(b), the chaotic attractor is a double-vortex attractor. FIGS. 5(c) and 5(d) are each i at a fractional order of 0.99₁-i_mAnd v₁-i₁-i_mPhase diagram of (a). At the same time, generalized fractionThe current-voltage characteristic curve of the order memristor is shown in fig. 6, and the effectiveness of the fractional order memristor is verified through a hysteresis loop.

When the order q varies between regions [0.8,1 ]]Time, variable v₁The bifurcation diagram of the local maxima of (2) is shown in fig. 7. As shown in FIGS. 8(a), 8(b), 8(c), 8(d), 8(e) and 8(f), when q is located in the region [0.805,0.816 ]]The system is in a periodic transition state. In the [0.891,0.895 ]]Within the narrow range of (2), the system has short upper and lower single-period coexistence time. When q reaches 0.895, the system enters an upper and a lower double-period limit loop which coexist, then enters a short-term four-period limit loop when q reaches 0.973, and enters a single-vortex chaotic attractor by period doubling bifurcation. And when q is 0.947, combining the discontinuous spiral chaotic attractors to generate a double-vortex chaotic attractor, and eliminating the coexistence period limit loop and the spiral chaotic attractor. The unstable tracks of the upper and lower spiral chaotic attractors which coexist collide with each other to cause complete chaos. The chaotic behavior suddenly stops at q 0.962.

The coexistence of the periodic limit cycle and the spiral chaotic attractor under different initial conditions of the order q between 0.895 and 0.947 is a phenomenon worthy of further research. For a single initial condition, up and down jumps in the variables can lead to discontinuities in the dynamic behavior. This discontinuous behavior constitutes exactly one co-existence phenomenon for both initial conditions. After entering double-vortex chaos, the two tracks enter an agreeable closed area.

Circuit simulation:

in order to further verify the feasibility of the chaos circuit that the memristor constituted based on fractional order inductance that proposes, the utility model discloses utilize PSpice software to carry out the circuit emulation, the utility model discloses a chaos circuit realization circuit diagram that memristor constituted based on fractional order inductance is shown in FIG. 9. The equivalent circuit of the fractional order inductance is shown in fig. 3. The equivalent circuit of the fractional order capacitor is shown in fig. 4. The circuit parameters are shown in the following table.

TABLE 1 fractional order LC equivalent link resistance

TABLE 2 fractional order LC equivalent link parameters

The chaotic circuit based on the fractional order memristor with the order of 0.99 is designed by using the parameters in the table above, and circuit simulation is performed, and experimental results are shown in fig. 10(a), 10(b), 10(c) and 10 (d). Therefore, when the order is 0.99 order, the system is in a chaotic state, the result is completely consistent with the result of numerical simulation, and the correctness of theoretical analysis is verified.

The chaotic circuit formed by memristors based on fractional order inductance when the order is 0.95 is designed by using the parameters in the table above, and circuit simulation is performed, and the experimental results are shown in fig. 11(a) and 11 (b). It can be seen that when the order is 0.95, the system is in a chaotic state.

Claims (1)

1. A chaotic circuit formed by memristors based on fractional order inductance is characterized by comprising fractional order capacitors C which are sequentially connected and form a closed loop^qFractional order inductor L^qA negative resistance G, a fractional order capacitor C^qBoth ends of the resistor M are connected in parallel with a fractional order memristor M^qThe fractional order memristor M^qAnd one end of the inductor is connected with the fractional order inductor L^qConnection of the fractional order memristor M^qThe other end is also connected with the negative resistance G, and the fractional order memristor M^qComprises a diode bridge circuit, wherein fractional order inductors are connected in parallel at two ends of the diode bridge circuit

The fractional order capacitor C^qComprising a resistor R_inAnd the resistance R_inA plurality of RC equivalent circuits are connected in parallel, and each RC equivalent circuit comprises electricity connected in parallelContainer C_nAnd a resistance R_nSaid fractional order inductance L^qAnd the fractional order inductor

Respectively comprises a resistor R_inAnd the resistance R_inThe two ends of the resistor are also connected with a plurality of RL equivalent circuits in parallel, and each RL equivalent circuit comprises resistors R connected together in series_nAnd an inductance L_n；

The diode bridge circuit comprises a diode VD with positive and negative ends connected in series₁Diode VD₄And a diode VD connected in series with the positive and negative terminals₃Diode VD₂Said diode VD₁And the negative terminal of the diode VD₃Is connected to the negative terminal of the diode VD₂And the positive terminal of the diode VD₄Is connected with the positive terminal of the inductor, and the fractional order inductor

And diode VD₃Negative terminal of and diode VD₂The positive terminals of the two are connected in parallel.

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