CN210109741U

CN210109741U - Switching on and shutting down circuit and electronic equipment

Info

Publication number: CN210109741U
Application number: CN201921122553.9U
Authority: CN
Inventors: 李永刚; 战丰丰; 朱志军
Original assignee: Goertek Inc
Current assignee: Goertek Inc; Weifang Goertek Electronics Co Ltd
Priority date: 2019-07-17
Filing date: 2019-07-17
Publication date: 2020-02-21
Anticipated expiration: 2029-07-17

Abstract

The utility model relates to a switching on and shutting down circuit and electronic equipment, this switching on and shutting down circuit includes: a master controller; a battery; a first switch control circuit provided between the battery and a power supply terminal of the electronic apparatus; the output end of the key switch is respectively connected with the input end of the main controller and the control end of the first switch control circuit; the control end of the second switch control circuit is connected with the output end of the main controller, and the output end of the second switch control circuit is connected between the control end of the first switch control circuit and the output end of the key switch; and a first pull-up resistor having one end connected between the battery and the input terminal of the first switch control circuit and the other end connected between the control terminal of the first switch control circuit and the output terminal of the second switch control circuit. The utility model discloses a design simple circuit, battery and electronic equipment feeder ear are kept apart to the normal power supply of electronic equipment when realizing starting and when shutting down to the battery, avoid the leakage current, and this circuit is simple easily to be realized, reduces design cost, and occupation space is little.

Description

Switching on and shutting down circuit and electronic equipment

Technical Field

The utility model belongs to the technical field of electronic equipment switching on and shutting down, concretely relates to switching on and shutting down circuit and electronic equipment.

Background

Electronic equipment specifically is intelligent wearing type electronic equipment (for example intelligent bracelet, bluetooth headset etc.) because of portable and small and exquisite, receives user's unanimous favor. With the miniaturization of electronic devices, the problem of insufficient battery endurance due to small battery capacity also arises. In the prior art, for example, electronic equipment such as a bluetooth headset can realize the power on/off function through designing a sliding switch, and realize the isolation between a battery and an electronic equipment power supply terminal when the electronic equipment is powered off, so as to improve the cruising ability of the electronic equipment, but the sliding switch has higher circuit cost and needs to design a sliding mechanical structure, so that the space occupation is larger, the assembly difficulty is large, and the design flexibility and the attractiveness are reduced for the miniaturized electronic equipment.

SUMMERY OF THE UTILITY MODEL

The utility model provides a switch circuit through designing simple circuit, and battery and electronic equipment feeder ear are kept apart to the normal power supply of electronic equipment when realizing the start and when shutting down to the battery, avoid the leakage current, and this circuit is simple easily to be realized, reduces design cost, and occupation space is little.

In order to solve the technical problem, the utility model provides a following technical scheme solves:

a switching circuit for an electronic device, comprising: a master controller; a battery; a first switch control circuit provided between the battery and a power supply terminal of the electronic apparatus; the output end of the key switch is respectively connected with the input end of the main controller and the control end of the first switch control circuit; the control end of the second switch control circuit is connected with the output end of the main controller, and the output end of the second switch control circuit is connected between the control end of the first switch control circuit and the output end of the key switch; and a first pull-up resistor having one end connected between the battery and the input terminal of the first switch control circuit and the other end connected between the control terminal of the first switch control circuit and the output terminal of the second switch control circuit.

In order to avoid the key switch from being affected by static electricity, the switching circuit as described above further includes a transient suppression diode connected in parallel with the key switch.

As an embodiment of the first switch control circuit and the second switch control circuit, the switching circuit as described above is configured such that the first switch control circuit is a low-level conducting switch circuit and the second switch control circuit is a high-level conducting switch circuit.

As a specific implementation manner of the first switch control circuit, the first switch control circuit is a PMOS transistor, a drain of the PMOS transistor is connected to the power supply terminal, a source of the PMOS transistor is connected between the battery and one end of the first pull-up resistor, and a gate of the PMOS transistor is connected to the other end of the first pull-up resistor, an output terminal of the second switch control circuit, and an output terminal of the key switch, respectively.

As a specific implementation manner of the second switch control circuit, the switch circuit described above is an NMOS transistor, a gate of the NMOS transistor is connected to the output terminal of the main controller, a source of the NMOS transistor is grounded, and a drain of the NMOS transistor is connected to the control terminal of the first switch control circuit and the output terminal of the key switch, respectively.

In order to filter signals, the switching-on/off circuit further comprises a first filter circuit arranged between the battery and the input end of the first switch control circuit; and/or a second filter circuit arranged between the output end of the first switch control circuit and the power supply end; and/or a third filter circuit arranged between the output end of the main controller and the control end of the second switch control circuit.

The power on/off circuit further includes a first diode, an anode of the first diode is connected to the control terminal of the first switch control circuit, the other end of the first pull-up resistor and the output terminal of the second switch control circuit, and a cathode of the first diode is connected to the output terminal of the key switch.

The power on/off circuit further comprises a second diode, wherein the anode of the second diode is connected with the input end of the main controller and the second pull-up resistor respectively, and the cathode of the second diode is connected with the output end of the key switch.

The utility model discloses still relate to an electronic equipment, include as above switching on and shutting down circuit.

Compared with the prior art, the utility model discloses an advantage and beneficial effect are: the power supply end of the battery and the power supply end of the electronic equipment are isolated when the electronic equipment is started and is powered off by designing a simple hardware circuit, leakage current generated when the power is off is avoided, the circuit is simple and easy to realize, the design cost is reduced, and the occupied space is small.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the embodiments of the present invention or the description of the prior art will be briefly described below, and it is obvious that the drawings described below are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a circuit diagram of an embodiment of the power on/off circuit of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

Utilize simple circuit to realize that electronic equipment normally supplies power when opening through the button and realize that battery and electronic equipment's power supply end keep apart when the button shuts down, this embodiment relates to a switching on and shutting down circuit for electronic equipment includes: a master (e.g., an MCU chip, not shown); a battery; a first switch control circuit provided between the battery and a power supply terminal of the electronic apparatus; the output end of the key switch is respectively connected with the input end of the main controller and the control end of the first switch control circuit; a second switch control circuit, the control end of which is connected with the output end of the main controller, the output end of which is connected between the control end of the first switch control circuit and the output end of the key switch, and a first pull-up resistor R1, one end of which is connected between the battery and the input end of the first switch control circuit, and the other end of which is connected between the control end of the first switch control circuit and the output end of the second switch control circuit.

In the present embodiment, the key switch SW1 and its simple peripheral circuit are used to realize the self-locking of the key switch SW1 after the key switch SW1 is turned on, at this time, the battery normally supplies power to the electronic device, and when the key switch SW1 is turned off, the self-locking of the key switch SW1 is released and the battery and the power supply terminal of the electronic device are isolated, wherein the simple peripheral circuit is described in detail below. In the present embodiment, when the key switch SW1 is pressed for a long time (e.g., 3 seconds), the key switch SW1 is self-locked, and when the key switch SW1 is pressed for a long time (e.g., 3 seconds), the key switch SW1 is unlocked, and the master considers that the user is to be turned on when the long press of the key switch SW1 is received for the first time, and considers that the user is to be turned off when the long press of the key switch SW1 is received again.

In this embodiment, the first switch control circuit is a switch circuit turned on at a low level, and the second switch control circuit is a switch circuit turned on at a high level. Specifically, as shown in fig. 1, one end of the KEY switch SW1 is grounded, and the other end outputs a Power _ KEY _ RESET signal; the first switch control circuit is a PMOS tube Q1, a source S of the PMOS tube Q1 is connected with the battery 1, the battery voltage is recorded as VBAT +, a drain D outputs a voltage VB + for supplying power to electronic equipment, one end of a first pull-up resistor R1 is connected between the battery and the source, and a grid G is connected with the output end of the key switch SW1 and the other end of the first pull-up resistor R1 respectively; the second switch control circuit is an NMOS transistor Q2, a gate G of the NMOS transistor Q2 is connected to a Power _ KEY signal output when the main controller receives the Power _ KEY _ RESET signal, a source S is grounded, and a drain D is connected to an output terminal of the KEY switch SW1, a gate G of the PMOS transistor Q1, and the other end of the first pull-up resistor R1, respectively. The specific working process is described as follows.

When a user presses the KEY switch SW1 for the first time for a long time, the pin 1 and the pin 2 of the SW1 are connected, the KEY switch SW1 is grounded, the voltage of the grid G of the PMOS tube Q1 is at a low level, the PMOS tube Q1 is connected, the battery outputs a voltage VB +, the Power _ KEY _ RESET signal is pulled down while the KEY switch SW1 is pressed, the master controller receives the Power _ KEY _ RESET signal and then outputs a Power _ KEY high-level signal, the NMOS tube Q2 is controlled to be connected, the voltage of the grid G of the PMOS tube Q1 is kept at the low level, the voltage of the grid G of the PMOS tube Q1 is kept at the low level even if the user releases the KEY switch SW1, the PMOS tube Q1 is kept connected, self-locking of the KEY switch SW1 is realized, and the battery supplies Power to the electronic equipment through the PMOS tube Q1, and the switching process is finished.

When the user presses the KEY switch SW1 for a long time again, the pin 1 and the pin 2 of the SW1 are switched on, the KEY switch SW1 is grounded, the Power _ KEY _ RESET signal is pulled low, the main controller receives the Power _ KEY _ RESET signal and then outputs a Power _ KEY low level signal to control the NMOS tube Q2 to be switched off to unlock the KEY switch SW1, the user releases the KEY switch SW1, the gate G of the PMOS tube Q1 is connected with the first pull-up resistor R1, so that the gate G of the PMOS tube Q1 is at a high level, the PMOS tube Q1 is switched off, the battery is prevented from outputting the voltage VB + to the Power supply end of the electronic device, and the shutdown process is completed. After shutdown, due to the fact that the PMOS tube Q1 is turned off, VBAT + and VB + are isolated through the PMOS tube Q1, leakage current of electronic equipment after shutdown is reduced, standby time of the electronic equipment is prolonged, charging frequency of a battery is reduced, and service life of the battery is prolonged.

When the key switch SW1 is turned off by long press, static electricity is generated, in order to avoid the static electricity from interfering with the key switch SW1, the key switch SW1 is connected in parallel with the transient suppression diode D3, when the transient suppression diode D3 is bipolar, and when an instantaneous large pulse exists in the key switch SW1, such as an electrostatic discharge effect, the working impedance of the transient suppression diode D3 is immediately reduced to an extremely low conduction value, so that a large current is allowed to pass through, and the key switch SW1, the main controller and other components are effectively protected from being damaged.

In this embodiment, in order to avoid the current flowing backward to the battery or the master when the KEY switch SW1 is pressed, a first diode D1 and a second diode D2 are provided, the anode of the first diode D1 is connected between the gate G of the PMOS transistor Q1 and the gate of the NMOS transistor Q2, the cathode of the first diode D1 is connected to the output terminal of the KEY switch SW1, the anode of the second diode D2 is connected between the input terminal of the master for receiving the Power _ KEY _ RESET signal and one end of the second pull-up resistor R4, and the other end of the second pull-up resistor R4 is connected to the Power signal (for example, the output voltage VB + of the PMOS transistor Q1).

Referring to fig. 1 again, in this embodiment, in order to filter the battery voltage VBAT +, a first filter circuit is disposed between the battery and the source S of the PMOS transistor Q1, the first filter circuit is a capacitor C1 in this embodiment, one end of the capacitor C1 is connected between the battery and the source S of the PMOS transistor Q1, and the other end is grounded. In order to filter the voltage output by the PMOS transistor Q2, a second filter circuit is disposed between the drain D of the PMOS transistor Q1 and the power supply terminal of the electronic device, the second filter circuit is a capacitor C2 in this embodiment, one end of the capacitor C2 is connected between the drain D of the PMOS transistor Q1 and the power supply terminal of the electronic device, and the other end is grounded. In order to filter the Power _ KEY signal output by the main controller, a third filter circuit is arranged between the output end of the main controller outputting the Power _ KEY and the gate G of the NMOS transistor Q2, the third filter circuit is specifically a circuit formed by connecting a resistor R3 and a capacitor cabinet C3 in parallel and then connecting the resistor R2 in series, one end of the resistor R2 is connected with the output end of the main controller, the other end of the resistor R2 is connected with one end of a resistor R3, one end of a capacitor C3 and the gate G of the NMOS transistor Q2, and the other end of the resistor R3 and the other end of the capacitor C3 are both grounded.

The embodiment also relates to an electronic device, which includes a switching circuit, and the structure and the working principle of the electronic device refer to the drawings and the above description, which are not described herein again. The electronic device of the embodiment can be an audio device such as a smart watch, a smart bracelet or a wireless earphone. By designing a simple startup and shutdown circuit, the design cost and the space occupancy rate are reduced, the electronic equipment is started and shutdown by pressing a single key, and the battery and the power supply end of the electronic equipment are thoroughly isolated after shutdown, so that the electronic equipment has higher safety, the leakage current is almost zero, the standby time of the electronic equipment is prolonged, and the service life of the battery is prolonged.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.

Claims

1. A switching circuit for an electronic device, comprising:

a master controller;

a battery;

a first switch control circuit provided between the battery and a power supply terminal of the electronic apparatus;

the output end of the key switch is respectively connected with the input end of the main controller and the control end of the first switch control circuit;

the control end of the second switch control circuit is connected with the output end of the main controller, and the output end of the second switch control circuit is connected between the control end of the first switch control circuit and the output end of the key switch; and

and the first pull-up resistor has one end connected between the battery and the input end of the first switch control circuit and the other end connected between the control end of the first switch control circuit and the output end of the second switch control circuit.

2. The switching circuit of claim 1, further comprising a transient suppression diode in parallel with the keyswitch.

3. The switching circuit according to claim 1, wherein the first switch control circuit is a low-level conducting switch circuit, and the second switch control circuit is a high-level conducting switch circuit.

4. The switch circuit of claim 3, wherein the first switch control circuit is a PMOS transistor, a drain of the PMOS transistor is connected to the power supply terminal, a source of the PMOS transistor is connected between the battery and one end of the first pull-up resistor, and a gate of the PMOS transistor is connected to the other end of the first pull-up resistor, the output terminal of the second switch control circuit, and the output terminal of the key switch.

5. The switch circuit of claim 3 or 4, wherein the second switch control circuit is an NMOS transistor, a gate of the NMOS transistor is connected to the output terminal of the main controller, a source of the NMOS transistor is grounded, and a drain of the NMOS transistor is connected to the control terminal of the first switch control circuit and the output terminal of the key switch, respectively.

6. The switching circuit according to claim 1, further comprising a first filter circuit disposed between the battery and an input of the first switching control circuit; and/or a second filter circuit arranged between the output end of the first switch control circuit and the power supply end; and/or a third filter circuit arranged between the output end of the main controller and the control end of the second switch control circuit.

7. The on-off circuit as claimed in claim 1, further comprising a first diode having an anode connected to the control terminal of the first switch control circuit, the other terminal of the first pull-up resistor and the output terminal of the second switch control circuit, and a cathode connected to the output terminal of the key switch.

8. The switching circuit according to claim 1 or 7, further comprising a second diode having an anode connected to the input terminal of the master controller and the second pull-up resistor, respectively, and a cathode connected to the output terminal of the key switch.

9. An electronic device comprising the switching circuit according to any one of claims 1 to 8.