CN210092098U - Solar cell with composite dielectric passivation layer structure - Google Patents

Abstract

The utility model discloses a composite dielectric passivation layer structure solar cell, wherein, the aluminum oxide, silicon dioxide, silicon oxynitride, silicon nitride with different refractive indexes and the back surface passivation layer with a laminated structure thereof greatly reduce the back surface recombination rate, improve the back reflectivity, simultaneously reduce the component CTM, and improve the light attenuation performance and the heat-assisted light attenuation performance of the cell and the anti-PID performance; the passivation structure can be used as a P-type monocrystalline silicon substrate, a P-type polycrystalline silicon substrate and a P-type monocrystalline silicon substrate doped with boron or gallium, and can be compatible with passivation methods based on the passivation structure of the composite dielectric film for manufacturing PERC batteries, double-sided PERC + batteries, laminated PERC batteries and the like; the preparation process steps and sequence of the laminated structure, the corresponding preparation mode and the process parameter range can well finish the battery manufacture.

Description

Solar cell with composite dielectric passivation layer structure

Technical Field

The utility model relates to a PERC solar cell technical field specifically is a solar cell of compound dielectric passivation rete structure.

Background

Photovoltaic power generation is a way of directly converting solar energy into electric energy through the photovoltaic effect of semiconductors, reducing the consumption loss during energy conversion, and then supplying the generated power to users for use, thereby effectively utilizing solar energy. The photovoltaic power generation can reduce the use proportion of petrochemical energy, thereby reducing carbon emission and improving the environment, and the photovoltaic power generation is gradually developed into a new strategic manufacturing industry which can be rival with developed countries such as Europe, America and Japan through more than ten years of technology pursuit; meanwhile, photovoltaic power generation is one of the national accurate poverty relief modes, and clean electric power and electric power selling benefits are provided for more remote poverty-deficient and power-deficient mountainous areas through a photovoltaic poverty relief project. However, because the current light utilization rate is low and the cost of technical lines and equipment auxiliary materials is high, the photovoltaic power generation cannot reach the electricity consumption cost and the selling price which are the same as those of the traditional fossil energy, the application range of the photovoltaic power can be expanded only by reducing the electricity consumption cost and improving the energy conversion efficiency, and the ultimate goal of 'flat price surfing the internet' is realized. How to realize the flat price of the power generated by the photovoltaic to surf the internet so as to realize the essential change of the energy acquisition mode becomes the key challenge of the popularization and application of the photovoltaic. The main path for realizing the solar cell photovoltaic conversion system is to improve the photovoltaic conversion efficiency of the solar cell and maintain the long-term sustainable stable power generation capacity, so that the solar cell photovoltaic conversion system needs to be gradually improved through a large amount of product research and development and technology upgrade in the early stage, and meanwhile, the cost of the manufacturing end of the whole industrial chain is reduced.

The traditional BSF solar cell preparation process flow in the last 20 years is shown in the attached figure 3 of the specification, and the efficiency can be improved by 0.8% -1.1% through continuous front-side emitter junction process formula improvement, gold half-contact leading-out electrode process upgrading, textured surface preparation mode and equipment improvement, such as selective emitter junctions, high-resistance dense gates, black silicon, DP and the like, and the superposition of mass-production technologies. However, the aluminum back surface field formed by the back surface heavy aluminum doping of the traditional BSF solar cell always has composite electrical loss and long-wave optical loss of the back surface because the direct contact between metal and semiconductor is always an effective composite center. In order to solve the structural design problem, various large research institutions at home and abroad focus on passivation treatment and structural improvement on the surface of a high-efficiency cell, for example, the design principles of PERC, HJT, IBC and TopCon cells aim at reducing interface layer carrier recombination and mainly improve the photoelectric conversion quantum efficiency of each waveband, so that the photoelectric conversion efficiency of the solar cell is greatly improved. The PERC cell can greatly improve the photoelectric conversion efficiency of the solar cell and can be compatible with the existing cell production line. Through product design and process optimization, back passivation and laser equipment are introduced, cleaning equipment is selectively introduced, the absolute photoelectric conversion efficiency value of the battery can be improved by 1.0% -1.5%, the wattage of a photovoltaic cell panel is further improved, the actual generated energy of the PERC single crystal assembly in an outdoor actual power generation test is about 3.1% higher than that of a conventional polycrystalline assembly, and therefore the electricity cost per degree is reduced, and the photovoltaic flat price internet surfing is made a contribution.

The passivated emitter and back local contact cell PERC technology reduces the recombination of carriers by introducing a dielectric passivation layer on the back of the cell, thereby improving the open-circuit voltage of the device, increasing the back surface reflection, and improving the short-circuit current. The process can improve the conversion efficiency of the monocrystalline silicon battery by 1.5% absolute value, has relatively simple process route and large cost benefit, and is completely compatible with the existing battery production line. Among them, it is important to select a passivation film suitable for an industrial high-efficiency silicon solar cell. The film should be prepared at relatively low temperatures, not to destroy the microscopic chemical bonds and material properties of the internally formed cells, and to have comparable passivation properties to laboratory thermally oxidized SiO 2. In recent years, through continuous accumulation of attempts, the alumina dielectric film with negative charges can well passivate the surface of a P-type silicon and obtain a lower surface recombination rate, and the SRVs of ALD using low-temperature plasma on the low-resistivity P-type silicon is proved to be less than 13 cm/s; and the deposition of the aluminum oxide film can be realized at a lower temperature which is generally lower than the deposition temperature of SiO2 in a laboratory, and is equivalent to or lower than the deposition temperature of SixNy which is applied to passivation antireflection protective film layers in the industry.

Current commercial PERC cells are based on dielectric passivation film structures of back side alumina and back side silicon nitride, and front side silicon nitride. But due to the possible existence of-OH and-CH 3 groups in the alumina dielectric film layer, the annealing process can react with H in the SixNy: H lamination from the capping lamination during sintering without strict matching, thereby destroying the passivation effect of the lamination passivation film under the high-temperature condition of back-end sintering (> 860 ℃), thereby causing the reduction of electrical property and the generation of poor EL detection sheets; meanwhile, after the PERC battery is placed for a period of time, the residual secondary reactant is accumulated and accumulated to escape, so that the LID/LeTID phenomenon in the PERC battery is caused. The LeTID phenomenon is complicated in cause, further research is carried out by a plurality of research institutions such as SCHOTT, UNSW, university of Konstan, ISFH and Aalto university, the mainstream view at present considers that hydrogen is a main factor, and the attenuation caused by metal ions such as B-O/FeB and Cu in the raw materials is serious.

Therefore, the problems of easy damage of a passivation film layer, serious rear end attenuation and abnormal EL of the conventional industrial PERC solar cell generally exist; on the other hand, the double-sided PID phenomenon of the double-sided PERC + battery has a larger improvement space, the PID attenuation of the EVA-packaged double-sided PERC component can be reduced to a certain degree by matching the structural design of the dielectric passivation film with a component packaging material such as POE, and the improvement of the stability and the reliability of the PERC battery is becoming more important along with the requirements of the component and a system end on better CTM, light attenuation, heat-assisted light attenuation performance and PID resistance of the solar battery.

However, since the combination of the double-sided battery and the PID is a new product failure phenomenon appearing in recent years, the generation mechanism, the induction condition, the influence factor and the like of the original PID phenomenon are not clear and are limited by multiple factors, and the rear-end manufacturing cost is increased to a certain extent by matching the component packaging material, solar cell manufacturers are more inclined to reduce the PID failure phenomenon of the industrial PERC series solar cells through the structural design of the front-end dielectric film layer of the cell and the optimized combination of the process formula.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a compound dielectric passivation layer structure solar cell to solve the problem that proposes among the above-mentioned background art.

In order to achieve the above object, the utility model provides a following technical scheme:

a preparation process of a solar cell with a composite dielectric passivation layer structure,

preparing a P-type silicon substrate;

depositing an N-type emitting junction region, a silicon oxide film, a higher N-value silicon nitride or silicon oxynitride film and a low N-value silicon nitride film on the front surface of the P-type silicon substrate in sequence; depositing a silicon oxide film, an aluminum oxide film and a low n-value silicon nitride film on the back and the periphery in sequence to form a full-surface laminated composite dielectric passivation film layer;

and laser doping the front surface of the P-type silicon substrate with the laminated coating to form an N + + SE heavily doped region, and matching and printing an Ag positive electrode penetrating through the composite dielectric passivation film layer, and locally windowing the back surface to carry out electrode export.

Preferably, the method comprises the following steps of sequentially depositing a plurality of full-surface composite dielectric passivation film layers on the front surface, the back surface and the periphery of the P-type silicon substrate:

oxidizing and annealing silicon oxide deposition: adopting dry oxygen thermal oxidation, ozone oxidation, N₂0 oxidizing or oxidizing with nitric acid gas to form a silicon oxide film on the front, back and periphery of the P-type silicon substrate, and annealingIntroducing oxygen to fully cover and grow the surface of the P-type silicon substrate to form a 1.5-8nm full-surface silicon oxide film, wherein the refractive index n value is controlled to be 1.4-1.65;

aluminum oxide deposition: adopting any one forming process of ALD, PECVD, CVD deposition or PVD forming of a solid target material, generating a layer of full-surface aluminum oxide film with the thickness of 3-30nm on the front surface, the back surface and the periphery of the P-type silicon substrate, controlling the refractive index n value of the full-surface aluminum oxide film to be 1.58-1.76, and generating for 25-35min, and washing the aluminum oxide film which is diffracted to the front surface by wet chemical solution;

removing the aluminum oxide film on the front surface by adopting an online roller groove type device, performing acid washing by using dilute HCl with the concentration of 5% -20%, removing the aluminum oxide film generated on the front surface of the silicon oxide film, cleaning residual acid liquor on the surface by using DI water, and drying by using an air knife;

silicon nitride deposition: depositing a silicon nitride or silicon oxynitride film with a higher n value on the front surface of a P-type silicon substrate by adopting a tubular PECVD process, generating a layer of silicon nitride film with a low n value and covered on the whole surface on the front surface, the back surface and the periphery of the P-type silicon substrate, injecting ammonia gas and silane at the temperature of 360-480 ℃, adding laughing gas during depositing the silicon oxynitride film, and applying a radio-frequency electric field;

setting the refractive index n value of the silicon nitride or silicon oxynitride film with higher n value on the front surface to be controlled within 2.06-2.38, and controlling the film thickness to be 8-60 nm;

setting the refractive index n of the front low-n silicon nitride film to be 1.86-2.2 and the film thickness to be 12-72 nm;

setting the refractive index n value of the low n value silicon nitride film covered on the back surface and the whole peripheral surface to be controlled within 1.86-2.36, and controlling the film thickness to be 90-200 nm;

setting a silicon nitride or silicon oxynitride film with a higher n value on the front surface and a silicon nitride film with a lower n value on the front surface to adopt one-step coating, and adding laughing gas and then closing the laughing gas when depositing the silicon oxynitride film;

and setting the low n-value silicon nitride films on the front surface and the back surface to adopt the fractional film plating, wherein the order of the fractional film plating is that the front surface is plated and then the back surface is plated or the back surface is plated and then the front surface is plated, and vacuum breaking is needed in the fractional process, and the front surface is turned over after the wafer is taken.

Preferably, the preparing the P-type silicon substrate specifically includes:

s1, removing a damage layer, and making wool: cleaning and texturing the P-type silicon substrate, removing a damaged layer of 3-5 mu m on the surface of the P-type silicon substrate, and simultaneously making a textured surface on the front surface of the P-type silicon substrate;

s2, diffusion PN junction making: depositing a doping source on the surface of the P-type silicon substrate and performing thermal diffusion to prepare a P-N junction region, wherein the doping source is phosphorus oxychloride and oxygen, and the heating time is 30-60 minutes;

s3, laser SE doping: irradiating laser with the wavelength of 532nm on the diffused P-type silicon substrate to form a heavily doped region, wherein the area of the N + + SE heavily doped region accounts for 4.5% -8.5%;

s4, etching and back polishing: and sequentially carrying out etching, cleaning and back polishing treatment on the P-type silicon substrate, wherein the back polishing thickness is 3-8 um.

Preferably, laser grooving: locally slotting the back surface of the P-type silicon substrate of the laminated coating film by using ps or ns laser of 532nm-1064nm, wherein the slotting area accounts for 0.5-6%;

back electrode screen printing: screen printing Ag-Al or Ag back electrode on the back of the prepared P-type silicon substrate and drying;

and (3) screen printing of an aluminum back field: corresponding to the local back surface slotting region, carrying out screen printing aluminum slurry on a non-Ag-Al or Ag back electrode region on the back surface of the P-type silicon substrate and drying to form an Al back surface field, wherein the thickness of the Al back surface field is 10-30 mu m, and the distance between the Al back surface field and the edge is 0.8-1.6 mm;

positive electrode screen printing: and matching the N + + SE heavily-doped region on the front surface of the P-type silicon substrate, and screen-printing an Ag positive electrode penetrating through the composite passivation film layer and drying.

Preferably, the preparing of the P-type silicon substrate further includes:

if the P-type silicon substrate is a polycrystalline cell, acid texturing is adopted, the used solution is a mixed solution of nitric acid, hydrofluoric acid and water, and the ratio of nitric acid: hydrofluoric acid: water 2:1: 2-5: 1: 2;

if the P-type silicon substrate is a single crystal cell, alkali is adopted for texturing, and the proportioning solvent is NaOH or KOH, isopropanol, a single crystal silicon texturing additive and water.

Preferably, in step S2, the phosphorus oxychloride is carried by nitrogen, the nitrogen flow is 1000-2000sccm for 25-35 minutes, the oxygen flow is 1000-3000sccm for 40-55 minutes, and the temperature is controlled at 830-870 ℃.

Preferably, in step S3, the sheet resistance of the N + + SE heavily doped region is 50-90 Ω/□.

Preferably, in step S4, the back N-type layer is etched and removed by the mixed solution of HF, HNO3 and H2SO4 and the subsequent KOH/NaOH solution in the alkaline bath, and the front phosphorosilicate glass is removed, and the back surface of the P-type silicon substrate is polished by 3-8 μm.

Preferably, in the laser grooving step, the grooving pattern is any one of a line shape, a cross shape, a dash shape, a square shape, a diamond shape, and a hexagon shape.

A solar cell with a composite dielectric passivation layer structure is prepared by the preparation process and comprises a P-type silicon substrate, a full-surface deposited silicon oxide film, a higher n-value silicon nitride or silicon oxynitride film on the front surface, an aluminum oxide film on the back and periphery and a low n-value silicon nitride film covered on the full surface, wherein the silicon oxide film is sequentially coated outside the P-type silicon substrate;

an emission junction region is arranged on the upper side of the P-type silicon substrate, and an N + + SE heavily doped region is arranged between the emission junction region and the P-type silicon substrate;

the other side face of the P-type silicon substrate, which is provided with an emission junction area, is provided with a Local-BSF P + + area, the bottom of the low-n-value silicon nitride film is provided with an Al back field, the Al back field is provided with an electrode column, the electrode column sequentially penetrates through the low-n-value silicon nitride film, an aluminum oxide film on the back face and the periphery and a silicon oxide film on the whole surface, and the top of the electrode column is connected with the Local-BSF P + + area.

Preferably, one side of the P-type silicon substrate, which is provided with the N + + SE heavily-doped region, is provided with an Ag positive electrode penetrating through the composite dielectric passivation film layer, the Ag positive electrode sequentially penetrates through the low-N-value silicon nitride film, the higher-N-value silicon nitride film or the silicon oxynitride film and the silicon oxide film on the whole surface, and one end of the Ag positive electrode, which is close to the P-type silicon substrate, is connected with the emission junction region.

Preferably, an Ag-Al or Ag back electrode is arranged on the Al back field.

Preferably, the Local-BSF P + + region is composed of a plurality of spherical segments instead of pyramidal pits.

Compared with the prior art, the beneficial effects of the utility model are that:

the utility model can make the structure on the P-type monocrystalline silicon, P-type polycrystalline silicon and P-type monocrystalline silicon substrate doped with boron or gallium₂Aluminum oxide Al₂O₃Silicon oxynitride SiO_xN_yAnd silicon nitride Si of different n values_xN_yForming a multi-lamination composite structure as a dielectric passivation film layer, and forming a brand new composite dielectric passivation film lamination structure on the surface of a silicon wafer; the passivation of the dangling bonds on the surface of the silicon is realized by the thermal oxidation films on the front surface, the back surface and the whole peripheral surface, and the first layer of compact oxide layer SiO₂Contains a large amount of oxygen, has stable chemical properties, and can perform good chemical passivation on dangling bonds on the surface of the silicon wafer.

The second high-refractive-index dense silicon nitride or silicon oxynitride film layer on the front surface effectively prevents sodium ions, -OH and-CH₃The subsequent products of the radicals migrate to the interior of the battery, so that the mobile ions are prevented from moving and migrating under the action of an external electric field, temperature and humidity, the PID resistance effect is enhanced, and the PID resistance performance and the aging attenuation resistance performance are better; the growth and annealing temperature of the second aluminum oxide film on the back and the periphery are relatively low and are negatively charged, namely Al is subjected to high-temperature heat treatment₂O₃The octahedral structure of the medium aluminum atom is converted into a tetrahedral structure to generate interstitial oxygen atoms, and the interstitial oxygen atoms capture valence electrons in the P-type silicon to form a fixed negative charge, so that Al₂O₃The film shows electronegativity, an interface electric field pointing to the interior of the silicon wafer is generated at the interface, so that current carriers can rapidly escape from the interface, the interface recombination rate is reduced, the minority carrier lifetime of the silicon wafer is prolonged, and the P-type substrate can be subjected to field passivation.

The third layer is fully covered with a silicon nitride film layer Si_xN_yH comprehensive optical path matching achieves the best antireflection effect, and simultaneously can protect an adjacent aluminum oxide film, high-refractive-index silicon nitride or silicon oxynitride film to prevent excessive reaction corrosion of slurry; the layer after annealing has significant H passivation effect, and the other layerThe minority carrier lifetime of the silicon chip is improved, and Na +, -OH and-CH can be prevented to a certain extent₃The subsequent products of the radicals migrate to the interior of the battery, so that power attenuation caused by electric leakage of a battery assembly is avoided, the packaging assembly CTM is reduced by matching the film layers, the light attenuation performance and the heat-assisted light attenuation performance and the PID resistance performance of the battery are improved, the laminated composite dielectric passivation film deposition is adopted for the PERC structure, the comprehensive utilization rate of passivation and incident light can be effectively enhanced, the short-circuit current and the open-circuit voltage of the battery are increased, and the light attenuation resistance, the PID resistance stability and the reliability performance of the battery with the structure are improved.

1. Compared with the conventional BSF solar cell production process, the PERC solar cell production process of the utility model adds a plurality of layers of passivation films with different medium structures as a front passivation layer, a back passivation layer and an optical receiving layer, so that the recombination rate of the back surface can be greatly reduced, and the collection rate of photo-generated carriers can be improved; depositing thin silicon oxide SiO on the silicon substrate from inside to outside in sequence₂Aluminum oxide Al₂O₃Washing off the front alumina and depositing silicon nitride Si with higher n value_xN_yOr silicon oxynitride SiO_xN_yThen depositing silicon nitride Si with low n value on both sides_xN_yForming a brand new composite dielectric passivation layer laminated structure on the surface of a silicon wafer by taking the H laminated structure as a dielectric passivation film layer; by adopting the laminated dielectric passivation film for improving deposition on the PERC structure, the comprehensive utilization rate of passivation and incident light can be effectively enhanced, the short-circuit current and open-circuit voltage of the battery are increased, and the light attenuation resistance, PID (proportion integration differentiation) resistance stability and reliability performance of the battery with the structure are improved;

2. passivation of dangling bonds on the surface of silicon is achieved by thermal oxidation films on the front surface, the back surface and the whole peripheral surface, and Al directly contacting the surface of silicon is utilized in the related patent₂O₃The process of passivating dangling bonds by subsequent heat treatment of oxygen ions rich in the film is different essentially, and meanwhile, the first layer of compact oxide layer SiO is₂The silicon wafer also contains a certain amount of H, has good compactness and good stability, can well passivate dangling bonds on the surface of the silicon wafer, and improves the Voc;

3. in SiO₂On the basis of thin film passivation, the method is assistedThe high-refractive-index compact silicon nitride or silicon oxynitride film and the aluminum oxide film layer not only can enhance the passivation effect and improve the minority carrier lifetime, but also can prevent movable ions in the passivation layer from moving and migrating under the action of an external electric field, temperature and humidity, enhance the PID resistance effect, avoid power attenuation caused by electric leakage of different inversion layers generated by a battery assembly, and have better PID resistance and aging attenuation resistance;

4. finally, the fully-covered low-n-value silicon nitride film layers can be matched to achieve the best optical path difference to realize optical antireflection, adjacent film layers are protected to prevent the slurry from reacting and corroding excessive internal sections, the passivation effect is enhanced through H passivation during high-temperature sintering at the later stage, and the minority carrier lifetime and the open-circuit voltage of the battery are improved again; meanwhile, the subsequent products can be prevented from migrating into the battery to a certain degree, power attenuation caused by leakage of a battery assembly is avoided, the packaging assembly CTM is reduced by matching the film layers, and the light attenuation performance, the heat-assisted light attenuation performance and the PID resistance of the battery are improved;

5. matched silica SiO₂Aluminum oxide Al₂O₃High n value silicon nitride Si_xN_yOr silicon oxynitride SiO_xN_yAnd low n-value silicon nitride Si_xN_yH multi-lamination structure can reduce the front light reflection ratio, enhance the back light reflection ratio at the same time, ensure the utilization of both short-wave and long-wave band light, thereby enhancing the comprehensive utilization rate of incident light and increasing the short-circuit current of the battery;

6. the utility model discloses equipment and traditional solar cell equipment that well used are compatible more than 80%, do not need too much newly to increase equipment and drop into, and the technology transformation cost is lower, and the productivity is great, and the performance promotion advantage is showing, has very good industry application prospect.

The utility model discloses a back surface passivation layer of aluminium oxide, silicon oxynitride, different refracting index silicon nitride and laminated structure thereof has greatly reduced back surface recombination rate, improves the back reflectivity, reduces subassembly CTM simultaneously, improves battery light decay and heat-assisted light decay performance, anti PID performance; the passivation structure can be used as a P-type monocrystalline silicon substrate, a P-type polycrystalline silicon substrate and a P-type monocrystalline silicon substrate doped with boron or gallium, and can be compatible with passivation methods based on the passivation structure of the composite dielectric film for manufacturing PERC batteries, double-sided PERC + batteries, laminated PERC batteries and the like; the preparation process steps and sequence of the laminated structure, the corresponding preparation mode and the process parameter range can well finish the battery manufacture.

Drawings

Fig. 1 is a schematic structural view of a composite dielectric passivation layer solar cell of the present invention;

FIG. 2 is a schematic view of the preparation process of the present invention;

FIG. 3 is a schematic flow diagram of a conventional battery manufacturing process;

fig. 4 is a schematic view of the line-shaped grooving structure in the laser grooving of the present invention;

FIG. 5 is a schematic diagram of a cross-shaped structure in laser grooving according to the present invention;

FIG. 6 is a schematic view of the structure of the laser grooving of the present invention;

fig. 7 is a schematic view of the hexagonal slotting structure in laser slotting of the present invention;

fig. 8 is a schematic diagram of a square groove structure in the laser groove of the present invention;

fig. 9 is a schematic diagram of the structure of the diamond-shaped slot in the laser slot of the present invention.

In the figure: 1 low N-value silicon nitride film, 2 aluminum oxide film, 3 silicon oxide film, 4P type silicon substrate, 5Ag-Al or Ag back electrode, 6Ag positive electrode, 7Al back field, 8Local-BSF P + + region, 9 emitting junction region, 10N + + SE heavily doped region, 11 electrode column, 12 higher N-value silicon nitride or silicon oxynitride film, 13 segment without taper pit.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

Referring to fig. 1-9, the present invention provides a technical solution:

a solar cell with a composite dielectric passivation layer structure comprises a P-type silicon substrate 4 and an emission junction region 9 arranged on the upper side of the P-type silicon substrate 4, an N + + SE heavily doped region 10 is arranged between the emission junction region 9 and the P-type silicon substrate 4, a silicon oxide film 3 is wrapped on the P-type silicon substrate 4, a silicon nitride film or a silicon oxynitride film 12 with a higher N value is wrapped on the front side of the outer side of the silicon oxide film 3, an aluminum oxide film 2 is wrapped on the back side of the outer side of the silicon oxide film 3, and a silicon nitride film 1 with a lower N value on the whole surface is wrapped on the outer sides of the silicon nitride or silicon oxynitride film 12 with a higher N value and the aluminum oxide.

The other side surface of the P-type silicon substrate 4, which is provided with the emitting junction region 9, is provided with a Local-BSF P + + region 8, the bottom of the low n-value silicon nitride film 1 on the whole surface is provided with an Al back field 7, the Al back field 7 is provided with an Ag-Al or Ag-Al back electrode in the Ag back electrode 5, the Al back field 7 is provided with an electrode column 11, the electrode column 11 sequentially penetrates through the low n-value silicon nitride film 1 on the whole surface, the aluminum oxide film 2 on the back surface and the periphery and the silicon oxide film 3, the top of the electrode column 11 is connected with the Local-BSF P + + region 8, and the Local-BSF P + + region 8 is composed of a plurality of spherical segments instead of conical pits 13.

An Ag positive electrode 6 penetrating through the composite dielectric passivation film layer is arranged on one side, provided with the N + + SE heavily-doped region 10, of the P-type silicon substrate 4, the Ag positive electrode 6 sequentially penetrates through the low-N-value silicon nitride film 1, the high-N-value silicon nitride or silicon oxynitride film 12 and the silicon oxide film 3 on the whole surface, and one end, close to the P-type silicon substrate 4, of the Ag positive electrode 6 is connected with the emitting junction region 9.

A preparation process of a solar cell with a composite dielectric passivation layer structure comprises the following steps of sequentially depositing a silicon oxide film 3 and an aluminum oxide film 2 on the front surface, the back surface and the whole peripheral surface of a P-type silicon substrate, washing off the aluminum oxide film 2 on the front surface, depositing a silicon nitride or silicon oxynitride film 12 with a higher N value, depositing a silicon nitride film 1 with a lower N value on the two surfaces and the periphery to form a laminated composite dielectric passivation layer, forming an N + + SE heavily doped region 10 on the front surface by laser doping, and matching and printing an Ag positive electrode 6 penetrating through a passivation film layer and locally windowing the back surface for electrode derivation, wherein the specific steps are as follows:

s1, removing a damage layer, and making wool: the P-type silicon substrate 4 is cleaned and textured, a damaged layer 3-5um on the surface of the P-type silicon substrate 4 is removed, the recombination rate of photon-generated carriers is reduced, and meanwhile, a textured surface is formed on the front surface of the P-type silicon substrate 4 to reduce the reflectivity. If the P-type silicon substrate 4 is a polycrystalline silicon wafer, acid texturing is adopted, the used solution is a mixed solution of nitric acid, hydrofluoric acid and water, and the ratio of nitric acid: hydrofluoric acid: water 2:1: 2-5: 1: 2; if the P-type silicon substrate 4 is a monocrystalline silicon wafer, alkali texturing is adopted, a proportioning solvent is NaOH or KOH, isopropanol, a monocrystalline silicon texturing additive and water, the P-type silicon substrate 4 is subjected to three chemical reaction tanks and three rinsing tanks, namely a surface cleaning tank, a micro etching tank, an alkali texturing tank, a rinsing tank 1, an acid tank, a rinsing tank 2, an alkali rinsing tank, a rinsing tank 3, an acid tank and a rinsing tank 4, and then the P-type silicon substrate 4 is dried;

s2, diffusion PN junction making: depositing a doping source on the surface of the P-type silicon substrate 4 and carrying out thermal diffusion to prepare a P-N junction, wherein the doping source is phosphorus oxychloride and oxygen, the heating time is 30-60 minutes under the high-temperature diffusion condition, the phosphorus oxychloride is decomposed, and free phosphorus and oxygen enter the surface of a silicon wafer to form the P-N junction; free chlorine will form chlorine gas which is discharged as chlorine gas with excess oxygen, and during diffusion, POCl₃By using N₂Carry, general traffic carries N₂The flow rate is 1000-2000sccm, the time is about 30 minutes, and the POCl can be carried₃About 20g or so, O₂Controlling the flow at 1000-3000sccm for about 40-55 minutes, and controlling the temperature at 830-870 ℃;

s3, laser SE doping: irradiating laser with the wavelength of 532nm on the diffused P-type silicon substrate 4, and then carrying out doping diffusion on phosphorus atoms in the diffused surface phosphorosilicate glass in a local design region by using a laser local heating ablation technology, wherein the area percentage of the region is 4.5-8.5%, so that a selective low-sheet resistance doped emitter (SE) is formed on the surface of the P-type silicon substrate 4, and the sheet resistance is 50-90 omega/ロ after laser doping;

s4, etching and back polishing: because N-type layers are formed on the front and back surfaces of the P-type silicon substrate 4 in the diffusion process and phosphorosilicate glass is arranged on the surface of the P-type silicon substrate, the process mainly comprises the steps of HF and HNO₃And H₂SO₄The mixed solution and KOH/NaOH solution in the subsequent alkali tank corrode and remove the N-type layer on the back surface, andremoving the phosphorosilicate glass on the front side, wherein the P-type silicon substrate 4 sequentially enters three chemical reaction tanks, namely an acid etching tank, an alkali tank and a pickling tank for chemical reaction, and then the P-type silicon substrate 4 is dried to remove a back PN junction, a peripheral PN junction and a phosphorosilicate glass layer; 3-8um polishing treatment is carried out on the back surface of the P-type silicon substrate 4 to form a mirror surface structure, so that the back light reflectivity is improved;

s5, oxidizing and annealing silicon oxide deposition: the silicon oxide film 3 is deposited by thin oxidation on the front, back and periphery of the P-type silicon substrate 4 by a method such as dry-oxide thermal oxidation, ozone oxidation, N₂O oxidation and nitric acid gas oxidation. The thin oxidation annealing process is preferably selected, the phosphorus content on the surface of the P-type silicon substrate 4 is constant after the process, the surface concentration of phosphorus is higher, the higher phosphorus can aggravate minority carrier recombination and has adverse effect on the conversion efficiency of the battery, the unactivated phosphorus can be further activated by the annealing process to reduce the surface concentration of phosphorus, so that the minority carrier surface recombination is reduced, the conversion efficiency of the battery is improved, in addition, a proper amount of oxygen is introduced in the annealing process to form a compact 1.5-8nm full-surface covering type oxide layer (SiO) on the surface of a silicon wafer₂H) is contained, the refractive index of the silicon wafer is controlled to be 1.45-1.65, and dangling bonds on the surface of the silicon wafer can be well passivated: due to SiO₂The silicon-based composite material has better matching property with Si, and can effectively reduce the interface state density of the Si surface, thereby increasing the chemical passivation effect; SiO2₂Si in (1) is a tetrahedral structure, while Al is₂O₃The source of the negative surface charge is AlO in a tetrahedral configuration₄ ^-，SiO₂The presence of (A) facilitates the formation of a high negative charge density alumina layer, thereby increasing Al₂O₃The field passivation effect of (2);

s6, depositing aluminum oxide: the aluminum oxide film 2, i.e., the second high-density passivation film, may be formed by deposition using an Atomic Layer Deposition (ALD) method, PECVD, CVD, or deposition of a solid target material by PVD, using an aluminum-containing precursor (typically aluminum precursor aluminum trichloride, trimethylaluminum, triethylaluminum, dimethylaluminum chloride, aluminum ethoxide, aluminum isopropoxide). The silicon wafer surface passivation agent has the function of containing a large amount of fixed negative charges, and can perform chemical passivation on dangling bonds on the surface of a silicon wafer and also has a field passivation effect. Preferably growing an alumina film 2 layer with the thickness of 3-8nm in a 230-280 ℃ gas phase chemical deposition ALD mode, wherein the refractive index is 1.58-1.73, the reaction time is 25-35min, and the alumina film grows on the front surface and the back surface of the silicon wafer in a one-level atomic layer level, so that the silicon wafer has better step coverage for different surface relief morphologies;

s7, removing front alumina: the aluminum oxide film 2 formed by atomic layer growth and wound on the front surface of the P-type silicon substrate 4 is cleaned and removed by using a wet chemical solution, HCl and Al₂O₃SiO which reacts more stably with chemical properties₂Non-reactive, equipment such as RENA, SCHMID and RCT can implement the process. Soaking the aluminum oxide film 2 on the front side of the P-type silicon substrate 4 on an online roller groove type device, removing the single side of the P-type silicon substrate 4 in a mode of rinsing on water or carrying liquid on a roller, sequentially enabling the P-type silicon substrate 4 to enter a pickling tank for pickling by using dilute HCl with the concentration of 5% -20%, cleaning the surface of the P-type silicon substrate with DI water in a rinsing tank to remove residual acid liquid, carrying out chemical reaction in the two chemical reaction tanks, and drying the P-type silicon substrate 4 to remove the redundant aluminum oxide film 2 with the length of 3-8nm on the front side;

s8, silicon nitride deposition: the anti-reflection protective film layer is evaporated on the front and back surfaces of the silicon wafer, PECVD silicon nitride film is recommended to be used as a capping layer and an optical anti-reflection and anti-reflection function layer (both CVD and PVD can be made), other materials with large refractive index, compatibility with silicon processing technology and good interface characteristic with silicon can be adopted, and visible light transparent dielectric materials can be adopted, including but not limited to TiO₂、SiN_xC_yOr SiN_xO_yAnd as an alternative, applying a radio frequency electric field to injected ammonia gas and silane gas to ionize the gas and generate plasma under the environment of 360-480 ℃ low pressure by PECVD plating a low n-value silicon nitride film 1 on the front surface and the back surface, colliding high-energy particle flow to the reaction gas adsorbed on the surface of the silicon wafer to break the bonding bonds of the reaction gas to form active substances, and reacting the active substances to form SiN_x: h film is arranged on the surface of the silicon chip, thereby achieving the expected sealing cover protection and optical effect. The refractive index of the silicon nitride or silicon oxynitride film 12 with higher n value on the front surface is controlled to be 2.06-2.38, and the film thickness is controlled to be 8-60 nm; the refractive index of the front low n value silicon nitride film 1 is controlled to be 1.86-22, controlling the film thickness to be 12-72 nm; the refractive index of the silicon nitride film 1 with low n value covered on the back surface and the whole peripheral surface is controlled to be 1.86-2.36, and the film thickness is controlled to be 90-200 nm;

preferably, tubular PECVD is adopted, the silicon nitride or silicon oxynitride film 12 with higher n value on the front surface and the silicon nitride film 1 with lower n value on the front surface adopt one-time coating, the front surface and the back surface are coated with films in times (turning over after breaking vacuum and taking a piece in the time course), and the coating sequence of the front surface and the back surface can be changed;

the high refractive index dense silicon nitride or silicon oxynitride film is effective in blocking sodium ions, -OH and-CH₃The subsequent products of the radicals migrate to the interior of the battery, so that power attenuation caused by electric leakage of a battery assembly is avoided, and the low-n-value silicon nitride film 1 prevents mobile ions in the passivation layer from moving and migrating under the action of an external electric field, temperature and humidity to a certain extent, so that the anti-PID effect is enhanced;

s9, laser grooving: because the laminated film formed by the process is a compact insulating medium film layer, the front silver paste matched properly at present can penetrate through but the back aluminum paste cannot be directly fired through, so that a back P + contact region cannot be formed and current can not be led out from the back of the silicon wafer. Local slotting is carried out on the back surface of the p-type silicon substrate 4 of the laminated coating film through ps or ns laser with the wavelength of 532-1064nm, the slotting area accounts for 0.5-6%, the slotting pattern comprises but is not limited to one of a line shape, a cross shape, a broken line shape, a square shape, a diamond shape and a hexagon shape, the local laminated film is removed, so as to form an Al back field 7 in the local area and lead out the current, as shown in the attached figure 1 of the specification, and an electrode of the battery is formed;

s10, screen printing of a back electrode: the back of the solar cell prepared by the process is screen-printed with Ag-Al or Ag back electrode 5 and dried, which is consistent with the conventional BSF process;

s11, aluminum back surface field screen printing: matching the laser grooving pattern alignment in the process step S9, screen-printing thick film aluminum paste in a non-Ag-Al or Ag back electrode 5 area on the back surface, and drying to obtain an Al back surface field 7 with the thickness of 10-30um and the distance from the edge of 0.8-1.6 mm;

s12, positive electrode screen printing: the special Ag paste is screen-printed on the front surface of the solar cell prepared by the process, the components are inconsistent with the conventional components, the N + + SE heavily-doped region 10 is matched on the front surface of the P-type silicon substrate 4, the Ag paste positive electrode 6 penetrating through the composite passivation film layer is screen-printed and dried, and the screen-printing process consistent with the conventional process is adopted;

s13, sintering: removing organic matters, inorganic binders and a small amount of moisture, and annealing and sintering to form good ohmic contact: the printed battery is rapidly dried, sintered and annealed at high temperature (IR heating 180-900 ℃), so that the Ag positive electrode 6 on the front side penetrates through the laminated film to form ohmic contact with the emission junction region 9, the aluminum paste on the back side is in melting contact with the P-type silicon substrate 4 to form a P + back electric field, and the back electric field can prevent minority carriers from diffusing to the back surface to participate in compounding, so that the compounding loss of the back surface is reduced, and the open voltage and the current density of the battery are further increased;

s14, LID light decay: reduction of cell light attenuation (LID) by light attenuation furnace or electrical injection furnace: under the condition of strong illumination, the furnace tube is heated to more than 180 ℃, the furnace entering processing time is more than or equal to 2min, so that boron and oxygen atoms are combined into a stable state, defect trapping minority carriers are not generated any more, the LID loss of the PERC cell is about 3-6% under the condition that the PERC cell is not processed, and the LID loss can be reduced to less than 2.5% after the PERC cell is processed by an LID furnace process;

s15, I-V test: and designing a test grading program by combining the optimal working voltage, the optimal working current, the maximum power, the conversion efficiency, the open-circuit voltage, the short-circuit current, the filling factor and the like of the PERC battery, and measuring and grading the performance parameters of the battery after the process manufacturing by using an accurate test instrument.

The first embodiment is as follows:

the utility model comprises the following specific steps:

(1) removing a mechanical damage layer 4um on the surface of a monocrystalline P-type silicon substrate 4 by using a NaOH solution with the concentration of 40g/L, cleaning the surface of a silicon wafer, and performing anisotropic corrosion on the surface of the silicon wafer by using 18g/L of NaOH solution to form 2-3um inverted pyramid suede texturing;

(2) in the diffusion furnace tube, POCl is adopted₃Performing negative pressure diffusion on a liquid source to form a P-N junction, wherein the diffusion temperature is 830 ℃, the process time is 55min, and the diffusion square resistance is controlled at 130-150ohm/ロ;

(3) laser SE doping: on the diffused silicon chip, carrying out laser doping on phosphorus atoms on the diffused surface phosphorosilicate glass for 5.6 percent in the areas of a main grid electrode and a fine grid electrode which are subsequently subjected to screen printing by laser to form a local heavily doped area, wherein the square resistance of the heavily diffused area is 70-80ohm/ロ;

(4) HF is adopted: HNO₃35 g/L: 350g/L, and the volumes of the components are respectively HF: 55.26L, HNO₃: 214.78L, DI water: 173.80L, H₂SO₄: 80L, cleaning a back junction by using a mixed solution with the liquid flow rate of 30L/min and the reaction temperature of 6-8 ℃ in a reaction tank, polishing the back surface of the silicon wafer by 6um to form a mirror surface structure and remove peripheral PN junctions, neutralizing acid and removing porous silicon by using an alkali tank (the KOH concentration is 5 percent), and cleaning phosphorosilicate glass by using a mixed solution of HCl, HF (the concentration is 5 percent) and DI water;

(5) introducing dry oxygen into an annealing oxidation furnace to generate a thin silicon oxide film 3 on the front surface, the back surface and the periphery of the silicon wafer, wherein the thickness of the silicon oxide is 3nm, and the refractive index: 1.48;

(6) introducing trimethylaluminum into an ALD deposition furnace at 250 ℃, adsorbing and reacting with OH groups on the surface of the silicon wafer, and generating an aluminum oxide film 2 with the thickness of 5 +/-1 nm;

(7) on SCHMID equipment, in a roller liquid carrying mode, 10% diluted HCl is sprayed on an alumina film 2 on the front surface of a P-type silicon substrate 4 to react for 17min to remove, and then DI water is used for cleaning residual acid liquor on the surface and drying;

(8) PECVD deposited back low n-value silicon nitride film 1: by Silane (SiH) in a low pressure 450 ℃ chamber₄) And NH₃(ammonia gas) is deposited on the back surface and the periphery of the silicon wafer through ionization reaction, and the silicon nitride film 1 prepared by PECVD has the thickness of 135nm and the refractive index of: 2.16;

(9) PECVD deposits a front low n-value silicon nitride film 1 and a higher n-value silicon nitride or silicon oxynitride film 12: by Silane (SiH) in a low pressure 430 ℃ chamber₄) And NH₃(ammonia) is deposited on the front surface of the silicon wafer through ionization reaction, the thickness of the silicon nitride film 12 with a higher n value prepared by PECVD is 35nm, and the refractive index n is as follows: 2.18 of; the thickness of the low n value silicon nitride film 1 prepared by PECVD is 45nm, and the refractive index is as follows: 2.14 of;

(10) adopting a 532nm ns laser to perform local grooving on the back surface of the P-type silicon substrate 4 of the laminated coating, wherein the grooving area accounts for 3.2 percent, and the grooving graph is a dotted line graph with the real-virtual ratio of 85 percent;

(11) drying the screen-printed back Ag-Al back electrode at 200 ℃; then screen-printing back Al slurry, drying the aluminum slurry at 210 ℃, wherein the thickness of the film is 23um and the distance between the film and the edge is 1.0 mm;

(12) turning over the cell, screen-printing a main grid and an auxiliary grid of the Ag positive electrode 6, and drying at 220 ℃;

(13) after the cell piece is conveyed to a sintering furnace, organic matters, inorganic binders and a small amount of moisture in the slurry are volatilized and discharged, the rapid drying, sintering and annealing are carried out in the sintering furnace at the peak value of 890 ℃, the front electrode and the back electrode form good ohmic contact after one-time sintering, and the I-V characteristic is tested;

(14) the cell passes through a light attenuation furnace, and a strong halogen lamp (0.8Sun) is used for illumination in a temperature region of 230 ℃, so that the light-induced attenuation (LID) of the cell is reduced;

(15) and (4) carrying out I-V test and sorting on the solar cells.

Example two:

the utility model comprises the following specific steps:

(1) removing 3.5um of a mechanical damage layer on the surface of a single crystal P type silicon substrate 4 by using NaOH solution with the concentration of 30g/L, cleaning the surface of a silicon wafer, and carrying out anisotropic corrosion on the surface of the silicon wafer by using 20g/L of NaOH solution to form 3-4um inverted pyramid suede texturing;

(2) in the diffusion furnace tube, POCl is adopted₃Performing negative pressure diffusion on a liquid source to form a P-N junction, wherein the diffusion temperature is 850 ℃, the process time is 45min, and the diffusion square resistance is controlled at 140-170ohm/ロ;

(3) laser SE doping: on the diffused P-type silicon substrate 4, carrying out laser doping on phosphorus atoms on the diffused surface phosphorosilicate glass by 5.2% in the areas of a main grid electrode and a fine grid electrode which are subsequently subjected to screen printing through laser to form a local heavily doped area, wherein the square resistance of the heavily diffused area is 60-70ohm/ロ;

(4) HF is adopted: HNO₃30 g/L: 330g/L, and the volumes of the components are respectively HF: 45.58L, HNO₃: 184.16L, DI water: 183.50L, H₂SO₄: 70L, cleaning a back junction by using a mixed solution with the liquid flow rate of 32L/min and the reaction temperature of 6-8 ℃ in a reaction tank, polishing the back surface of the P-type silicon substrate 4 by 4.5um to form a mirror structure and remove peripheral PN junctions, neutralizing acid by using an alkali tank (the NaOH concentration is 6 percent) and removing porous silicon, cleaning phosphorosilicate glass by using a mixed solution of HCl, HF (the concentration is 5 percent) and DI-water, and then carrying out hot air drying;

(5) generating a layer of SiO with the thickness of 1.5nm on the back of the P-type silicon substrate 4 by adopting an ozone machine₂And then the silicon substrate enters an annealing oxidation furnace, dry oxygen is introduced into the annealing oxidation furnace to generate a thin silicon oxide film 3 on the front surface, the back surface and the periphery of the P-type silicon substrate 4, the thickness of the silicon oxide film 3 is 3.5nm, and the refractive index: 1.52, the thickness of the front and peripheral silicon oxide films 3 is 3.5nm, but the total thickness of the silicon oxide films 3 on the back is 5.0 nm;

(6) introducing trimethylaluminum into an ALD deposition furnace at 230 ℃, adsorbing and reacting with OH groups on the surface of the silicon wafer, and generating an aluminum oxide film 2 with the thickness of 3-5 nm;

(7) adsorbing 15% diluted HCl onto the alumina film 2 on the front surface of the P-type silicon substrate 4 in a water floating mode on RENA equipment for reaction for 12min to remove, then cleaning residual acid liquor on the surface by using DI water and drying;

(8) PECVD deposits a front low n-value silicon nitride film 1 and a higher n-value silicon nitride or silicon oxynitride film: by Silane (SiH) in a low pressure 440 ℃ chamber₄)、NH₃(Ammonia gas) and N₂0 (laughing gas) is deposited on the front surface of the silicon wafer through ionization reaction, the thickness of the silicon oxynitride film 12 with a higher n value prepared by PECVD is 20nm, and the refractive index n is as follows: 2.15 of; by Silane (SiH) in a low pressure 430 ℃ chamber₄) And NH₃(ammonia gas) is deposited on the front surface of the silicon wafer through ionization reaction, the thickness of the low n value silicon nitride film 1 prepared by PECVD is 58nm, and the refractive index is as follows: 2.11;

(9) PECVD deposited back low n-value silicon nitride film 1: by Silane (SiH) in a low pressure 460 ℃ chamber₄) And NH₃(ammonia gas) is deposited on the back surface and the periphery of the silicon wafer through ionization reaction, and the silicon nitride film 1 prepared by PECVD has the thickness of 150nm and the refractive index of: 2.12;

(10) carrying out local grooving on the back surface of the P-type silicon substrate 4 coated with the laminated film by adopting a 1064nm ps laser, wherein the grooving area accounts for 2.8 percent, and the grooving pattern is a continuous linear pattern;

(11) drying the screen-printed back Ag back electrode at 210 ℃; then screen-printing back Al slurry, drying the aluminum slurry at 210 ℃, wherein the thickness of the film is 20um and the distance between the film and the edge is 1.5 mm;

(12) turning over the cell, screen-printing a main grid and an auxiliary grid of the Ag positive electrode 6, and drying at 220 ℃;

(13) after the P-type silicon substrate 4 is conveyed through a sintering furnace, organic substances, inorganic binders and a small amount of moisture in the slurry are volatilized and discharged, the rapid drying sintering and annealing are carried out in the sintering furnace at the peak value of 900 ℃, the front electrode and the back electrode form good ohmic contact after one-time sintering, and the I-V characteristic is tested;

(14) the cell slice is treated with 1800 plus 2400s auxiliary illumination in the temperature range of 170 plus 200 ℃ under the condition that the injection current is 3.5-4A by an electric injection device, so that the Light Induced Degradation (LID) of the cell is reduced;

(15) and (4) carrying out I-V test and sorting on the solar cells.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims (4)

1. A solar cell with a composite dielectric passivation layer structure is characterized in that: the silicon nitride film comprises a P-type silicon substrate (4), a full-surface deposited silicon oxide film (3) which is coated outside the P-type silicon substrate (4) in sequence, a higher n-value silicon nitride or silicon oxynitride film (12) on the front surface, a back surface and peripheral aluminum oxide film (2) and a low n-value silicon nitride film (1) which is covered on the full surface;

an emitting junction region (9) is arranged on the upper side of the P-type silicon substrate (4), and an N + + SE heavily doped region (10) is arranged between the emitting junction region (9) and the P-type silicon substrate (4);

another side that P type silicon substrate (4) was provided with emission junction region (9) is provided with Local-BSF P + + district (8), the bottom of low n value silicon nitride membrane (1) is provided with Al back field (7), Al back field (7) are provided with electrode column (11), low n value silicon nitride membrane (1), back and peripheral aluminium oxide membrane (2), the silicon oxide membrane (3) of full surface are passed in proper order in electrode column (11), the top and the Local-BSF P + + district (8) of electrode column (11) are connected.

2. The composite dielectric passivation layer structure solar cell of claim 1, wherein: one side of the P-type silicon substrate (4) provided with the N + + SE heavily-doped region (10) is provided with an Ag positive electrode (6) penetrating through the composite dielectric passivation film layer, the Ag positive electrode (6) sequentially penetrates through the low-N-value silicon nitride film (1), the higher-N-value silicon nitride or silicon oxynitride film (12) and the silicon oxide film (3) on the whole surface, and one end, close to the P-type silicon substrate (4), of the Ag positive electrode (6) is connected with the emitting junction region (9).

3. The composite dielectric passivation layer structure solar cell of claim 1, wherein: an Ag-Al or Ag back electrode (5) is arranged on the Al back field (7).

4. The composite dielectric passivation layer structure solar cell of claim 1, wherein: the Local-BSF P + + region (8) is composed of a plurality of spherical segments instead of conical pits (13).

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