CN210082676U

CN210082676U - Consumable chip, ink containing structure and ink box

Info

Publication number: CN210082676U
Application number: CN201920640894.9U
Authority: CN
Inventors: 龚明
Original assignee: Apex Microelectronics Co Ltd
Current assignee: Jihai Microelectronics Co ltd
Priority date: 2019-05-06
Filing date: 2019-05-06
Publication date: 2020-02-18
Anticipated expiration: 2029-05-06

Abstract

The embodiment of the application provides a consumptive material chip, ink containing structure and ink horn, and the consumptive material chip includes memory and interface circuit of electricity connection each other, and the memory storage has ink containing structure's ink consumption information, and interface circuit is used for and printer communication connection for the printer can read this ink consumption information from the memory through interface circuit. The interface circuit includes an ID terminal and at least two terminal groups different from the ID terminal, the at least two terminal groups are respectively applied with voltage signals with different magnitudes, and the connecting terminals of the at least two terminal groups are arranged to have positive correlation with the distance between the ID terminals and the magnitude of the applied voltage signal. Therefore, the interference of the high-level signal to the ID terminal can be reduced, and the accuracy of the signal transmitted by the ID terminal can be improved.

Description

Consumable chip, ink containing structure and ink box

Technical Field

The application relates to the technical field of printing and imaging, in particular to a consumable chip, an ink accommodating structure and an ink box.

Background

Imaging devices (e.g., printers) typically have replaceable components that provide them with printing material, such as ink cartridges or toner cartridges that are mounted to the printer. The ink box (also called as a head ink box) with a printing head structure comprises a nozzle circuit arranged on the side surface of an ink box body, and when the head ink box is installed on a printer, the nozzle circuit can regularly jet ink according to a control signal sent by the printer.

In the related art, in order to facilitate recycling of the above-mentioned ink cartridge with a head, the ink containing structure of the ink cartridge with a head is usually configured to be replaceable, so that when the ink in the ink containing structure is exhausted, a user can replace the new ink containing structure to continue to use other devices such as a head circuit in the ink cartridge with a head, thereby avoiding waste of resources.

However, there are still drawbacks to the way of recovering the headed cartridges by replacing the ink containing structure.

SUMMERY OF THE UTILITY MODEL

In order to overcome the above-mentioned deficiencies in the prior art at least in part, the present application aims to provide a consumable chip, an ink containing structure and an ink cartridge, which improve the accuracy of signals transmitted by an ID terminal.

In order to achieve the above purpose, the embodiment of the present application adopts the following technical solutions:

in a first aspect, an embodiment of the present application provides a consumable chip for mounting on a replaceable ink containment structure, the consumable chip including a memory and an interface circuit electrically connected to each other;

the memory stores ink consumption information of the ink containing structure; the interface circuit is used for being in communication connection with a printer so that the printer can read the ink consumption information from the memory;

the interface circuit includes an ID terminal and at least two terminal groups different from the ID terminal, to which voltage signals different in magnitude are applied, respectively, the at least two terminal groups being provided so that a distance between the ID terminals is positively correlated with the magnitude of the applied voltage signal.

In a second aspect, the present application provides an ink containing structure for replaceably mounting to an ink cartridge, the ink containing structure being provided with the consumable chip provided by the present application.

In a third aspect, embodiments of the present application provide an ink cartridge mounted with the ink containing structure provided in the second aspect of the embodiments of the present application.

Compare in prior art, the utility model provides a consumable chip, ink containment structure and ink horn, in the consumable chip, the distance between two at least terminal groups of interface circuit and the ID terminal is positive correlation with the size of the voltage signal that is applyed to reduce the interference of high level signal to the ID terminal, improved the degree of accuracy of the signal of ID terminal transmission.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.

FIG. 1 is a schematic structural view of an ink cartridge provided in an embodiment of the present application;

FIG. 2 is a schematic connection diagram of a consumable chip according to an embodiment of the present disclosure;

fig. 3 is a schematic connection diagram of an RC switching circuit, a memory and an ID terminal according to an embodiment of the present disclosure;

fig. 4 is a schematic terminal arrangement diagram of a consumable chip according to an embodiment of the present disclosure;

fig. 5 is a schematic diagram of another terminal arrangement of a consumable chip according to an embodiment of the present disclosure.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.

Research shows that the following defects exist in the recovery of the head cartridge by replacing the ink containing structure: the ink consumption information of the ink cartridge with the head is usually recorded in the head circuit, and when the user runs out of ink in the original ink containing structure of the ink cartridge with the head, the ink containing structure is replaced with a new one, and the ink consumption information recorded in the head circuit of the ink cartridge with the head does not conform to the new ink containing structure.

As shown in fig. 1, in order to improve the above problem, the present embodiment provides an ink cartridge 10, which includes a main body 11, a head circuit 12, and an ink containing structure (also called an ink containing chamber or an ink bag) 13. The body 11 has a receiving portion in which the ink receiving structure 13 is replaceably or detachably mounted. The head circuit 12 is attached to the body 11 and communicates with a fluid passage inside the body 11, along which ink in the ink containing structure 13 can be delivered to the head circuit 11, so that the head circuit 11 can regularly eject the delivered ink under the control of the printer, thereby forming an image.

In the replaceable ink containing structure 13 provided in the present embodiment, a consumable chip 100 for storing ink consumption information thereof is provided. When the ink in the ink containing structure 13 of the ink cartridge 10 is exhausted, it can be replaced with a new ink containing structure 13. At this time, the printer in which the ink cartridge 10 is installed can read the ink consumption information from the consumable chip 100 of the new ink containing structure 13. In other words, the above design can ensure that after the ink containing structure of the cartridge with the head is replaced, the ink consumption information read by the printer from the cartridge with the head is consistent with the actual condition of the replaced ink containing structure.

On the basis of the above improvement, the present embodiment improves the structure of the consumable chip disposed in the replaceable ink containing structure, so that the consumable chip has better electrical characteristics.

Referring to fig. 2, fig. 2 is a schematic connection diagram of a consumable chip 100 according to an embodiment of the present disclosure. The consumable chip 100 includes a memory 110 and an interface circuit 120, and the memory 110 and the interface circuit 120 are electrically connected to each other.

The memory 110 stores ink consumption information of the ink containing structure 13 where the consumable chip 100 is located, the ink consumption information refers to any information that changes with replacement of the ink containing structure, for example, but not limited to, ink amount information, ink model information, printable page number information, sequence information, region code information, and the like in the ink containing structure 13.

The interface circuit 120 is used to establish a communication connection with a printer so that the printer can read the ink consumption information from the memory 110, and the printer can perform signal control on the consumable chip 100 through the interface circuit 120, perform read/write operations on the memory 110, and the like. It is noted that the interface circuit 120 may be indirectly electrically connected to the printer, for example, when the ink cartridge 10 is installed in the printer, the printer may be electrically connected to the interface circuit on the body 11 of the ink cartridge 10, and the interface circuit may be electrically connected to the interface circuit 120 of the ink containing structure 13, so as to indirectly electrically connect the printer to the interface circuit 120.

In this embodiment, the interface circuit 120 includes a plurality of connection terminals, one of which is an ID terminal, and the rest of the connection terminals may be divided into at least two terminal groups, each of which includes at least one connection terminal.

In the present embodiment, each connection terminal of the interface circuit 120 may be a contact of a concave structure or a convex structure. Taking one connection terminal x as an example, if the terminal on the body 11 for connecting with the connection terminal x is a concave structure, the connection terminal x may be a convex structure; if the terminal on the body 11 for contacting with the connection terminal x is a convex structure, the connection terminal x may be a concave structure. Thus, the interface circuit 120 and the terminal on the body 11 can be contacted more firmly and firmly.

The consumable chip 100 may further include an RC switching circuit, and the ID terminal 121 is electrically connected to the RC switching circuit, and is configured to output a preset current signal to at least one switching branch of the RC switching circuit, so that a resistor of the switching branch has a corresponding terminal voltage.

Referring to fig. 3, a schematic diagram of a connection relationship between the RC switching circuit 31 and the memory 110 and the ID terminal is exemplarily shown. The RC switching circuit 31 is connected in series with the memory 110.

In detail, the RC switching circuit 31 includes a logic control circuit 31a and a plurality of switching branches, such as 31b, 31c, 31d, and 31e in fig. 4. The switching branches are connected in parallel between the ground terminal and the ID terminal 121, in other words, one end of each switching branch is connected to the ID terminal 121, and the other end is grounded.

Each switching branch comprises a switching device and a resistor which are mutually connected in series, or comprises a switching device, a resistor and a capacitor which are mutually connected in series. For example, the switching branch 31b includes a resistor R1 and a switching device K1 connected in series, the switching branch 31C includes a resistor R2, a capacitor C1 and a switching device K2 connected in series, the switching branch 31d includes a resistor R3 and a switching device K3 connected in series, and the switching branch 31e includes a resistor R4, a capacitor C2 and a switching device K4 connected in series.

In this embodiment, the switching devices of the switching branches each have a control end, and the control ends of the switching devices of the switching branches are respectively connected to the logic control circuit 31 a. When the printer pre-reads data, the printer inputs an address signal and a preset current signal, which is typically 1mA in size, to the interface circuit 120 of the consumable chip 100 through the ID terminal 121 of the interface circuit 120.

The logic control circuit 31a may determine, according to the address signal, an address bit indicated by the address signal from the memory 110, and control, according to data on the address bit, a switching device of at least one switching branch of the switching branches to be closed, that is, control the at least one switching branch to be turned on.

In the above case, the preset current signal (for example, ID _ out shown in fig. 4) input through the ID terminal 121 is applied to the resistor of the at least one switching branch that is turned on, so that the resistor of the at least one switching branch has a corresponding terminal voltage, and the terminal voltage of the resistor of the at least one switching branch is the data signal transmitted to the printer. Specifically, the terminal voltage of one resistor may be used to indicate one bit (bit) in the data stored in the address bit, and in detail, when the terminal voltage of the resistor is at a high level (e.g., 15V, 6V or other corresponding voltage range, e.g., 5.5V to 7.0V), the corresponding one-bit data is 1, and when the terminal voltage of the resistor is at a low level (e.g., 3V or other corresponding voltage range, e.g., 3V to 3.6V), the corresponding one-bit data is 0.

It can be seen that the preset current signal transmitted by the ID terminal 121 needs to be as accurate as possible to ensure the accuracy of the data signal transmitted to the printer.

However, it has been found through research that a voltage difference between a terminal for transmitting a high-level signal and the ID terminal 121 may cause non-contact electromagnetic interference, thereby causing a glitch in the signal transmitted by the ID terminal 121, which affects the accuracy of the signal transmitted by the ID terminal 121.

In order to at least partially improve the above problem, the present embodiment improves the terminal arrangement manner of the interface circuit of the consumable chip.

It should be noted that the defects existing in the above solutions are the results obtained after the inventor has practiced and studied carefully, and therefore, the discovery process of the above problems and the solutions proposed by the following embodiments of the present application to the above problems should be the contribution of the inventor to the present application in the course of the invention.

Referring to fig. 4, fig. 4 schematically illustrates a terminal arrangement of the interface circuit 120.

The plurality of connection terminals of the interface circuit 120 may be divided into the ID terminal 121 and at least two different terminal groups different from the ID terminal, for example, G1, G2, and G3 in fig. 4. Wherein each terminal group includes at least one connection terminal, for example, terminal group G1 includes 4 connection terminals 122, terminal group G2 includes 4 connection terminals 123, and terminal group G3 includes 1 connection terminal 124.

Wherein the at least two terminal groups are applied with voltage signals with different magnitudes respectively. Specifically, voltage signals of the same magnitude are applied to the connection terminals in each terminal group, and voltage signals of different magnitudes are applied to the connection terminals in different terminal groups. The distance between the at least two terminal groups and the ID terminal is positively correlated with the magnitude of the applied voltage signal. It is worth noting that "magnitude" as described herein may refer to a voltage signal magnitude or an effective value.

For example, assuming that the magnitude of the voltage signal applied to each connection terminal 122 in the terminal group G1 is 15V, the magnitude of the voltage signal applied to each connection terminal 123 in the terminal group G2 is 9V, and the magnitude of the voltage signal applied to the connection terminal 124 in the terminal group G3 is 0V, if the distance between the connection terminal 122 and the ID terminal 121 in the terminal group G1 is d2, the distance d3 between the connection terminal 123 and the ID terminal 121 in the terminal group G2 is smaller than d2, and the distance d4 between the connection terminal 124 and the ID terminal 121 in the terminal group G3 is smaller than d 3.

Alternatively, the at least two terminal groups may be sequentially spaced in the preset direction in order of magnitude of the applied voltage signal, and the ID terminal 121 may be disposed between two terminal groups to which the applied voltage signal is the smallest, for example, between the terminal group G2 and the terminal group G3 in the above example. The reason why the ID terminal is not disposed at the end-most portion is that the risk that the end-most terminal may be contaminated by the external environment is higher, for example, ink droplets or dust are more likely to contact the end-most terminal, which is likely to cause a short circuit of the terminal. The preset direction may be a direction from any side of the consumable chip 100 to an opposite side of the side, and the embodiment is not limited.

The predetermined direction will be described by way of example in the following, which is the direction from the side L1 to the opposite side L2 shown in fig. 4.

Specifically, in one embodiment, the at least two terminal groups may be sequentially spaced in the preset direction in the order of the applied voltage signals from large to small, such as the terminal group G1, the terminal group G2 and the terminal group G3 are sequentially disposed in the direction from the side L1 to the side L2, and the ID terminal 121 is disposed between the terminal group G2 and the terminal group G3, as shown in fig. 4.

In still another embodiment, the at least two terminal groups may be sequentially spaced in the preset direction in an order from small to large of the applied voltage signals.

Alternatively, the at least two terminal sets and the ID terminal 121 may be arranged in a same line, which may simplify the process flow, and may also facilitate arranging a fixing structure, such as 125 shown in fig. 4, at other areas of the consumable chip 100, so as to facilitate the mounting of the consumable chip 100. Optionally, other areas 125 of the consumable chip 100 may also be provided with other types of terminals, such as editing terminals for burning and detecting data to the consumable chip, which are not connected to a printer.

Alternatively, in the interface circuit 120 provided in the present embodiment, the distance between the connection terminals of the same terminal group may be smaller than the distance between the connection terminals of different terminal groups. Thus, the influence of the voltage difference between different terminals on each terminal can be reduced to a certain extent.

Further, the at least two terminal groups may be respectively disposed in different regions, please refer to the scenario shown in fig. 4, in which 4 connection terminals 122 of the terminal group G1 are disposed in the region S1, 4 connection terminals 123 of the terminal group G2 are disposed in the region S2, 1 ID terminal is disposed in the region S3, and 1 connection terminal 124 of the terminal group G3 is disposed in the region S4. In this case, the distance between the edges of the adjacent regions may be larger than the distance between the adjacent connection terminals in one region.

Further, in this embodiment, in the at least two terminal groups, a distance between two adjacent connection terminals belonging to the same terminal group is a first length, and a distance between two adjacent connection terminals belonging to different terminal groups is a second length, and the second length is smaller than the first length. Thus, the space for the connection terminals of the consumable chip 100 can be saved.

Optionally, in this embodiment, the at least two terminal sets may include a clock terminal set, an address terminal set (also referred to as a data terminal set), and a first ground terminal set. The clock terminal group may include at least two clock terminals, the address terminal group may include at least two address terminals, and the first ground terminal group may include at least one ground terminal.

The clock terminal is usually applied with a voltage signal with an amplitude or effective value of 15V, for example, may be the connection terminal 122 in the present embodiment, and correspondingly, the terminal group G1 shown in fig. 4 may serve as the clock terminal group. The address terminal is usually applied with a voltage signal having an amplitude or effective value of 9V, and may be, for example, the connection terminal 123 in the present embodiment, and correspondingly, the terminal group G2 shown in fig. 4 may serve as the address terminal group. The ground terminal may provide a reference voltage, typically 0V, for the memory 110 and its peripheral circuits, which may be, for example, the connection terminal 124 in the present embodiment, and correspondingly, the terminal group G3 shown in fig. 4 may serve as the first ground terminal group. In addition, the ground terminal can also provide the safety guarantee for the consumable chip 100, that is, when the consumable chip 100 has faults such as short circuit, the ground terminal can be utilized to pull down the voltage or conduct the ground, so that the consumable chip 100 is not lost by high voltage.

With reference to the above design, in implementation, the clock terminal group, the address terminal group, the ID terminal, and the first ground terminal group may be sequentially disposed at intervals along the preset direction. Further, the clock terminal group, the address terminal group, the ID terminal, and the first ground terminal group may be arranged in common.

Considering that when the consumable chip 100 is disposed in the ink containing structure 13, a problem of oblique insertion or the like may occur due to an improper mounting, a contact failure of the first ground terminal may be caused at this time. Based on this, the interface circuit 120 provided in this embodiment may further include a second ground terminal set, and the second ground terminal set may include at least one ground terminal.

Referring to fig. 5, fig. 5 exemplarily shows another schematic terminal arrangement diagram of the interface circuit 120 provided in the present embodiment. The clock terminal group G1 ' includes a plurality of clock terminals 52, the address terminal group G2 ' includes a plurality of address terminals 53, the first ground terminal group G3 ' includes a ground terminal 54, and the second ground terminal group G4 includes a ground terminal 55. The second ground terminal group G4 is spaced apart from the first ground terminal group G3 ', the clock terminal group G1 ', the address terminal group G2 ' and the ID terminal 121 are disposed between the first ground terminal group G3 ' and the second ground terminal group G4, and the ground terminals 55 of the clock terminal group G1 ' and the second ground terminal group G4 are adjacent to each other.

Thus, even when the problem of oblique insertion occurs, the first ground terminal set on one side fails to make good contact, and the second ground terminal set on the other side can also play a role, so that the consumable signal 100 can continue to operate.

Alternatively, the distance between the ground terminal 55 and the adjacent clock terminal 52 in the second ground terminal group G4 may be smaller than the distance between two adjacent connection terminals of different terminal groups in the interface circuit 120. For example, if the distance between the adjacent clock terminal 52 and the address terminal 53 is d, the distance between the ground terminal 55 and the adjacent clock terminal 52 may be smaller than d. In this manner, a more accurate reference voltage can be provided to the clock terminal 52.

Specifically, the distance between the ground terminal 55 and the adjacent clock terminal 52 in the second ground terminal group G4 may be the first length described above.

To sum up, this application embodiment provides a consumptive material chip, ink containment structure and ink horn, and the size of interface circuit's multiclass connecting terminal applyed voltage signal in the consumptive material chip and this multiclass connecting terminal respectively with the ID terminal between the distance positive correlation to reduce the interference of high level signal to the ID terminal, improved the degree of accuracy of the signal of ID terminal transmission.

In the description of the present application, it is further noted that, unless expressly stated or limited otherwise, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A consumable chip for mounting on a replaceable ink containment structure, the consumable chip comprising a memory and an interface circuit electrically connected to each other;

2. The consumable chip according to claim 1, wherein the at least two terminal groups are sequentially spaced in a preset direction according to the magnitude order of the applied voltage signals, and the distance between the connection terminals of the same terminal group in the interface circuit is smaller than the distance between the connection terminals of different terminal groups.

3. The consumable chip according to claim 2, wherein a distance between two adjacent connection terminals belonging to the same terminal group is set to a first length.

4. The consumable chip according to claim 3, wherein a distance between two adjacent connection terminals belonging to different terminal groups is set to a second length, the second length being greater than the first length.

5. The consumable chip of claim 4, wherein the at least two terminal sets comprise a clock terminal set, an address terminal set, and a first ground terminal set;

the clock terminal group, the address terminal group, the ID terminal and the first grounding terminal group are sequentially arranged at intervals along the preset direction.

6. The consumable chip of claim 5, wherein the interface circuit further comprises a second set of ground terminals;

the second ground terminal group and the first ground terminal group are arranged at intervals, and the clock terminal group, the address terminal group and the ID terminal are arranged between the first ground terminal group and the second ground terminal group.

7. The consumable chip of claim 6,

the distance between the ground terminal in the second ground terminal group and the adjacent clock terminal is set to the first length.

8. The consumable chip of any one of claims 1-7, wherein the ID terminals and the at least two terminal sets are arranged co-linearly.

9. The consumable chip according to any one of claims 1 to 7, wherein the ID terminal is electrically connected to an RC switching circuit, and is configured to output a preset current signal to at least one switching branch of the RC switching circuit, so that a resistor of the switching branch has a corresponding terminal voltage.

10. The consumable chip according to any one of claims 1 to 7, wherein the ID terminals and the contact portions of the connection terminals in each terminal group are provided as a concave or convex structure.

11. The consumable chip according to any one of claims 3-7, wherein the consumable chip is further provided with editing terminals.

12. An ink containment structure for replaceable mounting to an ink cartridge, the ink containment structure being provided with a consumable chip according to any one of claims 1 to 11.

13. An ink cartridge characterized in that the ink containing structure according to claim 12 is mounted.