CN210075248U

CN210075248U - Portable point type response locator state detector

Info

Publication number: CN210075248U
Application number: CN201920811800.XU
Authority: CN
Inventors: 詹雨博; 冯慕白; 姜波; 董晓辉; 迟磊; 肖茂波; 郭小龙; 刘国旭; 李伟; 吴坎; 陈国春; 赵伟宏; 陈宏然; 张国华; 范俊成
Original assignee: Shenyang Railway Signal Co Ltd
Current assignee: Shenyang Railway Signal Co Ltd
Priority date: 2019-05-31
Filing date: 2019-05-31
Publication date: 2020-02-14
Anticipated expiration: 2029-05-31

Abstract

A portable point type response locator state detector relates to a detection device of a locator. The detector is small in size and light in weight, is convenient for field maintenance personnel and fault handling personnel to carry, and can complete message detection and recording of the locator under the condition of not using a computer and a connecting wire.

Description

Portable point type response locator state detector

Technical Field

The utility model relates to a detection device of locator, in particular to portable point type response locator state detector.

Background

At present, the automatic control systems used in marshalling stations and hump yards in China comprise wireless shunting locomotive signal and monitoring Systems (STP), marshalling station integrated automation systems (CIPS), hump push-peak locomotive wireless remote control systems, hump wireless locomotive signal systems and the like, and all the systems adopt a mode of laying a point type response locator (hereinafter, locator) on the ground to locate the position of a locomotive. As a result, locators are used in large numbers in both marshalling stations and humps across the country.

At present, each use unit has some inconveniences in the inspection, maintenance and fault processing of the positioner, namely 1) the message inspection and verification work of the positioner is required after the positioner is newly installed or during regular maintenance or fault processing, and the current means is to take a computer, a read-write tool, a connecting wire and the like to the site to read the message. The holding of the articles is heavy and the operation is inconvenient; 2) the current locator reading and writing tool can only judge the quality of the locator by detecting the message, but the situation that the detected message is good in practical use but cannot be received by a field locomotive exists. The situation may be that the locator itself is not damaged, but the index has deviation, which causes the intensity of the information sent by the locator to be weak, and the locomotive cannot receive the message of the locator due to the addition of a specific field environment, but the current situation is detected by using the existing read-write tool without a method; 3) the locator needs to be maintained regularly on site and records are made, and the current recording management mode is not convenient enough. And the photo of each locator is required to be taken as a dotting point during maintenance, and because the mobile phone is not allowed to be taken on site and is also the personal mobile phone of a worker even if the mobile phone can be taken, the photo is inconvenient to be managed in a centralized way and is easy to lose. So there is currently no good solution.

Disclosure of Invention

To the not enough of prior art existence, the utility model aims at providing a portable point type response locator state detector.

The utility model adopts the technical proposal that: a portable point-type answering locator state detector comprises a shell, a power supply management circuit, a power supply switch circuit, a power supply conversion circuit, a work control circuit, a transmitting circuit, a receiving circuit, an amplifying circuit, a rectifying circuit, an acquisition circuit, a main control unit, a clock extraction circuit and a decoding circuit, wherein the power supply is sequentially connected with the power supply management circuit, the power supply switch circuit, the power supply conversion circuit and the work control circuit, one output end of the work control circuit is connected with the transmitting circuit, the other output end of the work control circuit is connected with the receiving circuit, the receiving circuit is sequentially connected with the amplifying circuit, the rectifying circuit, the acquisition circuit and the main control unit, the portable point-type answering locator state detector also comprises a demodulation circuit, the input end of the demodulation circuit is connected with the output end of the amplifying circuit, the output end of the demodulation circuit is connected with the input, the output end of the clock extraction circuit is connected with the main control unit.

In the above solution, the demodulation circuit structure is that the first capacitor, the second capacitor, the third capacitor and the first slide rheostat are connected in parallel, one end of the parallel circuit is connected with the output end of the first amplifier, the other end of the parallel circuit is connected with one end of an inductor and one end of a fourth capacitor, the other end of the fourth capacitor is connected with one end of a first resistor and one end of a second resistor, the other end of the first resistor is connected with the input end of a first NOT gate, one end of a third resistor and one end of a fourth resistor, the other end of the second resistor is connected with the anode of a diode, the cathode of the diode is connected with one end of a fifth capacitor, one end of a fifth resistor and one end of a sixth resistor, the other end of the fifth capacitor and the other end of the fifth resistor are connected with each other and connected with a GND end, the other end of the sixth resistor is connected with one end of a seventh resistor, and the other end of; the output end of the first NOT gate is connected with the input end of the second NOT gate, one end of an eighth resistor and the input end of the first exclusive-OR gate, the other end of the eighth resistor is connected with the input end of the first exclusive-OR gate and one end of a sixth capacitor, and the other end of the sixth capacitor is connected with GND; the output end of the first exclusive-or gate is connected with one end of a ninth resistor, the other end of the ninth resistor is connected with one end of a seventh capacitor, the other end of the seventh capacitor is connected with the fifth end of a main coil of a second transformer, and the fourth end of the main coil of the second transformer is connected with GND; the first end of the secondary coil of the second transformer is connected with one end of the second crystal oscillator filter, the third end of the secondary coil of the second transformer is connected with one end of the first crystal oscillator filter, the other end of the first crystal oscillator filter and the other end of the second crystal oscillator filter are connected and then connected with one end of an eighth capacitor, the other end of the eighth capacitor is connected with the forward input end of the second amplifier, the reverse input end of the second amplifier is connected with one end of a tenth resistor and one end of an eleventh resistor, the other end of the eleventh resistor is connected with the output end of the second amplifier and one end of a ninth capacitor, and the other end of the tenth resistor is connected with a +12V power supply;

the other end of the ninth capacitor is connected with one end of a twelfth resistor, one end of a thirteenth resistor and the input end of a third NOT gate, the other end of the fourteenth resistor is connected with a 5V power supply, and the other end of the thirteenth resistor is connected with GND; the output end of the third NOT gate is connected with the clock end of the two-way trigger, the output end of the two-way trigger is connected with the input end of a fifth NOT gate, the output end of the fifth NOT gate is connected with the input end of the second XOR gate, the input end of the second XOR gate is connected with the output end of a fourth NOT gate, the input end of the fourth NOT gate is connected with one end of a second inductor and one end of a tenth capacitor, the other end of the second inductor is connected with the output end of the second NOT gate, and the other end of the tenth capacitor is connected with GND; the output end of the second exclusive-OR gate is connected with one end of an eleventh capacitor and one end of a fifteenth resistor, the other end of the fifteenth resistor is connected with one end of a twelfth capacitor and the input end of a fifth not gate, the output end of the fifth not gate is simultaneously connected with one input end, the other input end and the input end of a fourth exclusive-OR gate, the output end of the third exclusive-OR gate is connected with the input end of the fourth exclusive-OR gate, the output end of the fourth exclusive-OR gate is connected with the input end of the fifth exclusive-OR gate, the input end of the fifth exclusive-OR gate is connected with the output end of a sixth exclusive-OR gate, the two input ends of the sixth exclusive-OR gate are simultaneously connected with a number pin of a counter, and the output end (13) of the fifth exclusive-OR gate is connected with the number pin of the.

The utility model has the advantages that: the portable point type response locator state detector comprises a power supply, a power supply management circuit, a power supply switch circuit, a power supply conversion circuit, a work control circuit, a transmitting circuit, a receiving circuit, an amplifying circuit, a rectifying circuit, an acquisition circuit, a main control unit, a clock extraction circuit, a demodulation circuit and a clock extraction circuit.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a usage state diagram of a portable point-type response locator state detector according to an embodiment of the present invention;

fig. 2 is a block diagram of a portable point-type answering locator according to an embodiment of the present invention;

FIG. 3 is a schematic circuit diagram of an embodiment of the present invention

Fig. 4 is a schematic circuit diagram of an embodiment of the present invention;

fig. 5 is a schematic diagram of the portable point-type response locator status diagnostic device according to an embodiment of the present invention for testing the locator index.

Detailed Description

The above objects, features and advantages of the present invention will be more clearly understood and the present invention will be described in more detail with reference to the accompanying drawings 1 to 5 and the detailed description thereof.

The portable point-type response locator state detector adopted by the embodiment comprises a shell, a power supply arranged in the shell, a DC5V external power supply, a power supply management circuit, a power supply switch circuit, a power supply conversion circuit, a work control circuit, a transmitting circuit, a receiving circuit, an amplifying circuit, a rectifying circuit, an acquisition circuit, a main control unit, a demodulation circuit and a clock extraction circuit, the power supply is DC3.7V, the power supply management circuit adopts an MAX8934AETI chip, the switching circuit adopts an LTC2955ITS8-2# PBF chip, the power supply conversion circuit adopts an MAX1708EEE + chip, the work control circuit consists of an SN74LVC2T45DCUR chip, an NDT456P field-effect tube and a 2N7002LT1 field-effect tube, the work control circuit adopts a TPS61085TDGKR chip, the amplifying circuit adopts an AD8055AR chip, the rectifying circuit adopts a 1N4148 diode, the main control unit is LPC1786 based on NXP, the clock extraction circuit adopts an SN74HC191D counting chip, and the decoding circuit is Altera 5M240ZT 15 100N. The transmitting circuit employed in this embodiment is shown in fig. 3. The emitting circuit consists of a crystal oscillator PX0-1-4.096MHz, a counter SN74HC191D, a NOT gate SN74HC14D, a triode VC2075, a capacitor DLC70B102JW301XT and a coil. The receiving circuit is composed of a capacitor DLC70B201GW301XB and a bar coil.

DC3.7V battery and DC5V external power supply are respectively connected with the input end of the power management circuit, namely, 2 pins and 3 pins of the MAX8934AETI chip are external power supply input (DC 5V), 20 pins and 21 pins are battery input (3.7V lithium battery), and 23 pins and 24 pins are output ends. The external power supply and the battery respectively supply power independently or simultaneously supply power to output voltage normally, and when the external power supply and the battery are connected simultaneously, the circuit charges the battery. The MAX8934AETI chip is sequentially connected with an LTC2955ITS8-2# PBF chip, a MAX1708EEE + chip and an SN74LVC2T45DCUR chip. When the switch is pressed, pin 7 of the LTC2955ITS8-2# PBF chip is changed from high level to low level, so that the subsequent FDT434P field effect transistor is conducted. MAX1708EEE + chip converts 3.7V to 5V. When a command signal comes, the SN74LVC2T45DCUR chip is conducted, 5V is used for work, and the subsequent circuit works. When no command signal comes at ordinary times, the work is 5V without electricity, and the subsequent circuit does not work. This may reduce power consumption.

One output end of the work control circuit is connected with the transmitting circuit, the other output end of the work control circuit is connected with the input end of the receiving circuit, the output end of the receiving circuit is sequentially connected with the amplifying circuit, the rectifying circuit, the collecting circuit and the main control unit, the rectifying circuit and the collecting circuit jointly complete judgment of the frequency deviation degree of the positioner, the transmitting intensity of the positioner is reflected through the size of voltage obtained after rectification and collection, and therefore the frequency deviation degree of the positioner is judged. The main control unit is in communication connection with the handset through the Bluetooth receiving and sending circuit. The other output end of the amplifying circuit is connected with the input end of the demodulating circuit, the demodulating circuit receives the amplified PSK signal and carries out XOR processing with the signal through an RC integrating circuit, and an SN74HC86D chip is adopted as an XOR gate in the embodiment. The selection of parameters of the integrating circuit is important, and is the key to whether frequency multiplication can be completed. The prior frequency multiplication needs to use a multiplier, and only a simple exclusive-or gate is needed to realize the frequency multiplication. Meanwhile, the design has low requirement on the quality of the PSK signal, and can better realize carrier frequency multiplication by matching with a later crystal filter. And then the frequency-multiplied signal is subjected to frequency division by an SN74HC74D chip, so that the carrier synchronization of the PSK signal is realized. The demodulated data is obtained by xoring the divided signal with the received PSK signal, and similarly using an SN74HC86D xor gate. And transmitting the demodulated data to a CPLD chip with the model number of 5M240ZT100I5N for decoding.

One output end of the demodulation circuit is connected with the decoding circuit through the clock extraction circuit, and the decoding circuit is connected with the main control unit through another power supply conversion circuit. The clock extraction circuit finishes extraction according to the demodulated data, so that accurate judgment can be carried out in subsequent decoding. The main control unit adopts an ARM chip with the model number of LPC1768FBD100, and the programming language is C language. The signal strength detection adopts an AD0.4 module on a chip to sample, and the obtained numerical value is sent to a Bluetooth chip (as a Bluetooth receiving and sending circuit, the type of which is HC-05) through a serial port. PSK signal processing is to carry out CRC check on decoded signals, and after the check is correct, the decoded signals are sent to a Bluetooth chip through a serial port. The Bluetooth chip completes connection communication with the handset.

In this embodiment, after the transmitting circuit receives the signal that work control circuit sent, the crystal oscillator provides the sine wave, and the counter divides its frequency into 256 KHz's sine wave, and the NOT gate increases the through-flow volume, and the triode is used for amplifying the signal, and 256KHz resonance antenna is constituteed to electric capacity and coil, is responsible for going out signal transmission. The specific circuit structure is as follows:

a power supply end 14 (VDD) of a crystal oscillator 4JT1 is connected with a 5V power supply, an end 8 (PO) of the crystal oscillator 4JT1 is connected with an output end of a work control circuit and a clock end (CLK)14 of a counter, an input end 11 of a NAND gate 4ICIE and an input end 9 of the NAND gate 4ICID of the counter are connected, an output end 10 of the NOT gate 4ICIE and an output end 8 of the NOT gate 4ICID are connected and connected with one end of a resistor R1, the other end of the resistor R1 is connected with a base electrode of a triode and one end of a capacitor C1, and the other end of the capacitor C1 is grounded. The collector of the triode is connected with one end of a capacitor CA11, one end of a capacitor CA1, one end of a capacitor CA4, one end of a capacitor CA3, one end of a capacitor CA2, one end of a capacitor C3 and one end of a magnetic rod coil, the other end of a capacitor CA11, the other end of a capacitor CA1, the other end of a capacitor CA4, the other end of a capacitor CA3, the other end of a capacitor CA2 and the other end of a capacitor C3 are connected with the other end of the magnetic rod coil, and the secondary side of the magnetic rod coil is connected with a 12V power supply. The magnetic bar coil is formed by winding phi 0.44 enameled wires and leading out two wires by using a phi 10X140 MX400 magnetic bar, winding the phi 0.44 enameled wires on the primary side, winding the phi 0.44 enameled wires on the secondary side and leading out two wires, and connecting the primary side and the secondary side by taking one wire as a middle tap.

The receiving circuit in the embodiment is composed of a capacitor DLC70B201GW301XB and a magnetic rod coil, wherein the capacitor CB4, the resistor RO, the capacitor CB3, the capacitor CB2, the capacitor CB5, the capacitor CB1, and the sliding varistor C1 are respectively connected in parallel with the primary side coil of the magnetic rod coil T1, one end of the secondary side coil of the magnetic rod coil T1 is connected to a digital ground GND, and the secondary side coil of the magnetic rod coil T1 is used as an output end of the receiving circuit. The magnetic bar coil T1 is formed by winding 24 circles of phi 0.38 enameled wires and leading out two wires on the primary side and 6 circles of phi 0.38 enameled wires and leading out two wires on the secondary side by using a phi 8X40 MX400 magnetic bar.

The amplifying circuit in this embodiment is composed of an amplifier, a resistor, and a capacitor, and the specific circuit connection relationship is as follows: one end of the capacitor C01 is connected to one end of the secondary coil of the receiver circuit as an input terminal of the amplifier circuit. The other end of the capacitor C01 is connected to the non-inverting input terminal 3 of the amplifier a1, the inverting input terminal 2 of the amplifier is connected to one end of the resistor R1 and one end of the resistor R2, and the other end of the resistor R1 is connected to the +12V power supply. The other end of the resistor R2 is connected to the output terminal 6 of the amplifier.

The demodulation circuit in this embodiment includes a resistor, a capacitor, an exclusive or gate, an amplifier, and the like. The amplifier comprises a capacitor C02, a capacitor C2-2, a capacitor C2-1 and a sliding rheostat C2 which are connected in parallel, one end of the parallel circuit is used as an input end of a demodulation circuit and connected with an output end 6 of the amplifier, the other end of the parallel circuit is connected with one end of an inductor L, one end of an inductor L1 and one end of a capacitor C03, the other end of the capacitor C03 is connected with one end of a resistor R5 and one end of a resistor R9, the other end of the resistor R5 is connected with an input end 14 of a NAND gate IC1A, one end of a resistor R10 and one end of a resistor R11, the other end of the resistor R9 is connected with an anode of a diode V2, a cathode of the diode V2 is connected with one end of a capacitor C010, one end of a resistor R8 and one end of a resistor R63. The other end of the resistor R12 is connected with one end of the resistor R13 and a COTEST end, and is connected with the LPC1768 main control unit through the COTEST end, and the other end of the resistor R13 is connected with GND. The output end 2 of the not gate IC1A is connected with the input end 6 of another not gate IC1D, one end of a resistor R6 and the input end 12 of the exclusive or gate IC3D, the other end of the resistor R6 is connected with the input end 13 of the exclusive or gate IC3D and one end of a capacitor C06, and the other end of the capacitor C06 is connected with GND. An output end 11 of the exclusive-or gate IC3D is connected to one end of a resistor R7, the other end of the resistor R7 is connected to one end of a capacitor C8, the other end of the capacitor C8 is connected to a 5 end of a primary coil of a transformer T2, and a4 end of the primary coil of a transformer T2 is connected to GND. The 1 end of the secondary coil of the transformer T2 is connected with one end of a crystal oscillator filter JT2, the 3 end of the secondary coil of the transformer T2 is connected with one end of a crystal oscillator filter JT1, and the 2 end of the secondary coil of the transformer T2 is grounded. The other end of the crystal oscillator filter JT1 and the other end of the crystal oscillator filter JT2 are connected and then connected with one end of a capacitor C09, the other end of the capacitor C09 is connected with a forward input end 3 of an amplifier A2, a reverse input end 2 of an amplifier A2 is connected with one end of a resistor R15 and one end of a resistor R16, the other end of the resistor R16 is connected with an output end 6 of an amplifier A2 and one end of a capacitor C012, and the other end of the resistor R15 is connected with a +12V power supply.

The other end of the capacitor C012 is connected with one end of a resistor R17, one end of a resistor R18 and the input end 5 of the NOT gate IC1C, the other end of the resistor R17 is connected with a 5V power supply, and the other end of the resistor R18 is connected with GND. The output end 6 of the not-gate IC1C is connected with the pin 11 (CLK) of the two-way flip-flop IC2B, the pin 9 of the two-way flip-flop IC2B is connected with the input end 13 of the nand-gate IC1F, the output end 12 of the not-gate IC1F is connected with the input end 10 of the xor-gate IC3C, the input end 9 of the xor-gate IC3C is connected with the output end 10 of the nand-gate IC1E, the input end 11 of the not-gate IC1E is connected with one end of the inductor W1 and one end of the capacitor C015, the other end of the inductor W1 is connected with the output end 8 of the nand-gate IC1D, and the. An output end 8 of the exclusive-or gate IC3C is connected to one end of a capacitor C014 and one end of a resistor R19, the other end of the resistor R19 is connected to one end of a capacitor C016 and an input end 3 of the not gate IC1B, an output end 4 of the not gate IC1B is simultaneously connected to an input end 5 of the exclusive-or gate IC4B, an input end 6 and an input end 2 of the exclusive-or gate IC4A, an output end 4 of the exclusive-or gate IC4B is connected to an input end 3 of the exclusive-or gate IC4A, an output end 1 of the exclusive-or gate IC4A is connected to an input end 12 of the exclusive-or gate IC4D, an input end 11 of the exclusive-or gate IC4D is connected to an output end 10 of the exclusive-or gate IC4C, an input end 8 and an input end 9 of the exclusive-or gate IC4C are simultaneously connected to a pin 13 of the.

The working process of the portable point type response locator state detector in the embodiment is as follows:

the portable point-type answering locator state diagnostic device communicates with the handset in a Bluetooth communication mode.

The portable point-type response locator state diagnostic device is designed to be in a chargeable mode, and can normally work by an external power supply and a battery. When the power supply is connected externally, the battery is charged simultaneously. The power management circuit can complete the functions of current limiting, charging protection and the like. In consideration of reducing power consumption, after the switch is pressed down, the power management circuit and the main control unit circuit are powered on, the power conversion circuit, the amplifying circuit, the demodulating circuit, the transmitting circuit and the like do not work, and the circuits start to work after receiving the command of the handset. This is done by the control circuit, the control signal being provided by the master control unit. The transmitting circuit needs 5V electricity and 12V electricity, the 12V electricity is completed by a 5V to 12V conversion circuit, and the 12V electricity is used for improving the transmitting intensity. The receiving circuit is used for receiving the signal transmitted by the locator, and the received signal is sent to the rectifying circuit and the demodulating circuit after being amplified by the amplifying circuit. The rectification circuit rectifies the alternating current signal into direct current voltage, the direct current voltage is sent to the main control unit through the sampling circuit, the direct current voltage is sent to the handheld set by the main control unit to be displayed, and the circuit is used for testing the emission intensity of the locator. The demodulation circuit comprises an amplifying circuit clock synchronization circuit and the like, and a PSK signal and a clock signal are obtained after demodulation and are sent to the CPLD decoding circuit. The decoding circuit transmits the decoded useful information to the main control unit, the main control unit checks the useful information and transmits the useful information to the handset for display, and the decoding circuit is used for detecting the message of the locator.

The use frequency of the locator is 1664KHz, and according to the resonance principle, the intensity of the emission frequency of the locator is stronger when the locator is closer to 1664KHz, and is weaker when the locator is opposite to 1664 KHz. According to this principle, the degree of deviation of the locator index can be judged by detecting the intensity of the locator emission. As mentioned above, a rectification circuit is arranged behind the receiving circuit to convert the received alternating current signal into direct current voltage, and the direct current voltage is collected by the main control unit and then the value is sent to the handset. This provides a value reflecting the emission intensity of the positioner, and comparing this value with a standard positioner emission intensity value provides a measure of the deviation of the positioner indicator. The embodiment realizes the function of detecting the index of the locator on a hardware circuit, can display in real time, quickly detects the deviation degree of the index of the locator and solves the problem that the locator is inconvenient to detect and maintain because of being trapped all the time.

As can be seen from fig. 5, the abscissa is frequency in Hz, and the ordinate is intensity in V. The design frequency of the locator is 1664KHz, so the emission intensity of the locator is stronger when the frequency of the locator is closer to 1664KHz, and the converted voltage value is higher.

The above description is only for the specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present invention, and all should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A portable point-type answering locator state detector comprises a shell, a power supply management circuit, a power supply switch circuit, a power supply conversion circuit, a work control circuit, a transmitting circuit, a receiving circuit, an amplifying circuit, a rectifying circuit, an acquisition circuit, a main control unit, a clock extraction circuit and a decoding circuit, wherein the power supply is arranged in the shell, the power supply is sequentially connected with the power supply management circuit, the power supply switch circuit, the power supply conversion circuit and the work control circuit, one output end of the work control circuit is connected with the transmitting circuit, the other output end of the work control circuit is connected with the receiving circuit, the receiving circuit is sequentially connected with the amplifying circuit, the rectifying circuit, the acquisition circuit and the main control unit, the portable point-type answering locator state detector is characterized by further comprising a demodulation circuit, the input end of the demodulation circuit is connected with the output end of the amplifying circuit, the output end of the clock extraction circuit and the output end of the demodulation circuit are respectively connected with the main control unit.

2. The portable spot-answering locator status monitor according to claim 1, wherein the demodulation circuit is such that a first capacitor (C02), a second capacitor (C2-22), a third capacitor (C2-1) and a first slide rheostat (C2) are connected in parallel with each other, one end of the parallel circuit is connected to the output terminal (6) of the first amplifier, the other end of the parallel circuit is connected to one end of an inductor (L1) and one end of a fourth capacitor (C03), the other end of the fourth capacitor (C03) is connected to one end of a first resistor (R5) and one end of a second resistor (R9), the other end of the first resistor (R5) is connected to the input terminal (14) of the first not gate (IC 1A), one end of a third resistor (R10) and one end of a fourth resistor (R11), the other end of the second resistor (R9) is connected to the positive terminal of a diode (V2), and the negative terminal of the diode (V2) is connected to the negative terminal of the fifth capacitor (C010), One end of a fifth resistor (R8) and one end of a sixth resistor (R12) are connected, the other end of a fifth capacitor (C010) and the other end of a fifth resistor (R8) are connected with each other and connected with a GND end in parallel, the other end of the sixth resistor (R12) is connected with one end of a seventh resistor (R13), and the other end of the seventh resistor (R13) is connected with GND; the output end (2) of the first NOT gate (IC 1A) is connected with the input end (6) of the second NOT gate (IC 1D), one end of an eighth resistor (R6) and the input end (12) of the first exclusive-OR gate (IC 3D), the other end of the eighth resistor (R6) is connected with the input end (13) of the first exclusive-OR gate (IC 3D) and one end of a sixth capacitor (C06), and the other end of the sixth capacitor (C06) is connected with GND; an output end (11) of the first exclusive-or gate (IC 3D) is connected with one end of a ninth resistor (R7), the other end of the ninth resistor (R7) is connected with one end of a seventh capacitor (C8), the other end of the seventh capacitor (C8) is connected with a fifth end (5) of a main coil of a second transformer (T2), and a fourth end (4) of the main coil of the second transformer (T2) is connected with GND; a first end (1) of a secondary coil of a second transformer (T2) is connected with one end of a second crystal oscillator filter (JT 2), a third end (3) of a secondary coil of a second transformer (T2) is connected with one end of a first crystal oscillator filter (JT 1), the other end of the first crystal oscillator filter (JT 1) and the other end of a second crystal oscillator filter (JT 2) are connected and then connected with one end of an eighth capacitor (C09), the other end of the eighth capacitor (C09) is connected with a forward input end (3) of a second amplifier, a reverse input end (2) of the second amplifier is connected with one end of a tenth resistor (R15) and one end of an eleventh resistor (R16), the other end of the eleventh resistor (R16) is connected with one end of an output end (6) of the second amplifier and one end of a ninth capacitor (C012), and the other end of the tenth resistor (R15) is connected with a +12V power supply;

the other end of the ninth capacitor (C012) is connected with one end of a twelfth resistor (R1), one end of a thirteenth resistor (R18) and the input end (5) of a third NOT gate (IC 3C), the other end of a fourteenth resistor (R17) is connected with a 5V power supply, and the other end of the thirteenth resistor (R18) is connected with GND; an output end (6) of a third NOT gate (IC 3C) is connected with a clock end of a dual-way trigger (IC 2B), an output end of the dual-way trigger (IC 2B) is connected with an input end (13) of a fourth NOT gate (IC 1F), an output end (12) of the fourth NOT gate (IC 1F) is connected with an input end (10) of a second XOR gate (IC 3C), an input end (9) of the second XOR gate (IC 3C) is connected with an output end (10) of a fifth NOT gate (IC 1E), an input end (11) of the fifth NOT gate (IC 1E) is connected with one end of a second inductor (W1) and one end of a tenth capacitor (C015), the other end of the second inductor (W1) is connected with an output end (8) of the second NOT gate (IC 1D), and the other end of the tenth capacitor (C015) is connected with GND; an output end (8) of a second exclusive-or gate (IC 3C) is connected with one end of an eleventh capacitor (C014) and one end of a fifteenth resistor (R19), the other end of a fifteenth resistor (R19) is connected with one end of a twelfth capacitor (C016) and an input end (3) of a fifth exclusive-or gate (IC 1B), an output end (4) of a fifth exclusive-or gate (IC 1B) is simultaneously connected with one input end (5) of a third exclusive-or gate (IC 4B), the other input end (6) of the fifth exclusive-or gate and an input end (2) of a fourth exclusive-or gate (IC 4A), an output end (4) of the third exclusive-or gate (IC 4B) is simultaneously connected with an input end (3) of a fourth exclusive-or gate (IC 4A), an output end (1) of the fourth exclusive-or gate (IC 4A) is simultaneously connected with an input end (12) of the fifth exclusive-or gate (IC 4D), an input end (I6311) of the fifth exclusive-or gate (IC 4) is simultaneously connected with an input end (8) of a sixth exclusive-or gate (IC 9) and an output end (6859) of a sixth exclusive-or gate (IC 4) is simultaneously connected with an input end (, the output (13) of the fifth exclusive-or gate (IC 4D) is connected to pin (11) of the counter.