CN110138466B - Portable point type answering positioner state detector - Google Patents

Portable point type answering positioner state detector Download PDF

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Publication number
CN110138466B
CN110138466B CN201910470350.7A CN201910470350A CN110138466B CN 110138466 B CN110138466 B CN 110138466B CN 201910470350 A CN201910470350 A CN 201910470350A CN 110138466 B CN110138466 B CN 110138466B
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circuit
gate
resistor
capacitor
exclusive
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CN110138466A (en
Inventor
詹雨博
冯慕白
姜波
董晓辉
迟磊
肖茂波
郭小龙
刘国旭
李伟
吴坎
陈国春
赵伟宏
陈宏然
张国华
范俊成
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Shenyang Railway Signal Co Ltd
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Shenyang Railway Signal Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/59Responders; Transponders
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/10Monitoring; Testing of transmitters
    • H04B17/101Monitoring; Testing of transmitters for measurement of specific parameters of the transmitter or components thereof
    • H04B17/104Monitoring; Testing of transmitters for measurement of specific parameters of the transmitter or components thereof of other parameters, e.g. DC offset, delay or propagation times
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/10Monitoring; Testing of transmitters
    • H04B17/15Performance testing
    • H04B17/17Detection of non-compliance or faulty performance, e.g. response deviations
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B5/00Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/40Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by components specially adapted for near-field transmission
    • H04B5/45Transponders
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W4/00Services specially adapted for wireless communication networks; Facilities therefor
    • H04W4/80Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Amplifiers (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)

Abstract

A portable point type answering locator state detector relates to a locator detection device. The detector is small in size and light in weight, is convenient for field maintenance personnel and fault handling personnel to carry, and can complete message detection and recording of the locator under the condition of not using a computer and a connecting wire.

Description

Portable point type answering positioner state detector
Technical Field
The invention relates to a detector for a positioner, in particular to a portable point type answering positioner state detector.
Background
At present, the automatic control systems used in marshalling stations and humps in China comprise a wireless shunting locomotive signal and monitoring System (STP), a marshalling station integrated automation system (CIPS), a hump push-to-hump locomotive wireless remote control system, a hump wireless locomotive signal system and the like, and all the systems are used for positioning locomotives by adopting a mode of laying point type response positioners (hereinafter referred to as positioners) on the ground. Therefore, positioners are largely used in both nationwide marshalling stations and hump fields.
The current use units have some inconveniences in the checking, maintenance and fault handling of the positioner, namely 1) the message checking and verifying work of the positioner needs to be carried out after the positioner is newly installed each time or during the periodic maintenance or fault handling, and the current means is to take a computer, a read-write tool, a connecting wire and the like to read the message on site. The things are more and heavier, and the operation is inconvenient; 2) The existing locator read-write tool can only judge whether the locator is good or not through detection messages, and the detection messages are good in actual use, but are used in the situation that a field locomotive can not receive the messages. The situation may be that the positioner is not damaged, but the index is deviated, so that the strength of the information sent by the positioner is weaker, and the locomotive cannot receive the message of the positioner when a specific field environment is added, but the situation is not detected by the existing read-write tool at present; 3) The locator needs to be regularly maintained and recorded on site, and the current record management mode is inconvenient. In addition, each locator is required to take photos as dotting during maintenance, and the photos are inconvenient to manage in a centralized way and are easy to lose because the mobile phones are not allowed to be taken on site and can be taken by personnel. There is currently no good solution.
Disclosure of Invention
Aiming at the defects existing in the prior art, the invention aims to provide a portable point type answering positioner state detector.
The technical scheme adopted by the invention is as follows: the portable point type answering locator state detector comprises a shell, and a power supply, a power supply management circuit, a power supply switching circuit, a power supply conversion circuit, a work control circuit, a transmitting circuit, a receiving circuit, an amplifying circuit, a rectifying circuit, a collecting circuit, a main control unit, a clock extraction circuit and a decoding circuit which are arranged in the shell, wherein the power supply is sequentially connected with the power supply management circuit, the power supply switching circuit, the power supply conversion circuit and the work control circuit, one output end of the work control circuit is connected with the transmitting circuit, the other output end of the work control circuit is connected with the receiving circuit, the receiving circuit is sequentially connected with the amplifying circuit, the rectifying circuit, the collecting circuit and the main control unit, the portable point type answering locator state detector is technically characterized by further comprising a demodulation circuit, wherein the input end of the demodulation circuit is connected with the output end of the amplifying circuit, the output end of the demodulation circuit is connected with the input end of the clock extraction circuit, and the output ends of the clock extraction circuit are respectively connected with the main control unit; the rectifying circuit and the acquisition circuit jointly complete judgment of the frequency offset degree of the positioner, and the emission intensity of the positioner is reflected by the voltage obtained after rectification and acquisition, so that the frequency offset degree of the positioner is judged; the rectification circuit rectifies the alternating current signal into direct current voltage, and then sends the direct current voltage to the main control unit through the sampling circuit, and the direct current voltage is sent to the handheld machine for display by the main control unit for testing the emission intensity of the locator. The demodulation circuit comprises an amplifying circuit clock synchronization circuit, and PSK signals and clock signals are obtained after demodulation and are sent to the CPLD decoding circuit. The decoding circuit transmits the decoded useful information to the main control unit, the main control unit checks the useful information and transmits the useful information to the handheld machine for display, and the useful information is used for detecting the locator message;
the demodulation circuit comprises a first capacitor, a second capacitor, a third capacitor and a first sliding rheostat, wherein one end of the parallel circuit is connected with the output end of a first amplifier, the other end of the parallel circuit is connected with one end of a first inductor and one end of a fourth capacitor, the other end of the fourth capacitor is connected with one end of a first resistor and one end of a second resistor, the other end of the first resistor is connected with the input end of a first NOT gate, one end of a third resistor and one end of a fourth resistor, the other end of the second resistor is connected with the positive electrode of a diode, the negative electrode of the diode is connected with one end of a fifth capacitor, one end of the fifth resistor and one end of a sixth resistor, the other end of the fifth capacitor and the other end of the fifth resistor are connected with each other in parallel, the other end of the sixth resistor is connected with one end of a seventh resistor, and the other end of the seventh resistor is connected with GND; the output end of the first NOT gate is connected with the input end of the second NOT gate, one end of an eighth resistor and the first input end of the first exclusive-OR gate, the other end of the eighth resistor is connected with the second input end of the first exclusive-OR gate and one end of a sixth capacitor, and the other end of the sixth capacitor is connected with GND; the output end of the first exclusive-or gate is connected with one end of a ninth resistor, the other end of the ninth resistor is connected with one end of a seventh capacitor, the other end of the seventh capacitor is connected with the fifth end of the main coil of the second transformer, and the fourth end of the main coil of the second transformer is connected with GND; the first end of the secondary coil of the second transformer is connected with one end of the second crystal oscillator filter, the third end of the secondary coil of the second transformer is connected with one end of the first crystal oscillator filter, the other end of the first crystal oscillator filter and the other end of the second crystal oscillator filter are connected with one end of an eighth capacitor, the other end of the eighth capacitor is connected with the forward input end of the second amplifier, the reverse input end of the second amplifier is connected with one end of a tenth resistor and one end of an eleventh resistor, the other end of the eleventh resistor is connected with the output end of the second amplifier and one end of a ninth capacitor, and the other end of the tenth resistor is connected with a +12V power supply;
the other end of the ninth capacitor is connected with one end of a fourteenth resistor, one end of the thirteenth resistor and the input end of the third NOT gate, the other end of the fourteenth resistor is connected with a 5V power supply, and the other end of the thirteenth resistor is connected with GND; the output end of the third NOT gate is connected with the clock end of the double-way trigger, the output end of the double-way trigger is connected with the input end of the fourth NOT gate, the output end of the fourth NOT gate is connected with the first input end of the second XOR gate, the second input end of the second XOR gate is connected with the output end of the fourth NOT gate, the input end of the fourth NOT gate is connected with one end of the inductor and one end of the tenth capacitor, the other end of the inductor is connected with the output end of the second NOT gate, and the other end of the tenth capacitor is connected with GND; the output end of the second exclusive-OR gate is connected with one end of an eleventh capacitor and one end of a fifteenth resistor, the other end of the fifteenth resistor is connected with one end of a twelfth capacitor and one input end of a fifth NOT gate, the output end of the fifth NOT gate is simultaneously connected with one input end of a third exclusive-OR gate, the other input end of the fifth NOT gate and the first input end of a fourth exclusive-OR gate, the output end of the third exclusive-OR gate is connected with the second input end of the fourth exclusive-OR gate, the output end of the fourth exclusive-OR gate is connected with the first input end of the fifth exclusive-OR gate, the second input end of the fifth exclusive-OR gate is connected with the output end of a sixth exclusive-OR gate, the two input ends of the sixth exclusive-OR gate are simultaneously connected with the thirteenth pin of the counter, and the output end of the fifth exclusive-OR gate is connected with the eleventh pin of the counter.
The beneficial effects of the invention are as follows: the portable point type response locator state detector comprises a power supply, a power supply management circuit, a power supply switching circuit, a power supply conversion circuit, a work control circuit, a transmitting circuit, a receiving circuit, an amplifying circuit, a rectifying circuit, a collecting circuit, a main control unit, a clock extraction circuit, a demodulation circuit and a clock extraction circuit, and is small in size, light in weight, convenient for field maintenance personnel and fault handling personnel to carry, and capable of completing message detection and recording of the locator under the condition that a computer and a connecting wire are not used.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a diagram showing the status of a portable point-type answering positioner according to an embodiment of the present invention;
FIG. 2 is a block diagram of a portable point-to-point reply locator in accordance with an embodiment of the invention;
FIG. 3 is a schematic circuit diagram of a transmitting circuit according to an embodiment of the present invention
FIG. 4 is a schematic circuit diagram of a regulating circuit in accordance with an embodiment of the present invention;
fig. 5 is a schematic diagram of a portable point-type answering positioner state diagnostic instrument according to an embodiment of the present invention.
Detailed Description
The foregoing objects, features, and advantages of the invention will be more readily apparent from the following detailed description of the invention taken in conjunction with the accompanying drawings, figures 1-5, and detailed description of the invention.
The portable point type response locator state detector comprises a shell, a power supply, a DC5V external power supply, a power management circuit, a power switch circuit, a power conversion circuit, a work control circuit, a transmitting circuit, a receiving circuit, an amplifying circuit, a rectifying circuit, an acquisition circuit, a main control unit, a demodulation circuit and a clock extraction circuit, wherein the power supply is DC3.7V, the power management circuit adopts a MAX8934AETI chip, the switch circuit adopts an LTC2955ITS8-2#PBF chip, the power conversion circuit adopts a MAX1708EEE+ chip, the work control circuit consists of an SN74LVC2T45DCUR chip, an NDT456P field effect transistor and a 2N7002LT1 field effect transistor, the work control circuit adopts a TPS61085TDGKR chip, the amplifying circuit adopts an AD8055AR chip, the rectifying circuit adopts a 1N4148 diode, the main control unit adopts a type of a NXP-based LPC1786, the clock extraction circuit adopts a 74HC191D chip, and the decoding circuit adopts a type of 5M 10015 of a Altera. The transmitting circuit used in this embodiment is shown in fig. 3. The transmitting circuit consists of crystal oscillator PX0-1-4.096MHz, counter SN74HC191D, NOT gate SN74HC14D, triode VC2075, capacitor DLC70B102JW301XT and coil. The receiving circuit is composed of a capacitor DLC70B201GW301XB and a magnetic rod coil.
DC3.7V battery and DC5V external power supply are connected with the input end of the power management circuit respectively, namely 2 feet and 3 feet of MAX8934AETI chip are external power supply input (DC 5V), 20 feet and 21 feet are battery input (3.7V lithium battery), and 23 feet and 24 feet are output ends. The external power supply and the battery can respectively and independently supply power or simultaneously supply power, and the circuit charges the battery when the external power supply and the battery are connected simultaneously. The MAX8934AETI chip is connected with the LTC2955ITS8-2#PBF chip, the MAX1708EEE+ chip and the SN74LVC2T45DCUR chip in sequence. When the switch is pressed, the 7 pin of the LTC2955ITS8-2#PBF chip is changed from high level to low level, so that the following FDT434P field effect transistor is conducted. MAX1708eee+ chip converts 3.7V to 5V. When a command signal comes, the SN74LVC2T45DCUR chip is conducted, the working voltage is 5V, and the subsequent circuits work. When no command signal comes at ordinary times, 5V is not powered on, and the subsequent circuit does not work. Doing so may reduce power consumption.
One output end of the work control circuit is connected with the transmitting circuit, the other output end of the work control circuit is connected with the input end of the receiving circuit, the output end of the receiving circuit is sequentially connected with the amplifying circuit, the rectifying circuit, the collecting circuit and the main control unit, the rectifying circuit and the collecting circuit jointly complete judgment on the frequency deviation degree of the positioner, the transmitting intensity of the positioner is reflected through the voltage obtained after rectification and collection, and therefore the frequency deviation degree of the positioner is judged. The main control unit is in communication connection with the handset through the Bluetooth receiving and transmitting circuit. The other output end of the amplifying circuit is connected with the input end of the demodulation circuit, the demodulation circuit receives the amplified PSK signal and carries out exclusive OR processing on the PSK signal through an RC integrating circuit, and in the embodiment, an SN74HC86D chip is adopted as the exclusive OR gate. The parameter selection of the integrating circuit is important, and is the key of whether frequency multiplication can be completed. The previous frequency multiplication requires a multiplier, which can be realized by only a simple exclusive-or gate. Meanwhile, the quality requirement on PSK signals is not high by the design, and carrier frequency multiplication can be better realized by matching with a later crystal filter. And then frequency division is carried out on the multiplied signals through an SN74HC74D chip, so that carrier synchronization of PSK signals is realized. And carrying out exclusive OR on the frequency-divided signal and the received PSK signal, and adopting an SN74HC86D exclusive OR gate to obtain demodulated data. And the demodulated data is transmitted to a CPLD chip with the model of 5M240ZT100I5N for decoding.
One path of output end of the demodulation circuit is connected with the decoding circuit through the clock extraction circuit, and the decoding circuit is connected with the main control unit through the other power conversion circuit. The clock extraction circuit performs extraction according to the demodulated data, so that accurate judgment can be performed in the subsequent decoding. The main control unit adopts an ARM chip with the model of LPC1768FBD100, and the programming language is C language. The signal intensity detection adopts an AD0.4 module on the chip to sample, and the obtained value is sent to a Bluetooth chip (serving as a Bluetooth receiving and sending circuit, and the model is HC-05) through a serial port. And the PSK signal processing is to carry out CRC (cyclic redundancy check) on the decoded signal, and send the signal to the Bluetooth chip through the serial port after the signal is checked to be correct. The Bluetooth chip completes the connection communication with the handset.
In this embodiment, after the transmitting circuit receives the signal sent by the working control circuit, the crystal oscillator provides a sine wave, the counter divides the crystal oscillator into a sine wave of 256KHz, the NOT gate increases the throughput, the triode is used for amplifying the signal, and the capacitor and the coil form a 256KHz resonant antenna to be responsible for sending out the signal. The specific circuit structure is as follows:
the power end 14 (VDD) of the crystal oscillator 4JT1 is connected with a 5V power supply, the 8 end (PO) of the crystal oscillator 4JT1 is connected with the output end of the work control circuit and the clock end (CLK) 14 of the counter, the output end (QD) of the counter is connected with the input end 11 of the NAND gate 4ICIE and the input end 9 of the NAND gate 4ICID, the output end 10 of the NAND gate 4ICIE and the output end 8 of the NAND gate 4ICID are connected with one end of a resistor R1, the other end of the resistor R1 is connected with the base electrode of a triode and one end of a capacitor C1, and the other end of the capacitor C1 is grounded. The collector of triode is connected with capacitor CA11 one end, capacitor CA1 one end, capacitor CA4 one end, capacitor CA3 one end, capacitor CA2 one end, capacitor C3 one end, bar magnet coil's one end, and the capacitor CA11 other end, capacitor CA1 other end, capacitor CA4 other end, capacitor CA3 other end, capacitor CA2 other end, capacitor C3 other end are connected with bar magnet coil's the other end, and bar magnet coil's secondary side is connected with 12V power. The magnetic rod coil is formed by winding phi 0.44 enameled wires around a primary side by using MX400 magnetic rod of phi 10X140, leading out two wires, winding phi 0.44 enameled wires around a secondary side by 8 circles, leading out two wires, and respectively drawing one wire on the primary side and the secondary side to be connected together as a middle tap.
The receiving circuit in this embodiment is composed of a capacitor DLC70B201GW301XB and a magnetic rod coil, where the capacitor CB4, the resistor RO, the capacitor CB3, the capacitor CB2, the capacitor CB5, the capacitor CB1, and the slide rheostat C1 are respectively connected in parallel with the primary winding of the magnetic rod coil T1, one end of the secondary winding of the magnetic rod coil T1 is connected with the digital ground GND, and the secondary winding of the magnetic rod coil T1 is used as the output end of the receiving circuit. The magnetic rod coil T1 is a magnetic rod of MX400 with phi 8X40, the primary side is wound with 24 circles of phi 0.38 enameled wires and two wires are led out, and the secondary side is wound with 6 circles of phi 0.38 enameled wires and two wires are led out.
The amplifying circuit in this embodiment is composed of an amplifier, a resistor, and a capacitor, and the specific circuit connection relationship is as follows: one end of the capacitor C01 is connected to one end of the secondary side coil of the receiving circuit as an input end of the amplifying circuit. The other end of the capacitor C01 is connected with a non-inverting input end 3 of the amplifier A1, an inverting input end 2 of the amplifier is connected with one end of the resistor R1 and one end of the resistor R2, and the other end of the resistor R1 is connected with a +12V power supply. The other end of the resistor R2 is connected to the output 6 of the amplifier.
The demodulation circuit in this embodiment includes a resistor, a capacitor, an exclusive-or gate, an amplifier, and the like. The capacitor C02, the capacitor C2-2, the capacitor C2-1 and the slide rheostat C2 are connected in parallel, one end of the parallel circuit is used as an input end of a demodulation circuit to be connected with an output end 6 of the amplifier, the other end of the parallel circuit is connected with one end of an inductor L, one end of an inductor L1 and one end of a capacitor C03, the other end of the capacitor C03 is connected with one end of a resistor R5 and one end of a resistor R9, the other end of the resistor R5 is connected with an input end 14 of a NAND gate IC1A, one end of a resistor R10 and one end of a resistor R11, the other end of the resistor R9 is connected with the positive electrode of a diode V2, the negative electrode of the diode V2 is connected with one end of a capacitor C010, one end of a resistor R8 and one end of a resistor R12, and the other end of the capacitor C010 and the other end of the resistor R8 are connected with each other in parallel with the GND end. The other end of the resistor R12 is connected with one end of the resistor R13 and the COTEST end, and is connected with the LPC1768 master control unit through the COTEST end, and the other end of the resistor R13 is connected with the GND. The output end 2 of the NOT gate IC1A is connected with the input end 6 of the other NOT gate IC1D, one end of a resistor R6 and the input end 12 of the exclusive-OR gate IC3D, the other end of the resistor R6 is connected with the input end 13 of the exclusive-OR gate IC3D and one end of a capacitor C06, and the other end of the capacitor C06 is connected with GND. The output end 11 of the exclusive-OR gate IC3D is connected with one end of a resistor R7, the other end of the resistor R7 is connected with one end of a capacitor C8, the other end of the capacitor C8 is connected with the 5 end of the main coil of the transformer T2, and the 4 end of the main coil of the transformer T2 is connected with GND. The 1 end of the transformer T2 auxiliary coil is connected with one end of the crystal oscillator filter JT2, the 3 end of the transformer T2 auxiliary coil is connected with one end of the crystal oscillator filter JT1, and the 2 end of the transformer T2 auxiliary coil is grounded. The other end of the crystal oscillator filter JT1 and the other end of the crystal oscillator filter JT2 are connected and then connected with one end of a capacitor C09, the other end of the capacitor C09 is connected with a forward input end 3 of an amplifier A2, a reverse input end 2 of the amplifier A2 is connected with one end of a resistor R15 and one end of a resistor R16, the other end of the resistor R16 is connected with an output end 6 of the amplifier A2 and one end of a capacitor C012, and the other end of the resistor R15 is connected with a +12V power supply.
The other end of the capacitor C012 is connected with one end of a resistor R17, one end of a resistor R18 and the input end 5 of the NOT IC1C, the other end of the resistor R17 is connected with a 5V power supply, and the other end of the resistor R18 is connected with GND. The output end 6 of the NOT gate IC1C is connected with the 11-pin (CLK) of the two-way trigger IC2B, the 9-pin NOT gate IC1F of the two-way trigger IC2B is connected with the input end 13 of the NOT gate IC1F, the output end 12 of the NOT gate IC1F is connected with the input end 10 of the NOT gate IC3C, the input end 9 of the NOT gate IC3C is connected with the output end 10 of the NOT gate IC1E, the input end 11 of the NOT gate IC1E is connected with one end of the inductor W1 and one end of the capacitor C015, the other end of the inductor W1 is connected with the output end 8 of the NOT gate IC1D, and the other end of the capacitor C015 is connected with GND. The output end 8 of the exclusive-or gate IC3C is connected with one end of a capacitor C014 and one end of a resistor R19, the other end of the resistor R19 is connected with one end of a capacitor C016 and the input end 3 of an NOT gate IC1B, the output end 4 of the NOT gate IC1B is connected with the input end 5, the input end 6 and the input end 2 of the exclusive-or gate IC4A of the exclusive-or gate IC4B, the output end 4 of the exclusive-or gate IC4A is connected with the input end 3 of the exclusive-or gate IC4A, the output end 1 of the exclusive-or gate IC4A is connected with the input end 12 of the exclusive-or gate IC4D, the input end 11 of the exclusive-or gate IC4D is connected with the output end 10 of the exclusive-or gate IC4C, the input end 8 and the input end 9 of the exclusive-or gate IC4C are connected with the No. 13 pin of the counter, and the output end 13 of the exclusive-or gate IC4D is connected with the No. 11 pin of the counter.
The working procedure of the portable point type answering positioner state detector in this embodiment is as follows:
the portable point-type answering locator state diagnostic instrument communicates with the handset by means of bluetooth communication.
The portable point type answering positioner state diagnostic instrument is designed to be in a chargeable mode, and an external power supply and a battery can work normally. When the power supply is externally connected, the battery is charged at the same time. The power management circuit can complete the functions of current limiting, charging protection and the like. In view of reducing power consumption, after the switch is pressed, the power management circuit and the main control unit circuit are powered, and the power conversion circuit, the amplifying circuit, the demodulation circuit, the transmitting circuit and the like are not operated, and only when a command of the handset is received, the circuits start to operate. This is done by a control circuit, the control signal being provided by the master control unit. The transmitting circuit needs 5V electricity and 12V electricity, the 12V electricity is completed by a 5V-to-12V converting circuit, and the 12V electricity is used for improving the transmitting intensity. The receiving circuit is used for receiving the signal transmitted by the locator, and the received signal is amplified by the amplifying circuit and then is sent to the rectifying circuit and the demodulation circuit. The rectification circuit rectifies the alternating current signal into direct current voltage, the direct current voltage is sent to the main control unit through the sampling circuit, the main control unit sends the direct current voltage to the handheld machine for display, and the circuit is used for testing the emission intensity of the locator. The demodulation circuit comprises an amplifying circuit clock synchronization circuit and the like, and PSK signals and clock signals are obtained after demodulation and are sent to the CPLD decoding circuit. The decoding circuit transmits the decoded useful information to the main control unit, the main control unit checks the useful information and transmits the useful information to the handheld machine for display, and the circuit is used for detecting the locator message.
The using frequency of the locator is 1664KHz, and the closer the transmitting frequency of the locator is to 1664KHz, the stronger the intensity, and the weaker the opposite is, according to the resonance principle. According to this principle, the degree of deviation of the index of the locator can be determined by detecting the intensity of the locator emission. As described above, a rectifying circuit is provided after the receiving circuit to convert the received ac signal into dc voltage, and the dc voltage is collected by the main control unit and then sent to the handset. Thus, a value which can reflect the emission intensity of the locator is obtained, and the deviation degree of the index of the locator can be obtained by comparing the value with the standard value of the emission intensity of the locator. The embodiment realizes the function of detecting the index of the locator on the hardware circuit, can display in real time, and can rapidly detect the deviation degree of the index of the locator, thereby solving the problem of inconvenient detection and maintenance of the conventional interference locator.
As can be seen from fig. 5, the abscissa is frequency in Hz, and the ordinate is intensity in V. The design frequency of the locator is 1664KHz, so that the higher the frequency of the locator is close to 1664KHz, the stronger the emission intensity of the locator is, and the higher the voltage value obtained after conversion is.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (1)

1. The portable point type response locator state detector comprises a shell, and a power supply, a power supply management circuit, a power supply switching circuit, a power supply conversion circuit, a work control circuit, a transmitting circuit, a receiving circuit, an amplifying circuit, a rectifying circuit, a collecting circuit, a main control unit, a clock extraction circuit and a decoding circuit which are arranged in the shell, wherein the power supply is sequentially connected with the power supply management circuit, the power supply switching circuit, the power supply conversion circuit and the work control circuit, one output end of the work control circuit is connected with the transmitting circuit, the other output end of the work control circuit is connected with the receiving circuit, and the receiving circuit is sequentially connected with the amplifying circuit, the rectifying circuit, the collecting circuit and the main control unit. The rectifying circuit and the acquisition circuit jointly complete judgment of the frequency offset degree of the positioner, and the emission intensity of the positioner is reflected by the voltage obtained after rectification and acquisition, so that the frequency offset degree of the positioner is judged; the rectification circuit rectifies the alternating current signal into direct current voltage, the direct current voltage is sent to the main control unit through the sampling circuit, and the direct current voltage is sent to the handheld machine for display by the main control unit and used for testing the emission intensity of the locator; the demodulation circuit comprises an amplifying circuit clock synchronization circuit, and PSK signals and clock signals are obtained after demodulation and are sent to the CPLD decoding circuit; the decoding circuit transmits the decoded useful information to the main control unit, the main control unit checks the useful information and transmits the useful information to the handheld machine for display, and the useful information is used for detecting the locator message;
the demodulation circuit comprises a first capacitor (C02), a second capacitor (C2-2), a third capacitor (C2-1) and a first sliding rheostat (C2), wherein one end of the parallel circuit is connected with an output end (6) of a first amplifier, the other end of the parallel circuit is connected with one end of a first inductor (L1) and one end of a fourth capacitor (C03), the other end of the fourth capacitor (C03) is connected with one end of a first resistor (R5) and one end of a second resistor (R9), the other end of the first resistor (R5) is connected with one end (14) of a first NOT gate (IC 1A), one end of a third resistor (R10) and one end of a fourth resistor (R11), the other end of the second resistor (R9) is connected with the positive electrode of a diode (V2), the negative electrode of the diode (V2) is connected with one end of a fifth capacitor (C010), one end of a fifth resistor (R8) and one end of a sixth resistor (R12), and the other end (R13) of the fifth capacitor (C010) is connected with the other end (GND) of the fifth resistor (R8) in parallel; the output end (2) of the first NOT gate (IC 1A) is connected with the input end (6) of the second NOT gate (IC 1D), one end of an eighth resistor (R6) and the first input end (12) of the first exclusive-OR gate (IC 3D), the other end of the eighth resistor (R6) is connected with the second input end (13) of the first exclusive-OR gate (IC 3D) and one end of a sixth capacitor (C06), and the other end of the sixth capacitor (C06) is connected with GND; the output end (11) of the first exclusive-OR gate (IC 3D) is connected with one end of a ninth resistor (R7), the other end of the ninth resistor (R7) is connected with one end of a seventh capacitor (C8), the other end of the seventh capacitor (C8) is connected with the fifth end (5) of the main coil of the second transformer (T2), and the fourth end (4) of the main coil of the second transformer (T2) is connected with GND; the first end (1) of the secondary coil of the second transformer (T2) is connected with one end of a second crystal oscillator filter (JT 2), the third end (3) of the secondary coil of the second transformer (T2) is connected with one end of a first crystal oscillator filter (JT 1), the other end of the first crystal oscillator filter (JT 1) and the other end of the second crystal oscillator filter (JT 2) are connected with one end of an eighth capacitor (C09), the other end of the eighth capacitor (C09) is connected with the forward input end (3) of the second amplifier, the reverse input end (2) of the second amplifier is connected with one end of a tenth resistor (R15) and one end of an eleventh resistor (R16), the other end of the eleventh resistor (R16) is connected with the output end (6) of the second amplifier and one end of a ninth capacitor (C012), and the other end of the tenth resistor (R15) is connected with a +12V power supply;
the other end of the ninth capacitor (C012) is connected with one end of a fourteenth resistor (R17), one end of a thirteenth resistor (R18) and the input end (5) of the third NOT gate (IC 3C), the other end of the fourteenth resistor (R17) is connected with a 5V power supply, and the other end of the thirteenth resistor (R18) is connected with GND; the output end (6) of the third NOT gate (IC 3C) is connected with the clock end of the double-circuit trigger (IC 2B), the output end of the double-circuit trigger (IC 2B) is connected with the input end (13) of the fourth NOT gate (IC 1F), the output end (12) of the fourth NOT gate (IC 1F) is connected with the first input end (10) of the second exclusive-OR gate (IC 3C), the second input end (9) of the second exclusive-OR gate (IC 3C) is connected with the output end (10) of the fourth NOT gate (IC 1E), the input end (11) of the fourth NOT gate (IC 1E) is connected with one end of the inductor (W1) and one end of the tenth capacitor (C015), the other end of the inductor (W1) is connected with the output end (8) of the second NOT gate (IC 1D), and the other end of the tenth capacitor (C015) is connected with GND; an output end (8) of the second exclusive-or gate (IC 3C) is connected with one end of an eleventh capacitor (C014), one end of a fifteenth resistor (R19), the other end of the fifteenth resistor (R19) is connected with one end of a twelfth capacitor (C016), an input end (3) of a fifth not gate (IC 1B), an output end (4) of the fifth not gate (IC 1B) is simultaneously connected with one input end (5) of the third exclusive-or gate (IC 4B), the other input end (6), a first input end (2) of the fourth exclusive-or gate (IC 4A), an output end (4) of the third exclusive-or gate (IC 4B) is connected with a second input end (3) of the fourth exclusive-or gate (IC 4A), an output end (1) of the fourth exclusive-or gate (IC 4A) is connected with a first input end (12) of the fifth exclusive-or gate (IC 4D), a second input end (11) of the fifth exclusive-or gate (IC 4D) is simultaneously connected with an output end (10) of the sixth exclusive-or gate (IC 4D), and an output end (13) of the fifth exclusive-or gate (IC 4D) is simultaneously connected with an output end (13) of the fifth exclusive-or gate (IC 4D).
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