CN210072624U - Chaotic circuit based on simplest memristor - Google Patents
Chaotic circuit based on simplest memristor Download PDFInfo
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- CN210072624U CN210072624U CN201920802824.9U CN201920802824U CN210072624U CN 210072624 U CN210072624 U CN 210072624U CN 201920802824 U CN201920802824 U CN 201920802824U CN 210072624 U CN210072624 U CN 210072624U
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- 230000000739 chaotic effect Effects 0.000 title claims abstract description 36
- 239000003990 capacitor Substances 0.000 claims description 24
- 238000002474 experimental method Methods 0.000 abstract description 5
- 238000011160 research Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 7
- 238000013461 design Methods 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 238000010587 phase diagram Methods 0.000 description 3
- 238000005291 chaos (dynamical) Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000004907 flux Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
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- 238000013178 mathematical model Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000005312 nonlinear dynamic Methods 0.000 description 1
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Abstract
The utility model discloses a chaotic circuit based on simplest recall and hinder ware, include signal source module, linear module and recall and hinder the ware module, the signal source module links to each other with linear module, recall and hinder the ware module, and it links to each other with linear module to recall and hinder the ware module. The utility model discloses a linear module, recall and hinder ware module and signal source module, through adding nonlinear components and parts in the linear module, convert the various theoretical parameter numerical values in the equation of state to actual required circuit parameter value through the transform, the accuracy of the circuit parameter who obtains is high, has verified to produce chaotic attractor with the circuit experiment and has the feasibility.
Description
Technical Field
The utility model relates to a chaotic circuit, in particular to chaotic circuit based on simplest memristor.
Background
In 1963, Lorenz discovered the first chaotic system, which is a simplified model of the atmospheric convection problem and becomes the starting point and the cornerstone of the future research on the chaotic theory. Smale later presented 18 well-known mathematical problems in the 21 st century, of which 14 th problem was about the research of Lorenz system, which showed that the scientific significance and research value of Lorenz system are very important. With the development of chaos theory research, chaos application is rapidly expanded in various fields, at present, chaos scientific application research has been developed to effectively utilize chaos, chaos of a power system is more appropriate in application research of communication technology and signal processing, and chaos secret communication and chaos circuit research are one of the leading-edge fields which are not excited. Obviously, the chaotic application is not independent of the design of the chaotic system, and for chaotic secure communication, the design of the chaotic circuit is a prerequisite for the chaotic application.
The research on the chaos phenomenon in the circuit system is unique, the nonlinear dynamic circuit is a branch of the dynamic system, and the generation and processing of complex chaos signals by using the circuit becomes a hotspot in nonlinear scientific research. The chaotic circuit is well matched with the corresponding mathematical model, so that the chaotic circuit can conveniently simulate various nonlinear chaotic systems and reproduce various complex nonlinear phenomena, and the nonlinear circuit plays a very important role in theoretical exploration and application research of chaos. The nonlinear circuit theory provides a theoretical basis for the application of nonlinear components, and the nonlinear components can be used for constructing a circuit which can generate chaotic signals required by people. Considering from the viewpoint of circuit design, various theoretical parameter values in the state equation should be transformed through some corresponding relationship based on chaos theory analysis, such as: proportional conversion, differential-integral conversion, addition-subtraction conversion and the like, and finally, the theoretical parameter values are converted into actually required circuit parameter values. The method for guiding circuit design by theory is a key technology for proving that the chaotic attractor generated by circuit experiments has feasibility. The circuit parameters obtained by the method have higher accuracy and can be further used for guiding the design and experiment of a hardware circuit. The existing chaotic signal generating circuit can not convert various theoretical parameter values in a state equation into actually required circuit parameter values through conversion.
Memristors, all known as memristors (memristors). Which is a circuit device that represents the relationship of magnetic flux to electrical charge. A memristor has the dimension of a resistance, but unlike a resistor, the resistance of a resistor is determined by the current flowing through it, and the resistance of a memristor is determined by the charge flowing through it. Therefore, by measuring the resistance of the memristor, the charge quantity flowing through the memristor can be known, and the function of memorizing the charge can be achieved.
Disclosure of Invention
In order to solve the technical problem, the utility model provides a simple structure, with low costs based on simplest memory resistance ware chaotic circuit.
The utility model provides a technical scheme of above-mentioned problem is: the utility model provides a chaotic circuit based on simplest memristor, includes signal source module, linear module and memristor module, and the signal source module links to each other with linear module, memristor module, and memristor module links to each other with linear module.
The chaotic circuit based on the simplest memristor comprises a first operational amplifier, a second operational amplifier, a third operational amplifier, a multiplier, a first resistor, a second resistor and a third capacitor, wherein the non-inverting input end of the first operational amplifier is connected with the output end of a signal source module, the inverting input end of the first operational amplifier is connected with the output end of the first operational amplifier, the output end of the first operational amplifier is connected with the inverting input end of the second operational amplifier through the second resistor, the non-inverting input end of the second operational amplifier is grounded, the third capacitor is bridged between the inverting input end and the output end of the second operational amplifier, the first resistor is connected with two ends of the third capacitor in parallel, the first input end of the multiplier is connected with the non-inverting input end of the first operational amplifier, and the second input end of the multiplier is connected with the output end of the second operational amplifier, the output end of the multiplier is connected to the non-inverting input end of the third operational amplifier, and the inverting input end of the third operational amplifier and the output end of the third operational amplifier are connected together and connected to the linear module.
In the chaotic circuit based on the simplest memristor, the linear module includes a second capacitor and a first inductor, one end of the second capacitor is connected to the output end of the third operational amplifier, the other end of the second capacitor is grounded, and the first inductor is connected in parallel to two ends of the second capacitor.
In the chaotic circuit based on the simplest memristor, the multiplier adopts the X1 pin of the four-quadrant analog multiplier AD633, AD633 as the first input end, the Y1 pin of the AD633 as the second input end, the X2 pin, the Y2 pin and the Z pin of the AD633 are all grounded, and the W pin of the AD633 is taken as the output end.
The beneficial effects of the utility model reside in that: the utility model discloses a linear module, recall and hinder ware module and signal source module, through adding nonlinear components and parts in the linear module, convert the various theoretical parameter numerical values in the equation of state to actual required circuit parameter value through the transform, the accuracy of the circuit parameter who obtains is high, has verified to produce chaotic attractor with the circuit experiment and has the feasibility.
Drawings
Fig. 1 is a block diagram of the present invention.
Fig. 2 is a simulation circuit diagram of the present invention.
Fig. 3 is a chaotic phase diagram of the present invention.
Fig. 4 is a waveform diagram of the magnetic flux of the present invention.
Fig. 5 is a voltage diagram of the capacitor C2 according to the present invention.
Fig. 6 is a current diagram of the inductor L1 according to the present invention.
Fig. 7 is the utility model discloses a memristor's volt-ampere characteristic curve.
Fig. 8 is a diagram of a voltage waveform on the capacitor C2 in an embodiment of the present invention.
Detailed Description
The present invention will be further described with reference to the accompanying drawings and examples.
As shown in fig. 1 and 2, the chaotic circuit based on the simplest memristor comprises a signal source module, a linear module and a memristor module, wherein the signal source module is connected with the linear module and the memristor module, and the memristor module is connected with the linear module.
The memristor module comprises a first operational amplifier U17, a second operational amplifier U18, a third operational amplifier U19, a multiplier U5, a first resistor R1, a second resistor R2 and a third capacitor C3, wherein the non-inverting input end of the first operational amplifier U17 is connected with the output end of the signal source module, the inverting input end of the first operational amplifier U17 is connected with the output end of a first operational amplifier U17, the output end of the first operational amplifier U17 is connected to the inverting input end of the second operational amplifier U18 through a second resistor R2, the non-inverting input end of the second operational amplifier U18 is grounded, the third capacitor C3 is connected between the inverting input end and the output end of the second operational amplifier U18 in a bridging manner, the first resistor R1 is connected in parallel with the two ends of a third capacitor C3, the first input end of the multiplier U5 is connected with the non-inverting input end of the first operational amplifier U17, the second input end of the multiplier U5 is connected with the output end of the second operational amplifier U18, the output terminal of the multiplier U5 is connected to the non-inverting input terminal of the third operational amplifier U19, and the inverting input terminal of the third operational amplifier U19 and the output terminal of the third operational amplifier U19 are connected together and connected to the linear block.
The linear module comprises a second capacitor C2 and a first inductor L1, one end of the second capacitor C2 is connected with the output end of a third operational amplifier U19, the other end of the second capacitor C2 is grounded, the first inductor L1 is connected in parallel with the two ends of the second capacitor C2, and the output end of the whole chaotic circuit is arranged at one end of the second capacitor C2 of the linear module.
The multiplier U5 adopts a four-quadrant analog multiplier U5AD633, an X1 pin of AD633 as a first input terminal, a Y1 pin of AD633 as a second input terminal, an X2 pin, a Y2 pin and a Z pin of AD633 are all grounded, and a W pin of AD633 is an output terminal.
The utility model discloses add the excitation and produce the waveform through recalling the inductance and the electric capacity of resistance on linear module, obtain chaos phase diagram.
Graphs obtained by simulation of the chaotic circuit, namely, figures 3-6, and measurement graphs of the waveforms of the real graphs, namely, figures 7-8, can prove that the memory of the simplest memristor can generate chaos and obtain a chaotic phase graph.
The utility model comprises a linear module, a memristor module and a signal source module, and by adding a nonlinear element in the linear module, the accuracy of the obtained circuit parameters is high, and the feasibility of generating a chaotic attractor by using a circuit experiment is proved; and the utility model discloses the equation of state to chaotic circuit has carried out various theoretical researches, has obtained memristor volt-ampere characteristic diagram, chaotic phase diagram etc. have confirmed and have produced a new chaotic circuit based on simplest memristor.
Claims (2)
1. A chaotic circuit based on a simplest memristor is characterized in that: the memristor-based signal source module comprises a signal source module, a linear module and a memristor module, wherein the signal source module is connected with the linear module and the memristor module, and the memristor module is connected with the linear module;
the memristor module comprises a first operational amplifier, a second operational amplifier, a third operational amplifier, a multiplier, a first resistor, a second resistor and a third capacitor, wherein the non-inverting input end of the first operational amplifier is connected with the output end of the signal source module, the inverting input end of the first operational amplifier is connected with the output end of the first operational amplifier, the output end of the first operational amplifier is connected with the inverting input end of the second operational amplifier through the second resistor, the non-inverting input end of the second operational amplifier is grounded, the third capacitor is bridged between the inverting input end and the output end of the second operational amplifier, the first resistor is connected to two ends of the third capacitor in parallel, the first input end of the multiplier is connected with the non-inverting input end of the first operational amplifier, the second input end of the multiplier is connected with the output end of the second operational amplifier, and the output end of the multiplier is connected with the non-inverting input end, the inverting input end of the third operational amplifier is connected with the output end of the third operational amplifier and connected to the linear module;
the linear module comprises a second capacitor and a first inductor, one end of the second capacitor is connected with the output end of the third operational amplifier, the other end of the second capacitor is grounded, and the first inductor is connected to the two ends of the second capacitor in parallel.
2. The most simplified memristor-based chaotic circuit according to claim 1, wherein: the multiplier adopts a four-quadrant analog multiplier AD633, an X1 pin of the AD633 is used as a first input end, a Y1 pin of the AD633 is used as a second input end, an X2 pin, a Y2 pin and a Z pin of the AD633 are all grounded, and a W pin of the AD633 is used as an output end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920802824.9U CN210072624U (en) | 2019-05-30 | 2019-05-30 | Chaotic circuit based on simplest memristor |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920802824.9U CN210072624U (en) | 2019-05-30 | 2019-05-30 | Chaotic circuit based on simplest memristor |
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| CN210072624U true CN210072624U (en) | 2020-02-14 |
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| CN201920802824.9U Expired - Fee Related CN210072624U (en) | 2019-05-30 | 2019-05-30 | Chaotic circuit based on simplest memristor |
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- 2019-05-30 CN CN201920802824.9U patent/CN210072624U/en not_active Expired - Fee Related
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Granted publication date: 20200214 |