CN209963049U - Surface-mounted thick film circuit applied to high-frequency small-volume temperature compensation crystal oscillator - Google Patents

Surface-mounted thick film circuit applied to high-frequency small-volume temperature compensation crystal oscillator Download PDF

Info

Publication number
CN209963049U
CN209963049U CN201920964123.5U CN201920964123U CN209963049U CN 209963049 U CN209963049 U CN 209963049U CN 201920964123 U CN201920964123 U CN 201920964123U CN 209963049 U CN209963049 U CN 209963049U
Authority
CN
China
Prior art keywords
port
area
bonding pad
chip
thick film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201920964123.5U
Other languages
Chinese (zh)
Inventor
李勇
王玉霞
孙晓枫
张文捷
覃凭辉
高天鹤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
WUHAN HITRUSTY ELECTRONICS CO Ltd
Original Assignee
WUHAN HITRUSTY ELECTRONICS CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by WUHAN HITRUSTY ELECTRONICS CO Ltd filed Critical WUHAN HITRUSTY ELECTRONICS CO Ltd
Priority to CN201920964123.5U priority Critical patent/CN209963049U/en
Application granted granted Critical
Publication of CN209963049U publication Critical patent/CN209963049U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48111—Disposition the wire connector extending above another semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device

Landscapes

  • Oscillators With Electromechanical Resonators (AREA)

Abstract

The utility model discloses a be applied to high frequency little volume temperature compensated crystal oscillator's table and paste thick film circuit relates to the mobile signal processing field. The ceramic base comprises a ceramic base and a shell which is positioned at the top of the ceramic base and made of metal, wherein the bottom of the ceramic base is a bottom surface layer, the inner surface of the ceramic base is a first placing layer, and the inner wall of the ceramic base is provided with a second placing layer; the first placing layer is provided with a first bonding surface and a second bonding surface, the first bonding surface is provided with a first chip, and the second bonding surface is provided with a second chip. The utility model discloses satisfy high reliable aerospace space application requirement, long-term reliability is strong.

Description

Surface-mounted thick film circuit applied to high-frequency small-volume temperature compensation crystal oscillator
Technical Field
The utility model relates to a remove the signal processing field, the more specifically it is a table pastes thick film circuit who is applied to little volume temperature compensation crystal oscillator of high frequency that says so.
Background
The lead-out end of a traditional high-reliability thick film circuit for space is generally a direct insertion type pin, the size of the thick film circuit is large, signal processing which cannot meet the miniaturization requirement can not be achieved, a surface-mounted device which has the performance obtaining function at present is generally a plastic package, and the moisture absorption characteristic of the plastic package is easy to generate a popcorn effect when the plastic package is applied in space, so the thick film circuit is listed as a limited device in the field of space application.
The import of a high-reliability thick film circuit is limited, an imported industrial thick film circuit is generally a plastic package device, the reliability level cannot meet the requirements of the space field, the quality guarantee period is long, the production traceability is insufficient, and once the thick film circuit fails, the problem is difficult to accurately position and risk assessment is difficult.
Therefore, it is necessary to develop a surface-mounted thick film circuit for a high frequency small volume temperature compensated crystal oscillator.
Disclosure of Invention
The utility model aims at overcoming the weak point of above-mentioned background art, and provide a be applied to high frequency little volume temperature compensation crystal oscillator's table and paste thick film circuit.
In order to realize the purpose, the technical scheme of the utility model is that: be applied to surface of high frequency little volume temperature compensation crystal oscillator and paste thick film circuit, its characterized in that: the ceramic base comprises a ceramic base and a shell which is positioned at the top of the ceramic base and made of metal, wherein the bottom of the ceramic base is a bottom layer, the inner surface of the ceramic base is a first placing layer, and the inner wall of the ceramic base is provided with a second placing layer; the first layer of placing has first bonding face and second bonding face, has first chip on the first bonding face, has the second chip on the second bonding face, and the end of drawing forth of first chip and second chip all is connected with ceramic substrate through the gold wire, and the second is placed the layer and is switched on with outside output port.
In the above technical scheme, the bottom surface layer is rectangular, six external ports are provided on two long edges of the bottom surface edge of the bottom surface layer, the ports are respectively a first port, a second port, a third port, a fourth port, a fifth port and a sixth port, and three external ports are arranged on each long edge at intervals.
In the above technical solution, the second port is located between the first port and the third port, and the fifth port is located between the fourth port and the sixth port.
In the above technical solution, a conductive pattern is arranged in the middle of the first placement layer, and the conductive pattern includes a first region, a second region, a third region, a fourth region, a fifth region, a sixth region, a seventh region, and an eighth region; the third area is connected with the first port, the fourth area is connected with the second port, the eighth area is connected with the third port, the fifth area is connected with the fourth port, the sixth area is connected with the fifth port, and the seventh area is connected with the sixth port.
In the above technical solution, when the first pad, the second pad, the third pad and the fourth pad on the first chip are connected to the seventh region of the first placement layer, the thick film circuit can implement a frequency doubling;
when the first bonding pad, the third bonding pad and the fourth bonding pad on the first chip are connected with the seventh area of the first placing layer, and the second bonding pad on the first chip is connected with the eighth area of the first placing layer, the thick film circuit can realize double frequency;
when the first bonding pad, the second bonding pad and the third bonding pad on the first chip are connected with the seventh area of the first placing layer, and the fourth bonding pad on the first chip is connected with the eighth area of the first placing layer, the thick film circuit can realize quadruple frequency;
when a fifth bonding pad and a sixth bonding pad on the first chip are connected with the eighth area of the first placing layer, the output waveform of the thick film circuit is a high-drive CMOS;
when the fifth bonding pad on the first chip is connected with the eighth area of the first placing layer and the sixth bonding pad on the first chip is connected with the seventh area of the first placing layer, the output waveform of the thick film circuit is CMOS;
when the fifth bonding pad on the first chip is connected with the seventh area of the first placing layer and the sixth bonding pad on the first chip is connected with the eighth area of the first placing layer, the output waveform of the thick film circuit is LVDS;
when the fifth bonding pad and the sixth bonding pad on the first chip are connected with the seventh area of the first placement layer, the thick film circuit outputs a waveform of PECL.
In the above technical solution, the joint of the ceramic base and the housing is a metal sealing layer.
In the technical scheme, the ceramic base and the shell form a sealed cavity, and a helium layer is filled in the sealed cavity.
In the technical scheme, the integral thickness of the ceramic base and the shell is 2.0mm, and the size of the bottom layer is 7.0 multiplied by 5.0 mm.
In the above technical solution, the metal sealing layer is a rectangular ring structure.
Compared with the prior art, the beneficial effects of the utility model are as follows:
1) the utility model discloses small, nominal size is long 7.0mm wide 5.0mm high 2.0mm, and the surface mounting electrode is drawn forth to the outside, can be applied to the SMT production line, satisfies the miniaturized requirement.
2) The utility model discloses first chip and second chip are current chip, and first chip and second chip all encapsulate inside the casing, and inside nitrogen protection that fills, product are sealed cavity structure, have both guaranteed the leakproofness of product, control inside atmosphere again, have improved the long-term reliability of inside chip.
3) The utility model discloses can through some appointed pad on changing first chip with first place different conducting pattern connected modes on the layer, select different multiple frequency (one time, twice, quadruple), with the crystal oscillation frequency doubling of frequency, further improve the output frequency of oscillator.
4) The utility model discloses can through some appointed pad on the change first chip with first place different conductive pattern connected mode on the layer, select different thick film circuit's output waveform (high drive CMOS, LVDS, PECL), satisfy different application scenes, enlarge thick film circuit's range of application.
5) The utility model discloses a layer is placed to the second is used for placing reserve chip, is used for supplementing crystal oscillator's function.
Drawings
Fig. 1 is a schematic structural diagram of the present invention.
Fig. 2 is a top cross-sectional view of the present invention.
Fig. 3 is a top view of the ceramic base according to the present invention.
Detailed Description
The following detailed description of the embodiments of the present invention will be made with reference to the accompanying drawings, which are not intended to limit the present invention, but are merely exemplary. While the advantages of the invention will be apparent and readily appreciated by the description.
With reference to the accompanying drawings: be applied to surface of high frequency little volume temperature compensation crystal oscillator and paste thick film circuit, its characterized in that: the ceramic base comprises a ceramic base 10 and a shell 1 which is positioned at the top of the ceramic base 10 and made of metal, wherein the bottom of the ceramic base 10 is a bottom surface layer 9, the inner surface of the ceramic base 10 is a first placing layer 8, and the inner wall of the ceramic base 10 is provided with a second placing layer 3; the first placing layer 8 is provided with a first bonding surface 71 and a second bonding surface 72, the first bonding surface 71 is provided with a first chip 5, the second bonding surface 72 is provided with a second chip 6, leading-out ends of the first chip 5 and the second chip 6 are connected with the ceramic base 10 through gold wires 4, and the second placing layer 3 is conducted with an external output port (as shown in fig. 1 and 2); the leading-out ends of the first chip 5 and the second chip 6 are SMD bonding pads, so that the application requirement of high-reliability aerospace can be met; the first placement layer 8 is of a rectangular structure.
The bottom surface layer 9 is rectangular, six external ports are formed in two long edges of the bottom surface edge of the bottom surface layer 9, the six external ports are respectively a first port 91, a second port 92, a third port 93, a fourth port 94, a fifth port 95 and a sixth port 96, and three external ports are arranged on each long edge at intervals.
The second port 92 is located intermediate the first port 91 and the third port 93, and the fifth port 95 is located intermediate the fourth port 94 and the sixth port 96 (as shown in fig. 3); the first port 91 is a signal input port from which a fundamental frequency or harmonic oscillation signal is input, the second port 92 is a spare port, the third port 93 is a ground end, the thick film circuit is reliably grounded, the fourth port 94 and the fifth port 95 are signal output ports from which a signal frequency-doubled and shaped by the thick film circuit is output, and the sixth port 96 is a power input port for providing a stable direct current power supply for the thick film circuit.
The middle part of the first placement layer 8 is provided with independent conductive patterns, each independent conductive pattern is connected with a functional end of the chip to play a role of a corresponding functional end, and each conductive pattern comprises a first area 81 (area C), a second area 82 (area D), a third area 83 (area E), a fourth area 84 (area F), a fifth area 85 (area G), a sixth area 86 (area H), a seventh area 87 (area J) and an eighth area 88 (area K); the third region 83 is connected to the first port 91, the fourth region 84 is connected to the second port 92, the eighth region 88 is connected to the third port 93, the fifth region 85 is connected to the fourth port 94, the sixth region 86 is connected to the fifth port 95, and the seventh region 87 is connected to the sixth port 96; the first area 81 and the second area 82 function as a backup; the second placement layer 3 comprises ninth areas 31 (areas A) and tenth areas 32 (areas B) which are arranged at intervals, the ninth areas 31 are connected with the first areas 81, and the tenth areas 32 are connected with the second areas 82; the ninth area 31 and the tenth area 32 are used for placing chips with other functions to supplement the function of the crystal oscillator, and are spare areas (as shown in fig. 3).
When the first bonding pad, the second bonding pad, the third bonding pad and the fourth bonding pad on the first chip 5 are connected with the seventh area 87 of the first placing layer 8 through the gold wire 4, the thick film circuit can realize a frequency doubling;
when the first bonding pad, the third bonding pad and the fourth bonding pad on the first chip 5 are connected with the seventh area 87 of the first placing layer 8 through the gold wire 4, and the second bonding pad on the first chip 5 is connected with the eighth area 88 of the first placing layer 8 through the gold wire 4, the thick film circuit can realize frequency doubling;
when the first bonding pad, the second bonding pad and the third bonding pad on the first chip 5 are connected with the seventh area 87 of the first placing layer 8 through the gold wire 4, and the fourth bonding pad on the first chip 5 is connected with the eighth area 88 of the first placing layer 8 through the gold wire 4, the thick film circuit can realize quadruple frequency;
when the fifth bonding pad and the sixth bonding pad on the first chip 5 are connected with the eighth area 88 of the first placing layer 8 through the gold wire 4, the output waveform of the thick film circuit is a high-drive CMOS;
when the fifth bonding pad on the first chip 5 is connected with the eighth area 88 of the first placing layer 8 through the gold wire 4, and the sixth bonding pad on the first chip 5 is connected with the seventh area 87 of the first placing layer 8 through the gold wire 4, the output waveform of the thick film circuit is CMOS;
when the fifth bonding pad on the first chip 5 is connected with the seventh area 87 of the first placement layer 8 through the gold wire 4, and the sixth bonding pad on the first chip 5 is connected with the eighth area 88 of the first placement layer 8 through the gold wire 4, the output waveform of the thick film circuit is LVDS;
when the fifth bonding pad and the sixth bonding pad on the first chip 5 are connected with the seventh area 87 of the first placing layer 8 through the gold wire 4, the output waveform of the thick film circuit is PECL; each bonding pad is a leading-out end;
one end of the second chip 6 is connected with the seventh region 87 through the gold wire 4, and the other end is connected with the eighth region 88 through the gold wire 4, so as to play a role of filtering and bypassing.
The connection part of the ceramic base 10 and the shell 1 is a metal sealing layer 2, and the shell 1 and the metal sealing layer 2 are connected together in a parallel sealing welding mode.
The ceramic base 10 and the shell 1 form a sealed cavity, and a helium layer is filled in the sealed cavity.
The overall thickness of the ceramic base 10 and the housing 1 is 2.0mm, and the size of the bottom layer 9 is 7.0 x 5.0 mm.
The metal sealing layer 2 is of a rectangular ring structure and is in good butt joint with the shell, so that the surface-mounted thick film circuit can meet the requirement on sealing performance.
The utility model takes the ceramic base 10 as a carrier, can directly place the chip in the ceramic base 10, connects the functional end of the chip with the external port of the bottom surface layer 9 through the ceramic base 10, and seals through the shell 1, so that the utility model becomes a sealed cavity component, which can be applied to the space field with high reliability requirement on the premise of meeting the requirements of air tightness, reliability and the like; the utility model discloses thick film circuit's crystal oscillation input signal is diversified, but the optional fundamental frequency and two kinds of oscillation modes of overtone have enlarged thick film circuit's the range of application in the different circuits of crystal oscillator.
Other parts not described belong to the prior art.

Claims (9)

1. Be applied to surface of high frequency little volume temperature compensation crystal oscillator and paste thick film circuit, its characterized in that: the ceramic base comprises a ceramic base (10) and a shell (1) which is positioned at the top of the ceramic base (10) and made of metal, wherein the bottom of the ceramic base (10) is a bottom layer (9), the inner surface of the ceramic base (10) is a first placing layer (8), and the inner wall of the ceramic base (10) is provided with a second placing layer (3) which protrudes transversely; the first layer (8) of placing has first bonding face (71) and second bonding face (72), has first chip (5) on first bonding face (71), has second chip (6) on second bonding face (72), and the end of drawing forth of first chip (5) and second chip (6) all is connected with ceramic base (10) through spun gold (4), and the second is placed layer (3) and is switched on with outside output port.
2. The surface-mounted thick film circuit applied to the high-frequency small-volume temperature compensation crystal oscillator according to claim 1, wherein: bottom surface layer (9) are the rectangle, and two long limits of bottom surface layer (9) bottom surface edge are total six external ports, are first port (91), second port (92), third port (93), fourth port (94), fifth port (95), sixth port (96) respectively, and interval arrangement has three external port on every long limit.
3. The surface-mounted thick film circuit applied to the high-frequency small-volume temperature compensation crystal oscillator according to claim 2, wherein: the second port (92) is located intermediate the first port (91) and the third port (93), and the fifth port (95) is located intermediate the fourth port (94) and the sixth port (96).
4. The surface-mounted thick film circuit applied to the high-frequency small-volume temperature compensation crystal oscillator, according to claim 3, is characterized in that: the middle part of the first placement layer (8) is provided with a conductive pattern, and the conductive pattern comprises a first area (81), a second area (82), a third area (83), a fourth area (84), a fifth area (85), a sixth area (86), a seventh area (87) and an eighth area (88); the third zone (83) is connected to the first port (91), the fourth zone (84) is connected to the second port (92), the eighth zone (88) is connected to the third port (93), the fifth zone (85) is connected to the fourth port (94), the sixth zone (86) is connected to the fifth port (95), and the seventh zone (87) is connected to the sixth port (96).
5. The surface-mounted thick film circuit applied to the high-frequency small-volume temperature compensation crystal oscillator according to claim 4, wherein: when the first bonding pad, the second bonding pad, the third bonding pad and the fourth bonding pad on the first chip (5) are connected with the seventh area (87) of the first placing layer (8) through the gold wire (4), the thick film circuit can realize frequency multiplication;
when the first bonding pad, the third bonding pad and the fourth bonding pad on the first chip (5) are connected with the seventh area (87) of the first placing layer (8) through the gold wire (4), and the second bonding pad on the first chip (5) is connected with the eighth area (88) of the first placing layer (8) through the gold wire (4), the thick film circuit can realize double frequency;
when the first bonding pad, the second bonding pad and the third bonding pad on the first chip (5) are connected with the seventh area (87) of the first placing layer (8) through the gold wire (4), and the fourth bonding pad on the first chip (5) is connected with the eighth area (88) of the first placing layer (8) through the gold wire (4), the thick film circuit can realize quadruple frequency;
when a fifth bonding pad and a sixth bonding pad on the first chip (5) are connected with an eighth area (88) of the first placing layer (8) through a gold wire (4), the output waveform of the thick film circuit is a high-drive CMOS;
when the fifth bonding pad on the first chip (5) is connected with the eighth area (88) of the first placing layer (8) through the gold wire (4), and the sixth bonding pad on the first chip (5) is connected with the seventh area (87) of the first placing layer (8) through the gold wire (4), the output waveform of the thick film circuit is CMOS;
when a fifth bonding pad on the first chip (5) is connected with a seventh area (87) of the first placing layer (8) through the gold wire (4), and a sixth bonding pad on the first chip (5) is connected with an eighth area (88) of the first placing layer (8) through the gold wire (4), the output waveform of the thick film circuit is LVDS;
when the fifth bonding pad and the sixth bonding pad on the first chip (5) are connected with the seventh area (87) of the first placing layer (8) through the gold wire (4), the output waveform of the thick film circuit is PECL.
6. The surface-mounted thick film circuit applied to the high-frequency small-volume temperature compensation crystal oscillator according to claim 5, wherein: and a metal sealing layer (2) is arranged at the joint of the ceramic base (10) and the shell (1).
7. The surface-mounted thick film circuit applied to the high-frequency small-volume temperature compensation crystal oscillator according to claim 6, wherein: the ceramic base (10) and the shell (1) form a sealed cavity, and a helium layer is filled in the sealed cavity.
8. The surface-mounted thick film circuit applied to the high-frequency small-volume temperature compensation crystal oscillator according to claim 7, wherein: the integral thickness of the ceramic base (10) and the shell (1) is 2.0mm, and the size of the bottom layer (9) is 7.0 multiplied by 5.0 mm.
9. The surface-mounted thick film circuit applied to the high-frequency small-volume temperature compensation crystal oscillator according to claim 8, wherein: the metal sealing layer (2) is of a rectangular ring structure.
CN201920964123.5U 2019-06-25 2019-06-25 Surface-mounted thick film circuit applied to high-frequency small-volume temperature compensation crystal oscillator Active CN209963049U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201920964123.5U CN209963049U (en) 2019-06-25 2019-06-25 Surface-mounted thick film circuit applied to high-frequency small-volume temperature compensation crystal oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201920964123.5U CN209963049U (en) 2019-06-25 2019-06-25 Surface-mounted thick film circuit applied to high-frequency small-volume temperature compensation crystal oscillator

Publications (1)

Publication Number Publication Date
CN209963049U true CN209963049U (en) 2020-01-17

Family

ID=69248451

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201920964123.5U Active CN209963049U (en) 2019-06-25 2019-06-25 Surface-mounted thick film circuit applied to high-frequency small-volume temperature compensation crystal oscillator

Country Status (1)

Country Link
CN (1) CN209963049U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113315472A (en) * 2021-04-30 2021-08-27 武汉海创电子股份有限公司 Special thick film circuit for space constant temperature crystal oscillator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113315472A (en) * 2021-04-30 2021-08-27 武汉海创电子股份有限公司 Special thick film circuit for space constant temperature crystal oscillator

Similar Documents

Publication Publication Date Title
US8299864B2 (en) Voltage controlled temperature compensated crystal oscillator
JP2004296613A (en) Semiconductor device
CN209963049U (en) Surface-mounted thick film circuit applied to high-frequency small-volume temperature compensation crystal oscillator
US8072276B2 (en) Surface mount crystal oscillator
JP3525076B2 (en) Surface mount type temperature compensated crystal oscillator
JP2002330027A (en) Temperature compensating crystal oscillator for surface mounting
JP3423253B2 (en) Surface mount crystal oscillator
JP2001094378A (en) Surface mounted container, piezoelectric device and temperature compensating quartz oscillator
JP2000134037A (en) Surface mount crystal oscillator
JP2005020546A (en) Surface mount crystal oscillator
CN212969584U (en) Resonator with thermistor
JPS61245710A (en) Crystal resonator
JP2008252467A (en) Piezoelectric device for surface mounting
JP2001036343A (en) Surface mounting type temperature compensated crystal oscillator
JP2969526B2 (en) Small crystal oscillator for surface mounting
CN212785290U (en) Resonator with thermistor
CN115940872B (en) Base for crystal oscillator and crystal oscillator
CN115996034B (en) Base for clock module and clock module
CN212785291U (en) Resonator with thermistor
JP2012049874A (en) Mounting structure of surface-mounted piezoelectric oscillator
JP2002134639A (en) Package for high freaquency electronic component and high freaquency electronic component using it
JP2004297209A (en) Surface mount piezoelectric vibrator
JP2006086664A (en) Crystal vibrator, crystal oscillator, and assembling method for them, and mobile communication terminal
CN114421920A (en) Low-jitter differential crystal oscillator
JPS6393136A (en) Transistor device

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant