CN209961878U

CN209961878U - Test circuit for panel detection

Info

Publication number: CN209961878U
Application number: CN201920222228.3U
Authority: CN
Inventors: 不公告发明人
Original assignee: Fujian Huajiacai Co Ltd
Current assignee: Fujian Huajiacai Co Ltd
Priority date: 2019-02-22
Filing date: 2019-02-22
Publication date: 2020-01-17
Anticipated expiration: 2029-02-22

Abstract

A test circuit for panel detection comprises a comparator, a first resistor, a second resistor, a clock trigger, a counter and an output end; the output end of the comparator is connected with one end of the first resistor, the other end of the first resistor is grounded through the second resistor, the other end of the first resistor is further connected with the clock trigger, and the clock trigger is connected with the counter, so that the technical problem of real-time performance monitoring in panel testing is solved.

Description

Test circuit for panel detection

Technical Field

The utility model relates to a liquid crystal display panel detection area especially relates to a carry out test circuit that detects with liquid crystal display panel.

Background

In the reliability detection experiment of the display panel, the temperature in the experimental furnace exceeds the liquid crystal bearable range, so that the working condition of the liquid crystal cannot be confirmed by manually observing the picture of the panel under the condition that the liquid crystal cannot work normally. In the RA experiment process, the V-x talk phenomenon can occur in two situations, namely long occurrence time and few times; and the other is short in occurrence time and multiple in times, and a specific phenomenon schematic diagram is shown in the attached drawing. In the first case, the relevant fellow may still be observed and recorded by observation in daily work, and in the second case, the fellow may not be recorded in detail. Therefore, to specifically monitor the experimental status of Panel in RA experiments. It is desirable to provide a novel detection method and apparatus.

Disclosure of Invention

For this reason, it is necessary to provide a method capable of performing VGL status detection of different panels, reflecting the Panel status and enabling it to be better recorded,

in order to achieve the above object, the inventor provides a test circuit for panel detection, which includes a comparator, a first resistor, a second resistor, a clock trigger, a counter, and an output end;

the output end of the comparator is connected with one end of a first resistor, the other end of the first resistor is grounded through a second resistor, the other end of the first resistor is also connected with a clock trigger, the clock trigger is connected with a counter,

the comparator comprises a reference voltage input end and a voltage end to be detected, and the voltage end to be detected is connected with the driving voltage of the panel.

Different from the prior art, the technical scheme can know and monitor the actual condition of Panel by grabbing the relevant voltage of Panel (for example, VIN is equal to VSP, VSN, etc.) in the test by designing the circuit.

Drawings

FIG. 1 is a schematic diagram of the panel V-x talk phenomenon of the RA experiment described in the background art;

FIG. 2 is a schematic diagram illustrating the VGL shift variation of Panel in the experimental process according to the embodiment;

FIG. 3 is a diagram of a panel detection circuit according to an embodiment;

fig. 4 is a schematic diagram of a circuit principle and waveforms according to an embodiment.

Detailed Description

To explain technical contents, structural features, and objects and effects of the technical solutions in detail, the following detailed description is given with reference to the accompanying drawings in conjunction with the embodiments.

A test circuit for panel detection, as shown in FIG. 3, comprises a comparator, a first resistor, a second resistor, a clock trigger, a counter, and an output end;

As shown in the figure, in the left comparator, two input terminals are respectively connected to VREF and VIN, and an enable terminal is respectively connected to operating voltage VCC and 0V voltage or ground or negative voltage, wherein ① VREF is an adjustable reference voltage, according to the actual operation requirement, a user can set, for example, to be between 0.7V and 3V, generally requiring a VGL voltage value lower than that of a normal Panel, and VIN is a voltage to be measured, for example, the VGL voltage value of Panel can be directly input, so that when the VGL voltage rises along with the experimental temperature, if power failure occurs, the comparator will be inverted and reflected on an output signal, VCC in the figure is the operating voltage of the comparator, in a specific embodiment, an input level for controlling D flip-flop (voltage trigger) according to the following formula,

VCC*R2/(R1+R2)。

the input level of the voltage trigger can be set according to the requirement, and can be preferably set to be 0-3.3V,

the flip-flop is a memory function, has two stable states, is the most basic logic unit for forming various sequential circuits, and is an important unit circuit in digital logic circuits. It has wide application in digital systems and computers. The flip-flop has two stable states, "0" and "1", and can be flipped from one stable state to the other under certain external signals. The trigger is composed of an integrated trigger and a gate circuit. The triggering mode includes level triggering and edge triggering. The D flip-flop flips at the leading edge (positive transition 0 → 1) of the clock pulse CP, and the secondary state of the flip-flop depends on the state at the D-side before the rising edge of the pulse of CP arrives, i.e., the secondary state is D. Because of this, it has two functions of set 0 and set 1. Since the circuit has the function of maintaining the blocking during the period of CP being 1, the data state of the D end changes during the period of CP being 1, and the output state of the flip-flop is not influenced. In the application example, the trigger is a timing trigger, the effect of timing trigger can be achieved due to the integration of a clock crystal oscillator, the time of CLK can be automatically adjusted according to the needs of a user, and the frequency of CLK can be enabled to be 1/tth; here the clock period is tth and it also serves to limit the power down time, i.e. threshold.

The D flip-flop is widely used, and can be used as a register, a shift register, a frequency division and a waveform generator of a digital signal, in some embodiments of the present invention, our flip-flop is connected to a counter (counter) of a next stage circuit, and is used for screening VIN whose power down time exceeds a prescribed time, so that in the embodiment shown in fig. 4, we can see that when VIN is less than VREF, power down time t1> tth, the flip-flop triggers the next stage counter to count; if the subsequent second power-down time t2< tth, the trigger is not triggered, and the counter does not count if the lower-level counter does not send an enabling signal; if the third power-down time t3> tth is reached and the duration of the third power-down time exceeds the period of the CLK, the flip-flop sends an enable signal to enable the count, and the final counter is shown as 2 in this embodiment. Therefore, a user can know the objective serious condition of the power failure phenomenon caused by instability of the liquid crystal panel due to overhigh temperature of the RA experiment in a specific time through the counter, particularly the judgment of power failure for multiple times in a short time, and under the condition that measurement cannot be carried out by conventional means such as naked eyes originally, the problem of the experiment at 85 ℃/85% is effectively solved by applying the panel detection circuit: the temperature in the furnace exceeds the liquid crystal bearable range in the experiment, so that the liquid crystal can not work normally, no display is caused, and the problem that the condition of the liquid crystal is confirmed by observing the Panel picture by experimenters is solved.

In other embodiments, the value of VREF may also be artificially adjusted, so that it is equivalent to a different nominal voltage,

such as when V_REFVGH (rated gate high voltage); v_INWhen it is VSH (actual), if V_IN<V_REFBy controlling the frequency of CLK, D flip-flop screens out the effective VGH Shift (gate high Voltage offset). Every time it occurs, the counter will increment by 1.

When V is_REFVSN (nominal); v_INWhen VSN (actual), if V_IN<V_REFBy controlling the frequency of CLK, D flip-flop screens out the valid VSN Shift. Every time it occurs, the counter will increment by 1.

When V is_REFVSP (rated); v_INWhen VSP (real), if V_IN<V_REFD flip-flop screens out valid VSP Shift by controlling the frequency of CLK. Every time it occurs, the counter will increment by 1.

When V is_REFVDDI (nominal); v_INWhen VDDI (actual), if V_IN<V_REFBy controlling the frequency of CLK, Dflip-flop screens out the valid VGH Shift. Every time it occurs, the counter will increment by 1.

In summary, in the 85 ℃/85% experiment, the temperature in the furnace exceeds the liquid crystal bearable range in the experiment, so that the liquid crystal cannot work normally, and no display exists, therefore, under the general condition, the condition of the liquid crystal cannot be confirmed by observing the Panel in the experimental process, and by adopting the design scheme, the actual condition of the Panel can be known and monitored by capturing the voltages (for example, VIN is equal to VSP, VSN and the like) related to the Panel in the experiment, so that the technical problem of real-time monitoring of performance in the Panel test is solved.

It should be noted that, although the above embodiments have been described herein, the scope of the present invention is not limited thereby. Therefore, based on the innovative concept of the present invention, the changes and modifications of the embodiments described herein, or the equivalent structure or equivalent process changes made by the contents of the specification and the drawings of the present invention, directly or indirectly apply the above technical solutions to other related technical fields, all included in the scope of the present invention.

Claims

1. A test circuit for panel detection is characterized by comprising a comparator, a first resistor, a second resistor, a clock trigger, a counter and an output end;