CN209911695U

CN209911695U - Display panel and display device

Info

Publication number: CN209911695U
Application number: CN201920873001.5U
Authority: CN
Inventors: 熊志
Original assignee: Beihai Hui Ke Photoelectric Technology Co Ltd; Chongqing HKC Optoelectronics Technology Co Ltd
Current assignee: Beihai Hui Ke Photoelectric Technology Co Ltd; Chongqing HKC Optoelectronics Technology Co Ltd; Beihai HKC Optoelectronics Technology Co Ltd
Priority date: 2019-06-11
Filing date: 2019-06-11
Publication date: 2020-01-07
Anticipated expiration: 2029-06-11

Abstract

The utility model discloses a display panel and display device, this display panel includes: a display screen; the circuit board is arranged adjacent to the display screen and provided with a mounting groove; the chip on film is arranged on the same side of the display screen and the circuit board, one side of the chip on film is connected with the display screen, and the other side of the chip on film is detachably accommodated in the mounting groove. The utility model provides a display panel aims at improving the connection steadiness of cover brilliant film and circuit board.

Description

Display panel and display device

Technical Field

The utility model relates to a display device technical field, in particular to display panel and applied this display panel's display device.

Background

The statements herein merely provide background information related to the present application and may not necessarily constitute prior art. With the continuous development of Integrated Circuit (IC) technology, electronic products are increasingly developing in the direction of miniaturization, intelligence and high reliability, and the Integrated Circuit package directly affects the performance of the Integrated Circuit, the electronic module and even the whole device. Under the conditions that the size of an integrated circuit chip is gradually reduced and the integration level is continuously improved, the electronic industry puts higher and higher requirements on an integrated circuit packaging structure.

At present, the display screen and the circuit board of the conventional display panel are usually connected and packaged into an integrated structure through the flip chip, and during transportation or transportation, the flip chip is easily torn, broken and the like, so that the display screen and the circuit board cannot be normally communicated, and the cost is increased.

SUMMERY OF THE UTILITY MODEL

The utility model aims at providing a display panel aims at realizing that display screen and circuit board realize dismantling the connection through cover brilliant film when, improve cover brilliant film and circuit board's the steadiness of being connected.

In order to achieve the above object, the present invention provides a display panel including:

a display screen;

the circuit board is arranged adjacent to the display screen and provided with a mounting groove; and

the chip on film is arranged on the same side of the display screen and the circuit board, one side of the chip on film is connected with the display screen, and the other side of the chip on film is detachably accommodated in the mounting groove.

In an embodiment, a connector is disposed on a side of the circuit board close to the flip chip, the connector is formed with the mounting groove, one side of the flip chip is detachably received in the mounting groove, and the flip chip is detachably connected to the circuit board through the connector.

In one embodiment, the connector includes:

the shell is provided with an accommodating cavity;

the signal terminal is arranged in the accommodating cavity, and the signal terminal and the cavity wall of the accommodating cavity enclose to form a connecting groove and the mounting groove;

one side of the circuit board is limited in the connecting groove and is abutted against the signal terminal, one side of the chip on film is detachably accommodated in the mounting groove and is abutted against the signal terminal, and the circuit board is electrically connected with the chip on film through the signal terminal.

In one embodiment, the connector further comprises a locking arm arranged on the housing, the locking arm can rotate relative to the housing, the connector has a locking state that the locking arm rotates and locks the housing to form the mounting groove, and has an unlocking state that the locking arm rotates and releases the housing to open the mounting groove;

when the chip on film is in the locking state, one side of the chip on film is locked in the mounting groove through the locking arm;

and when the chip on film is in the unlocking state, one side edge of the chip on film is separated from the mounting groove.

In an embodiment, the chip on film includes a connection side connected to the circuit board, a support layer is disposed on a surface of the connection side, and the connection side and the support layer are detachably accommodated in the mounting groove.

In an embodiment, an adhesive layer is further disposed between the connecting side and the supporting layer.

In one embodiment, the thickness of the support layer is 210um to 219 um; the thickness of the adhesive layer is 1-10 um;

and/or the supporting layer is a polyester plastic layer.

In an embodiment, a driving chip is disposed on a surface of the flip chip film facing away from the supporting layer, and the driving chip is configured to generate a driving signal.

In an embodiment, the present invention further provides a display panel, including:

a display screen;

the circuit board is arranged adjacent to the display screen, a connector is arranged on one side edge of the circuit board, and a mounting groove is formed in the connector;

the flip chip film is arranged on the same side of the display screen and the circuit board, the flip chip film is provided with a first connecting side and a second connecting side which are opposite, the first connecting side is connected with the display screen, the second connecting side is provided with a supporting layer and an adhesive layer, the adhesive layer is arranged between the second connecting side and the supporting layer, the second connecting side, the adhesive layer and the supporting layer are detachably contained in the mounting groove, a driving chip is arranged on the surface of the supporting layer, which faces away from the flip chip film, and the driving chip is used for generating driving signals.

The utility model also provides a display device, including the aforesaid display panel.

The display panel of the technical scheme of the utility model utilizes one side of the chip on film to be connected with the display screen by arranging the mounting groove on the circuit board, and the other side is detachably accommodated in the mounting groove, so that the display screen and the circuit board can be detachably connected through the chip on film, thus the display screen and the circuit board can be respectively produced and transported, and the damage of the chip on film tearing, breaking and the like caused by the displacement of the display screen and the circuit board in the transportation or moving process is avoided; furthermore, the circuit board is provided with a mounting groove, and the side edge of the chip on film is detachably accommodated in the mounting groove, so that the connection stability of the chip on film and the circuit board can be effectively improved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.

Fig. 1 is a schematic structural diagram of an embodiment of a display panel according to the present invention;

FIG. 2 is a schematic cross-sectional view taken along line A-A of FIG. 1;

FIG. 3 is a schematic partial cross-sectional view of an embodiment of a display panel according to the present invention;

fig. 4 is a schematic cross-sectional view of a locking state in an embodiment of the connector of the present invention;

fig. 5 is a schematic cross-sectional view of an unlocked state in an embodiment of the connector of the present invention;

FIG. 6 is a schematic cross-sectional view of an embodiment of the flip chip film of the present invention;

FIG. 7 is a schematic cross-sectional view of another embodiment of the flip chip film of the present invention;

fig. 8 is a schematic cross-sectional view of another embodiment of the flip chip film of the present invention.

The objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

It should be noted that all the directional indications in the embodiments of the present invention are only used to explain the relative position relationship between the components, the motion situation, etc. in a certain posture, and if the certain posture is changed, the directional indication is changed accordingly.

In the present application, unless expressly stated or limited otherwise, the terms "connected" and "fixed" are to be construed broadly, e.g., "fixed" may be fixedly connected or detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meaning of the above terms in the present invention can be understood according to specific situations by those skilled in the art.

Also, the meaning of "and/or" and/or "appearing throughout is meant to encompass three scenarios, exemplified by" A and/or B "including scenario A, or scenario B, or scenarios where both A and B are satisfied. In addition, descriptions in the present application as to "first", "second", and the like are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit to the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.

The utility model provides a display panel 100.

Referring to fig. 1 and fig. 2, in the embodiment of the present invention, the display panel 100 includes a display screen 10, a circuit board 20 and a chip on film 30, wherein the circuit board 20 is disposed adjacent to the display screen 10, and the circuit board 20 is disposed with a mounting groove 2112; the cover film 30 is disposed on the same side of the display screen 10 and the circuit board 20, one side of the cover film 30 is connected to the display screen 10, and the other side is detachably received in the mounting groove 2112.

In the present embodiment, the display screen 10 may be a liquid crystal display glass or the like, and the circuit board 20 may be a PCB circuit board or the like. In order to ensure that the display panel 100 has a relatively thin thickness, in the embodiment, the circuit board 20 is disposed adjacent to the display screen 10 and is located on the same plane, that is, the circuit board 20 and the display screen 10 are disposed side by side in the same plane, which is beneficial to reducing the thickness of the display panel 100.

The display panel 100 of the present invention utilizes the mounting groove 2112 on the circuit board 20, and one side of the chip on film 30 is connected to the display screen 10, and the other side is detachably accommodated in the mounting groove 2112, so that the display screen 10 and the circuit board 20 are detachably connected through the chip on film 30, and thus the display screen 10 and the circuit board 20 can be respectively produced and transported, and the damage of the chip on film 30, such as tearing and breaking, caused by displacement of the display screen 10 and the circuit board 20 in the transportation or moving process is avoided; further, a mounting groove 2112 is formed in the circuit board 20, and the side of the chip on film 30 is detachably received in the mounting groove 2112, so that the connection stability between the chip on film 30 and the circuit board 20 can be effectively improved.

In an embodiment, the display screen 10 includes an array substrate, a color filter substrate, and a liquid crystal layer, wherein the color filter substrate is disposed opposite to the array substrate, and the liquid crystal layer is disposed between the array substrate and the color filter substrate. In order to protect and limit the liquid crystal layer, the display screen 10 further includes a rubber frame disposed between the array substrate and the color film substrate, and the rubber frame is disposed around the periphery of the liquid crystal layer.

Optionally, the color film substrate and the array substrate are both transparent substrates, such as a glass substrate and a quartz substrate. The array substrate is provided with a plurality of scanning lines and a plurality of data lines, the plurality of scanning lines and the plurality of data lines are insulated and crossed to limit a plurality of pixel units, the plurality of pixel units are arranged on the array substrate in an array mode, and the pixel units are located in a display area of the display panel. It is understood that the scan lines and the data lines are formed of a conductive material, such as aluminum alloy or chrome metal. In the present embodiment, one end of the chip on film 30 is connected to the array substrate.

Optionally, the scan lines and the data lines on the array substrate are arranged perpendicular to each other, the scan lines are arranged in parallel at intervals, the data lines are arranged in parallel at intervals, and two adjacent data lines and two adjacent scan lines enclose to define a pixel unit.

It is understood that each pixel unit includes a switching element and a pixel electrode, and the pixel electrode is electrically connected to the corresponding scan line and data line through the switching element. The selectable switch element is a thin film transistor, the thin film transistor comprises a grid electrode, a source electrode and a drain electrode, the grid electrode is electrically connected with the corresponding scanning line, and the grid electrode and the scanning line are generally formed by the same material at the same time; the source electrode is electrically connected to the corresponding data line, and the drain electrode is electrically connected to the corresponding pixel electrode.

The source and drain electrodes are usually formed simultaneously with the data line using the same material. The thin film transistor further includes an active layer, which may include a semiconductor layer and a doped semiconductor layer, below the source and drain electrodes and above the gate electrode, and all and part of the doped semiconductor layer between the source and drain electrodes are etched away to form a TFT channel.

Specifically, when the gate electrode is turned on at a high level, the source electrode and the drain electrode are turned on through the active layer, and the image signal voltage in the data line is applied to the pixel electrode. In order to maintain the insulation between the conductive structures, the insulating layer covering the scan line and the gate electrode is a gate insulating layer, and the insulating layer covering the data line, the active layer, the source electrode and the drain electrode is a passivation layer. And the pixel electrode is formed on the passivation layer and is connected with the drain electrode through the via hole on the passivation layer. The pixel electrode may be a translucent electrode or a reflective electrode. When the pixel electrode is a translucent electrode, the pixel electrode may include a transparent conductive layer.

It is understood that the transparent conductive layer may include, for example, Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), zinc oxide (ZnO), indium oxide (In)₂O₃) At least one of Indium Gallium Oxide (IGO) and Aluminum Zinc Oxide (AZO). The pixel electrode may include a transflective layer for improving light emitting efficiency, in addition to the transparent conductive layer. The transflective layer may be a thin layer (e.g., several nanometers to tens of nanometers thick) and may include at least one of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, and Yb.

In one embodiment, as shown in fig. 1, 2, 3, 4 and 5, a connector 21 is disposed on a side of the circuit board 20 close to the chip on film 30, a mounting slot 2112 is formed on the connector 21, one side of the chip on film 30 is detachably received in the mounting slot 2112, and the chip on film 30 is detachably connected to the circuit board 20 through the connector 21.

It will be appreciated that the connector 21 may be an electrical connector of a circuit board connector, and the connector 21 is advantageous for improving electrical connectivity, and it is generally necessary to secure the circuit board 20 to the connector 21 so as to ensure a secure connection between the circuit board 20 and the connector 21.

In an embodiment, as shown in fig. 2, 3, 4 and 5, the connector 21 includes a housing 211 and at least one signal terminal 212, wherein the housing 211 forms an accommodating cavity 2111, the signal terminal 212 is disposed in the accommodating cavity 2111, the signal terminal 212 and a cavity wall of the accommodating cavity 2111 enclose to form a connecting groove 2113 and a mounting groove 2112, that is, the signal terminal 212 in the accommodating cavity 2111 divides the accommodating cavity 2111 into the connecting groove 2113 and the mounting groove 2112.

It will be appreciated that a side edge of the circuit board 20 is limitedly mounted in the connecting slot 2113 and abuts against the signal terminal 212, thereby ensuring a secure connection between the circuit board 20 and the connector 21. One side of the chip on film 30 is detachably received in the mounting groove 2112 and abuts against the signal terminal 212, and the circuit board 20 is electrically connected to the chip on film 30 through the signal terminal 212.

The flip chip 30 is detachably connected to the mounting groove 2112 of the connector 21. On one hand, the display screen 10 and the circuit board 20 are respectively produced and transported, and the convenience of production and transportation is improved; on the other hand, the flip-chip film 30 can be securely and reliably connected to the mounting groove 2112 of the connector 21, so as to ensure the electrical connection between the display screen 10 and the circuit board 20.

In one embodiment, as shown in fig. 3, 4 and 5, the connector 21 further includes a locking arm 213 rotatably disposed on the housing 211, i.e. the locking arm 213 is disposed on the housing 211, and the locking arm 213 can rotate relative to the housing 211, and the connector 21 has a locked state in which the locking arm 213 rotates and locks the housing 211 to form the mounting slot 2112, and an unlocked state in which the locking arm 213 rotates and releases the housing 211 to open the mounting slot 2112.

In this embodiment, in the locked state, one side of the chip on film 30 is locked in the mounting groove 2112 via the locking arm 213; in the unlocked state, one side of the flip-chip 30 is separated from the mounting slot 2112.

It can be understood that the mounting and locking of the flip chip 30 are realized by the locking arm 213, which improves the convenience of the assembly of the circuit board 20 and the flip chip 30 on one hand; on the other hand, the connection stability between the connector 21 and the chip on film 30 is improved.

In one embodiment, as shown in fig. 2, 3, 6, 7 and 8, the flip chip 30 includes a connection side 36 connected to the circuit board 20, a support layer 37 is disposed on a surface of the connection side 36, and the connection side 36 and the support layer 37 are detachably received in the mounting slot 2112.

It will be appreciated that the support layer 37 is advantageous to further improve the stability of the flip chip 30 mounted in the mounting slot 2112 of the connector 21. In the present embodiment, the supporting layer 37 can support the mounting stability of the mounting grooves 2112 of the flip chip 30 and the connector 21. Optionally, the support layer 37 is a polyester plastic layer. The material of the support layer 37 may be polyethylene terephthalate (PET), polybutylene terephthalate (PBT), polytrimethylene terephthalate (PTT), polycycloethylene terephthalate (PCT), polyethylene naphthalate (PEN), or the like, but is not limited thereto.

In one embodiment, as shown in fig. 2, 3, 6, 7 and 8, an adhesive layer 38 is also provided between the attachment side 36 and the support layer 37. It is understood that the adhesive layer 38 is provided to improve the adhesion between the flip chip film 30 and the supporting layer 37.

In one embodiment, the thickness of the support layer 37 is 210um to 219 um. It is understood that the thickness of the support layer 37 may be selected to be 210um, 211um, 212um, 213um, 214um, 215um, 216um, 217um, 218um, or 219 um. The thickness of the supporting layer 37 may not be too thick or too thin, and the too thick thickness of the supporting layer 37 may increase the volume of the connector 21, or affect the assembling stability and firmness of the connector 21 and the flip chip film 30, and at the same time, increase the cost; if the thickness of the supporting layer 37 is too small, the stability of the mounting grooves 2112 of the flip chip 30 and the connector 21 cannot be achieved well, which causes the poor connection between the display screen 10 of the display panel 100 and the circuit board 20, and the like, resulting in an increase in defective product rate. The thickness of the supporting layer 37 is set within the range from 210um to 219um, so that the volume requirement of the connector 21 can be ensured, the installation stability of the flip chip 30 and the installation groove 2112 of the connector 21 can be effectively realized, and the defective rate of the display panel 100 is reduced and improved.

In one embodiment, the thickness of the adhesive layer 38 is 1um to 10 um. It is understood that the thickness of the adhesive layer 38 can be selected to be 1um, 2um, 3um, 4um, 5um, 6um, 7um, 8um, 9um or 10 um. The thickness of the adhesive layer 38 cannot be set too thick or too thin, and setting the thickness of the adhesive layer 38 too thick will result in increasing the volume of the connector 21 and causing cost increase; the adhesive layer 38 is too thin, which may not achieve good adhesion stability between the flip chip film 30 and the supporting layer 37, and thus may cause the supporting layer 37 to be separated from the flip chip film 30, which may affect the assembly stability and firmness of the connector 21 and the flip chip film 30.

In an embodiment, as shown in fig. 1, fig. 2, fig. 6, fig. 7 and fig. 8, the surface of the flip-chip film 30 facing away from the supporting layer 37 is provided with a driving chip 35, and the driving chip 35 is used for generating a driving signal. It can be understood that the driving chip 35 is disposed on the surface of the flip-chip film 30 opposite to the supporting layer 37, which is beneficial to prevent the driving chip 35 from being affected or damaged by the disposition of the supporting layer 37, and thus the conduction performance between the display screen 10 and the circuit board 20 is affected.

Of course, in order to avoid the interference between the driver chip 35 and the circuit board 20, the driver chip 35 is disposed on the side of the chip on film 30 opposite to the circuit board 20, so that the circuit board 20 may not be designed with a slot structure, thereby effectively reducing the width of the circuit board 20.

In an embodiment, as shown in fig. 6, 7 and 8, the chip on film 30 includes a guiding layer 31, a first insulating layer 32 and a second insulating layer 33, wherein the guiding layer 31 is used for communicating the display screen 10 with the circuit board 20, one end of the guiding layer 31 is connected to the display screen 10, and the other end is detachably connected to the circuit board 20 through the connector 21; the first insulating layer 32 is arranged on one side of the guide layer 31, which faces away from the display screen 10 and the circuit board 20, and the driving chip 35 is arranged on the first insulating layer 32 and is electrically connected with the guide layer 31; a second insulating layer 33 is provided on the side of the guiding layer 31 facing the display screen 10 and the circuit board 20, and a supporting layer 37 is provided on the second insulating layer 33.

Alternatively, the area of the second insulating layer 33 is smaller than that of the guide layer 31. It can be understood that the guiding layer 31 is disposed between the first insulating layer 32 and the second insulating layer 33, and the area of the second insulating layer 33 is set to be smaller than the area of the guiding layer 31, so that the two ends of the guiding layer 31 can be exposed, thereby facilitating the connection of one end of the guiding layer 31 with the display screen 10 and the connection of the other end with the circuit board 20, and ensuring the connection of the guiding layer 31 with the display screen 10 and the circuit board 20.

In the present embodiment, the second insulating layer 33 is disposed on a side of the guiding layer 31 facing the display screen 10 and the circuit board 20, that is, the second insulating layer 33 is used to protect the guiding layer 31 between the display screen 10 and the circuit board 20, and prevent the guiding layer 31 from being damaged or conducting with other electronic components. The first insulating layer 32 is provided on a side of the guide layer 31 facing away from the display screen 10 and the circuit board 20. Optionally, the driving chip 35 is disposed on the first insulating layer 32, that is, the driving chip 35 is disposed on a side of the chip on film 30 opposite to the circuit board 20, which is beneficial to prevent the driving chip 35 on the chip on film 30 from interfering with the circuit board 20. Of course, the driving chip 35 is provided on the second insulating layer 33.

In the present embodiment, the driving chip 35 is electrically connected to the guiding layer 31 of the chip on film 30, and the driving chip 35 is used for generating a driving signal, so that the driving chip 35 is in communication with the display screen 10 and the circuit board 20 through the guiding layer 31.

In one embodiment, the thickness of the guiding layer 31 is 6um to 10 um. It is understood that the thickness of the guide layer 31 may be selected to be 6um, 7um, 8um, 9um or 10 um. The thickness of the guide layer 31 cannot be set too thick or too thin, and setting the thickness of the guide layer 31 too thick will result in increasing the thickness of the display panel 100, resulting in increased cost; if the thickness of the guide layer 31 is too small, the display panel 10, the circuit board 20, and the driver chip 35 cannot be connected well, which leads to an increase in the defective rate. The thickness setting of guiding layer 31 is in 6um to 10um within range, both can guarantee display panel 100's thickness requirement, and intercommunication display screen 10, circuit board 20 and driver chip 35 that again can be good effectively reduce display panel 100's defective index and improve.

In one embodiment, the thickness of the first insulating layer 32 is 36um to 40 um. It is understood that the thickness of the first insulating layer 32 can be selected to be 36um, 37um, 38um, 39um, or 40 um. The thickness of the first insulating layer 32 may not be set too thick or too thin, and setting the thickness of the first insulating layer 32 too thick will result in increasing the thickness of the display panel 100, resulting in increased cost; if the thickness of the first insulating layer 32 is too thin, the guide layer 31 cannot be protected well, which is not favorable for achieving the insulating effect, and thus the defective rate of the display panel 100 increases. The thickness of the first insulating layer 32 is set in the range of 36um to 40um, so that the thickness requirement of the display panel 100 can be guaranteed, the insulating effect can be effectively realized, and the defective rate of the display panel 100 is reduced.

In one embodiment, the thickness of the second insulating layer 33 is 5um to 15 um. It is understood that the thickness of the second insulating layer 33 can be selected to be 5um, 6um, 7um, 8um, 9um, 10um, 11um, 12um, 13um, 14um or 15 um. The thickness of the second insulating layer 33 may not be set too thick or too thin, and setting the thickness of the second insulating layer 33 too thick will result in increasing the thickness of the display panel 100, resulting in increased cost; if the thickness of the second insulating layer 33 is too small, the guide layer 31 cannot be protected well, which is disadvantageous for achieving the insulating effect, and thus the defective product rate of the display panel 100 increases. The thickness setting of second insulating layer 33 is in 5um to 15um within range, both can guarantee display panel 100's thickness requirement, can effectively realize insulating effect again, reduces display panel 100's defective index and improves.

In one embodiment, as shown in fig. 8, the guiding layer 31 includes an ion implantation layer 311 implanted on the surface of the first insulating layer 32 by an ion implantation method and a plasma deposition layer 312 deposited on the ion implantation layer 311, and the second insulating layer 33 is disposed on a side of the plasma deposition layer 312 facing away from the ion implantation layer 311.

It is understood that the ion implantation layer 311 may be implanted into the surface of the first insulating layer 32 by an ion implantation method, or the ion implantation layer 311 may be implanted into the first insulating layer 32 by an ion implantation method to a certain depth (e.g., 1-100 nm), and the like, which is not limited herein. The plasma deposition layer 312 is attached to or deposited on the ion implantation layer 311.

In one embodiment, the ion implantation layer 311 is made of a conductive material as a target material, and metal ions are generated by ionizing the target material by an arc action in a vacuum environment using a metal vapor vacuum arc ion source (MEVVA). The ions are then accelerated under high voltage electric fields to obtain very high energies (e.g., 5-1000keV, such as 10keV, 50keV, 100keV, 200keV, 500keV, etc.). Next, the energetic metal ions directly strike the surface of the first insulating layer 32 at a high speed and are implanted into a depth range (e.g., 1-100nm, such as 5nm, 10nm, 20nm, 50nm, etc.) below the surface of the first insulating layer 32. A chemical bond or interstitial structure is formed between the implanted metal ions and the material molecules of the first insulating layer 32, thereby constituting a doped structure. The outer surface (or referred to as the top surface) of the ion-implanted layer 311 is flush with the outer surface of the surface layer of the first insulating layer 32, and the inner surface (or referred to as the bottom surface) of the ion-implanted layer is deep into the surface layer of the first insulating layer 32. For example, the ion implantation layer 311 is located at a depth of 1 to 100nm (e.g., 5 to 50nm) below the surface of the first insulating layer 32. Of course, the ion implantation layer 311 may be implanted on the surface of the first insulating layer 32 by an ion implantation method, which is not limited herein.

In one embodiment, the plasma deposition layer 312 is located on the ion implantation layer 311 and is connected to the ion implantation layer 311. The plasma deposition layer 312 may be implemented using a plasma deposition method. Similar to the ion implantation described above, plasma deposition may also be performed in the ion implantation and deposition apparatus, except that a lower voltage is applied to cause the metal ions to have a lower energy. Specifically, during plasma deposition, the high voltage electric field similarly arcs over the surface of the metal target, forming an arc spot. The metal particles at the target surface at the arc spot are ionized and detached from the target surface. Thus, the ionized metal particles are subjected to an accelerating electric field with a voltage of 1-1000V to obtain an energy in the range of 1-1000 eV. These electric field accelerated particles are then deposited on the ion implantation layer 311, forming a plasma deposition layer 312. Of course, in plasma deposition, the same or different conductive material as ion implantation may be used as the target. For example, various metals, alloys, conductive oxides, conductive carbides, conductive organics, etc. may be used, but are not limited thereto.

In one embodiment, the plasma deposition layer 312 may include one or more layers. Depending on the product requirements, two film systems may be used for the plasma deposition layer 312: metal deposition layer/copper deposition layer.

In one embodiment, as shown in FIG. 8, the guiding layer 31 further comprises a metal thickening layer 313, the metal thickening layer 313 being plated on the plasma deposition layer 312. It is understood that the metal thickening layer 313 may be obtained by electroplating. In some embodiments, by controlling relevant parameters of the electroplating process, including: the plating current, voltage, time, etc., may be controlled to a thickness of the metal thickening layer, for example, as thin as 1.0 μm. Compared with chemical plating, vacuum evaporation plating, sputtering and other methods, the electroplating method has the advantages of high speed, low cost and wide range of electroplatable materials, and can be used for Cu, Ni, Sn, Ag, alloys of the Cu, the Ni, the Sn and the Ag, and the like. A metal thickening layer 313 is located on the plasma deposition layer 312. Optionally, metal thickening layer 313 is comprised of one or more of Al, Mn, Fe, Ti, Cr, Co, Ni, Cu, Ag, Au, V, Zr, Mo, Nb, and alloys therebetween. In one embodiment, metal thickening layer 313 is a thickened copper layer. Alternatively, in another embodiment, the guiding layer 31 may include only the ion implantation layer 311 and the plasma deposition layer 312 without the metal thickening layer 313.

In an embodiment, as shown in fig. 6 and 7, the chip on film 30 further includes a conductive adhesive layer 34, the first insulating layer 32 has a through hole 321 corresponding to the driving chip 35, the conductive adhesive layer 34 is disposed in the through hole 321, and the conductive adhesive layer 34 is a plurality of conductive adhesive posts 341 connecting the driving chip 35 and the guiding layer 31.

In order to facilitate the arrangement of the conductive adhesive layer 34 and to achieve the connection between the conductive adhesive layer 34 and the driving chip 35 and the guiding layer 31, in this embodiment, the first insulating layer 32 has a through hole 321 corresponding to the driving chip 35, and the conductive adhesive layer 34 is disposed in the through hole 321. It is understood that the conductive adhesive layer 34 is formed of a plurality of conductive adhesive posts 341, and the plurality of conductive adhesive posts 341 are used to connect the driving chip 35 and the guiding layer 31.

In the present embodiment, the conductive paste column 341 is anisotropic conductive paste (ACF). This ensures electrical connection between the driver chip 35 and the guide layer 31, and prevents short circuit between the driver chip 35 and the inside of the guide layer 31.

In an embodiment, as shown in fig. 6 and 7, a plurality of metal bumps 351 are formed on the driving chip 35 corresponding to the through holes 321, each metal bump 351 corresponds to one conductive adhesive column 341, and one end of each conductive adhesive column 341 is connected to the metal bump 351 and the other end is connected to the guiding layer 31. It can be understood that, by forming the metal bump 351 on the driving chip 35 and pressing the conductive adhesive pillar 341 with the metal bump 351, the contact area between the driving chip 35 and the conductive adhesive pillar 341 is increased, which is also beneficial to pressurizing the conductive adhesive pillar 341, thereby increasing the power-on performance between the driving chip 35 and the guiding layer 31.

Certainly, in other embodiments, the guiding layer 31 may also be provided with a metal bump corresponding to the conductive adhesive pillar 341, so that the area of the external electrical connection of the guiding layer 31 is increased by forming the metal bump on the guiding layer 31, and meanwhile, the conductivity of the driving chip 35 and the guiding layer 31 is further improved by the connection and the pressing of the upper and the lower metal bumps.

Optionally, in this embodiment, the conductive adhesive pillar 341, the metal bump 351, and the metal bump of the guide layer 31 are all cylindrical, and the cross-sectional diameter of the conductive adhesive pillar 341 is larger than the cross-sectional diameters of the metal bump 351 and the metal bump of the guide layer 31. Thus, the metal bump 351 and the metal bump of the guide layer 31 are fully connected, and the conductivity between the driving chip 35 and the guide layer 31 is improved.

In an embodiment, a plurality of pads are further formed on the guiding layer 31, the pads correspond to the metal bumps 351 one to one, and one end of the conductive adhesive column 341 is connected to the metal bump 351, and the other end is connected to the pad. It can be understood that, by forming the pad on the guiding layer 31, the area of external electrical connection of the guiding layer 31 is increased, and meanwhile, by the connection and the pressing between the metal bump of the guiding layer 31 and the pad, the conductivity between the driving chip 35 and the guiding layer 31 is further improved.

In one embodiment, as shown in fig. 6, 7 and 8, the first insulating layer 32 is an organic polymer film substrate. It is understood that the organic polymer film substrate may use one or more of PI, PTO, PC, PSU, PES, PPS, PS, PE, PP, PEI, PTFE, PEEK, PA, PET, PEN, LCP, or PPA. As an alternative embodiment of this embodiment, the first insulating layer 32 is a PI film insulating substrate. Since the PI film is relatively transparent, the wiring of the guide layer 31 can be recognized therethrough, so that the positional matching when mounting the driver chip 35 is relatively easy.

In one embodiment, as shown in fig. 6, 7 and 8, the second insulating layer 33 is one or more of polyethylene terephthalate, polybutylene terephthalate, polytrimethylene terephthalate, polycycloethylene terephthalate or polyethylene naphthalate. It is understood that the second insulating layer 33 includes polyester (polyester) based resin having an insulating property to function as an insulating layer. The polyester-based resin includes, but is not limited to, materials such as polyethylene terephthalate (PET), polybutylene terephthalate (PBT), polytrimethylene terephthalate (PTT), polycycloethylene terephthalate (PCT), and polyethylene naphthalate (PEN). In order to maximize the insulating effect of the second insulating layer 33, as well as the scratch prevention, the generation of the foreign matter of the conductive substance, and the heat dissipation effect, the thickness of the second insulating layer 33 is set to 5um to 15 um.

In an embodiment, as shown in fig. 1, 2 and 3, the display panel 100 includes a display screen 10, a circuit board 20 and a chip on film 30, wherein the circuit board 20 is disposed adjacent to the display screen 10, a connector 21 is disposed on one side of the circuit board 20, and a mounting groove 2112 is formed in the connector 21; the flip chip 30 is disposed on the same side of the display screen 10 and the circuit board 20, the flip chip 30 has a first connection side and a second connection side opposite to each other, the first connection side is connected to the display screen 10, the second connection side is provided with a support layer 37 and an adhesive layer 38, the adhesive layer 38 is disposed between the second connection side and the support layer 37, the second connection side, the adhesive layer 38 and the support layer 37 are detachably accommodated in the mounting groove 2112, a driving chip 35 is disposed on a surface of the flip chip 30 opposite to the support layer 37, and the driving chip 35 is used for generating a driving signal.

The present invention further provides a display device, including the display panel 100. The specific structure of the display panel 100 refers to the foregoing embodiments. Since the display device adopts all the technical solutions of all the embodiments, at least all the beneficial effects brought by the technical solutions of the embodiments are achieved, and no further description is given here.

The above is only the optional embodiment of the present invention, and not the scope of the present invention is limited thereby, all the equivalent structure changes made by the contents of the specification and the drawings are utilized under the inventive concept of the present invention, or the direct/indirect application in other related technical fields is included in the patent protection scope of the present invention.

Claims

1. A display panel, comprising:

a display screen;

2. The display panel of claim 1, wherein a connector is disposed on a side of the circuit board adjacent to the flip-chip, the connector is formed with the mounting groove, a side of the flip-chip is detachably received in the mounting groove, and the flip-chip is detachably connected to the circuit board through the connector.

3. The display panel of claim 2, wherein the connector comprises:

the shell is provided with an accommodating cavity;

4. The display panel of claim 3, wherein the connector further comprises a locking arm disposed on the housing, the locking arm being rotatable relative to the housing, the connector having a locked state in which the locking arm rotates and locks the housing to form the mounting slot, and an unlocked state in which the locking arm rotates and releases the housing to open the mounting slot;

5. The display panel according to any one of claims 1 to 4, wherein the flip-chip film includes a connection side connected to the circuit board, a surface of the connection side is provided with a support layer, and the connection side and the support layer are detachably received in the mounting groove.

6. The display panel of claim 5, wherein an adhesive layer is further disposed between the connecting side and the support layer.

7. The display panel according to claim 6, wherein the support layer has a thickness of 210um to 219 um; the thickness of the adhesive layer is 1-10 um;

and/or the supporting layer is a polyester plastic layer.

8. The display panel of claim 5, wherein a surface of the flip chip film facing away from the support layer is provided with a driving chip, and the driving chip is configured to generate a driving signal.

9. A display panel, comprising:

a display screen;

10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.