CN209867691U - Four-axis PEG and laser clock synchronization board card - Google Patents

Four-axis PEG and laser clock synchronization board card Download PDF

Info

Publication number
CN209867691U
CN209867691U CN201920325979.8U CN201920325979U CN209867691U CN 209867691 U CN209867691 U CN 209867691U CN 201920325979 U CN201920325979 U CN 201920325979U CN 209867691 U CN209867691 U CN 209867691U
Authority
CN
China
Prior art keywords
laser
pulse
circuit
interface
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201920325979.8U
Other languages
Chinese (zh)
Inventor
赵裕兴
顾卫荣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Delphi Laser Co Ltd
Original Assignee
Suzhou Delphi Laser Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Delphi Laser Co Ltd filed Critical Suzhou Delphi Laser Co Ltd
Priority to CN201920325979.8U priority Critical patent/CN209867691U/en
Application granted granted Critical
Publication of CN209867691U publication Critical patent/CN209867691U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The utility model discloses a synchronous integrated circuit board of four-axis PEG and laser clock, four grating chi signal interfaces that are used for inserting axle grating chi signal change unipolar and pulse filter circuit connection CPU through the difference respectively, ETHERCAT interface input end and ETHERCAT interface output pass through ETHERCAT drive circuit and connect CPU, the laser clock pulse interface passes through laser clock pulse conversion and filter circuit connects CPU, the laser pulse output interface is connected with CPU through laser pulse conversion and filter circuit. The function that the pulse output of the laser can be triggered according to the vector position is realized by acquiring and controlling the data of the laser and the grating ruler of the motion platform, so that the laser pulse can be triggered according to the plane track under various laser processing paths and platform motion conditions such as straight line, special shape, acceleration and deceleration and the like, and the processing precision and effect are ensured.

Description

Four-axis PEG and laser clock synchronization board card
Technical Field
The utility model relates to a four-axis PEG and laser clock synchronization integrated circuit board based on ETHERCAT communication protocol.
Background
When the laser is used for linear or special-shaped cutting; when the platform operates at acceleration and deceleration, laser pulse dotting is not uniform; at present, the consistency of laser cutting is ensured; switching on and off the laser when the platform runs to a constant speed stage; this seriously affects the processing efficiency.
The current motion control card cannot support the double-shaft vector position triggering function, so that the cutting consistency cannot be ensured during the special-shaped cutting processing.
SUMMERY OF THE UTILITY MODEL
The utility model aims at overcoming the not enough of prior art existence, provide a four-axis PEG and laser clock synchronization integrated circuit board based on ETHERCAT communication protocol.
The purpose of the utility model is realized through the following technical scheme:
four-axis PEG and laser clock synchronization integrated circuit board, characteristics are: the laser grating scale signal conversion and filtering circuit comprises four grating scale signal interfaces for accessing shaft grating scale signals, four differential-to-unipolar and pulse filtering circuits, a laser clock pulse conversion and filtering circuit, a laser pulse conversion and filtering circuit and an ETHERCAT driving circuit, wherein each grating scale signal interface is respectively connected with a CPU through the differential-to-unipolar and pulse filtering circuit, the input end of the ETHERCAT interface and the output end of the ETHERCAT interface are connected with the CPU through the ETHERCAT driving circuit, the laser clock pulse interface is connected with the CPU through the laser clock pulse conversion and filtering circuit, and the laser pulse output interface is connected with the CPU through the laser pulse conversion and filtering circuit.
Further, the four-axis PEG and laser clock synchronization board card further comprises an IO conversion circuit, and the IO interface is connected to the CPU through the IO conversion circuit.
Further, in the four-axis PEG and laser clock synchronization board, the IO conversion circuit is an optocoupler chip with a model of PS 2505.
Further, the four-axis PEG and the laser clock synchronization board further include a USB communication circuit, and the USB interface is connected to the CPU through the USB communication circuit.
Further, in the four-axis PEG and laser clock synchronization board, the USB communication circuit is a chip of which the model is STM32F 103.
Further, in the four-axis PEG and laser clock synchronization board, the differential-to-unipolar and pulse filter circuit is an AM26C32 chip.
Further, in the four-axis PEG and laser clock synchronization board, the laser clock pulse conversion and filter circuit is an optocoupler chip with a model number of 6N 137.
Further, in the four-axis PEG and laser clock synchronization board, the laser pulse conversion and filter circuit is a chip with a model of AM26C 31.
Further, in the four-axis PEG and laser clock synchronization board, the ethernet driver circuit is an ethernet driver control chip of the type LAN 9252.
Compared with the prior art, the utility model have apparent advantage and beneficial effect, the concrete aspect that embodies is in following:
firstly, four-axis grating ruler signals are accessed through corresponding grating ruler signal interfaces, high-frequency interference signals of the grating ruler ABZ phase signals are filtered and removed through conversion of a differential conversion unipolar and pulse filter circuit and corresponding filtering, and then the grating ruler ABZ phase signals are accessed into a CPU, and the CPU carries out calculation according to phase angles and pulses of an AB two phase to obtain a position coordinate system of a platform;
the laser clock pulse interface is connected with a laser clock pulse conversion and filter circuit, and after corresponding filtering, the high-frequency interference part of the pulse of the laser clock signal is filtered, and then the laser clock signal is accessed to a CPU (central processing unit) to capture the high-speed laser clock signal;
the laser pulse output interface is an output laser pulse interface, and simultaneously synchronizes a clock signal of laser according to the captured vector coordinate system of the two-axis grating ruler and the vector distance set by a user to realize the equidistant triggering of the planar laser;
and fourthly, the board card realizes the function that the pulse output of the laser can be triggered according to the vector position by acquiring and controlling the data of the laser and the grating ruler of the motion platform, so that the laser pulse can be triggered according to the plane track under various laser processing paths and platform motion conditions of straight lines, abnormal shapes, acceleration and deceleration and the like, and the processing precision and effect are ensured.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention, and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
FIG. 1: the utility model discloses a framework schematic diagram.
The meanings of the reference symbols in the figures are given in the following table:
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. The components of embodiments of the present invention, as generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the accompanying drawings, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. Based on the embodiment of the present invention, all other embodiments obtained by the person skilled in the art without creative work belong to the protection scope of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present invention, the directional terms and the sequence terms and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
As shown in fig. 1, the four-axis PEG and laser clock synchronization board card includes four grating scale signal interfaces for accessing the axis grating scale signal, four differential-to-unipolar and pulse filter circuits, a laser clock pulse conversion and filter circuit 116, a laser pulse conversion and filter circuit 113 and an ethernet drive circuit 104, the first grating scale signal interface 105 is connected to the ARM CPU101 through the first differential-to-unipolar and pulse filter circuit 106, the second grating scale signal interface 107 is connected to the ARM CPU101 through the second differential-to-unipolar and pulse filter circuit 108, the third grating scale signal interface 109 is connected to the ARM CPU101 through the third differential-to-unipolar and pulse filter circuit 110, the fourth grating scale signal interface 111 is connected to the ARM CPU101 through the fourth differential-to-unipolar and pulse filter circuit 112, the input terminal 102 of the ethernet interface and the output terminal 103 of the ethernet interface are connected to the ARM CPU101 through the ethernet drive circuit 104, the laser clock pulse interface 115 is connected to the ARM CPU101 through the laser clock pulse conversion and filter circuit 116, the laser pulse output interface 114 is connected with the ARM CPU101 through a laser pulse conversion and filter circuit 113; the IO interface 117 is connected to the ARM CPU101 through an IO conversion circuit 118, and the USB interface 120 is connected to the ARM CPU101 through a USB communication circuit 119.
When the specific design is implemented, the IO conversion circuit 118 is a PS2505 opto-coupler chip. The USB communication circuit 120 is a chip of model STM32F 103. The four differential-to-unipolar and pulse filter circuits are chips of type AM26C 32. The laser clock pulse conversion and filtering circuit 116 is a high-speed optocoupler chip with a model number of 6N 137. The laser pulse conversion and filtering circuit 113 is a chip of type AM26C 31. The ethernet driver circuit 104 is an ethernet driver control chip of model number LAN 9252.
The board card is connected and communicated with an EtherCat master station in real time through an ETHERCAT bus, and the master station can set relevant parameters and actions of the board card in real time; and the board card is controlled according to the parameters and the action requirements.
The system is provided with a four-axis grating ruler and an encoder access interface, and can match any two axes through parameters. Has USB communication function and automatic communication parameter system adaptation.
When the method is applied specifically, 4 axis grating ruler signals are accessed through corresponding grating ruler signal interfaces, high-frequency interference signals of grating ruler ABZ phase signals are filtered and removed through conversion of a difference conversion unipolar and pulse filter circuit and corresponding filtering, and then the high-frequency interference signals are accessed to a CPU, and the CPU carries out calculation according to phase angles and pulses of AB two phases to obtain a position coordinate system of the platform.
The laser clock pulse interface 115 is connected to a laser clock pulse conversion and filtering circuit, and after filtering the high-frequency interference part of the pulse of the laser clock signal by corresponding filtering, the high-frequency interference part is connected to the CPU to capture the high-speed laser clock signal.
The laser pulse output interface is used for outputting laser pulses, and synchronous laser clock signals are simultaneously generated according to the captured vector coordinate system of the two-axis grating ruler and the vector distance set by a user, so that planar laser equidistant triggering is realized.
The system supports an ETHERCAT communication function and can be connected with an ETHERCAT master station such as ACS, BECKOFF and the like. The laser control system has the functions of USB and serial port communication and realizes the laser control of the laser clock synchronization function.
The laser output interface has four modes: 1) no laser clock synchronous signal is accessed for double-shaft PEG output; 2) connecting to a double-shaft PEG output synchronous with the laser clock; 3) high-low level mode; 4) and PWM pulse train output, and the duty ratio and the frequency are adjustable.
The system has an external IO port control mode, four-axis grating ruler access and output interfaces, and a laser GATE signal output interface.
To sum up, the utility model discloses the integrated circuit board realizes the function that laser instrument pulse output can trigger according to the vector position through to laser instrument and motion platform grating chi data acquisition control to this guarantees under various laser processing route and platform motion conditions such as straight line, dysmorphism, acceleration and deceleration, and laser pulse homoenergetic triggers according to the plane orbit, thereby has guaranteed machining precision and effect.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
The above description is only for the specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present invention, and all should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

Claims (9)

1. Four-axis PEG and the synchronous integrated circuit board of laser clock, its characterized in that: the laser grating scale signal conversion and filtering circuit comprises four grating scale signal interfaces for accessing shaft grating scale signals, four differential-to-unipolar and pulse filtering circuits, a laser clock pulse conversion and filtering circuit, a laser pulse conversion and filtering circuit and an ETHERCAT driving circuit, wherein each grating scale signal interface is respectively connected with a CPU through the differential-to-unipolar and pulse filtering circuit, the input end of the ETHERCAT interface and the output end of the ETHERCAT interface are connected with the CPU through the ETHERCAT driving circuit, the laser clock pulse interface is connected with the CPU through the laser clock pulse conversion and filtering circuit, and the laser pulse output interface is connected with the CPU through the laser pulse conversion and filtering circuit.
2. The four-axis PEG and laser clock synchronization board card of claim 1, wherein: the system also comprises an IO conversion circuit, and the IO interface is connected with the CPU through the IO conversion circuit.
3. The four-axis PEG and laser clock synchronization board card of claim 2, wherein: the IO conversion circuit is an optical coupling chip with the model PS 2505.
4. The four-axis PEG and laser clock synchronization board card of claim 1, wherein: the USB interface is connected with the CPU through the USB communication circuit.
5. The four-axis PEG and laser clock synchronization board card of claim 4, wherein: the USB communication circuit is a chip with the model number of STM32F 103.
6. The four-axis PEG and laser clock synchronization board card of claim 1, wherein: the differential-to-unipolar and pulse filter circuits are all chips with the model number of AM26C 32.
7. The four-axis PEG and laser clock synchronization board card of claim 1, wherein: the laser clock pulse conversion and filter circuit is an optical coupling chip with the model number of 6N 137.
8. The four-axis PEG and laser clock synchronization board card of claim 1, wherein: the laser pulse conversion and filter circuit is a chip with the model number of AM26C 31.
9. The four-axis PEG and laser clock synchronization board card of claim 1, wherein: the ETHERCAT driving circuit is an ETHERCAT driving control chip with the model number of LAN 9252.
CN201920325979.8U 2019-03-14 2019-03-14 Four-axis PEG and laser clock synchronization board card Active CN209867691U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201920325979.8U CN209867691U (en) 2019-03-14 2019-03-14 Four-axis PEG and laser clock synchronization board card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201920325979.8U CN209867691U (en) 2019-03-14 2019-03-14 Four-axis PEG and laser clock synchronization board card

Publications (1)

Publication Number Publication Date
CN209867691U true CN209867691U (en) 2019-12-31

Family

ID=68955031

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201920325979.8U Active CN209867691U (en) 2019-03-14 2019-03-14 Four-axis PEG and laser clock synchronization board card

Country Status (1)

Country Link
CN (1) CN209867691U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109967894A (en) * 2019-03-14 2019-07-05 苏州德龙激光股份有限公司 Four axis PEG and the synchronous board of laser clock
CN109967894B (en) * 2019-03-14 2024-05-14 苏州德龙激光股份有限公司 Four-axis PEG and laser clock synchronous board card

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109967894A (en) * 2019-03-14 2019-07-05 苏州德龙激光股份有限公司 Four axis PEG and the synchronous board of laser clock
CN109967894B (en) * 2019-03-14 2024-05-14 苏州德龙激光股份有限公司 Four-axis PEG and laser clock synchronous board card

Similar Documents

Publication Publication Date Title
CN107505882A (en) A kind of multi-axis motion controller and control method
CN207281544U (en) Universal real time kinematics control system based on EtherCAT buses
CN203455835U (en) Bus triggering backplate applied to PXI (PCI extension for instrumentation) test platform
CN209867691U (en) Four-axis PEG and laser clock synchronization board card
CN106227097A (en) Multibus multi-axis motion controller
CN1452312A (en) Full-digital subdivision high-accuracy stepper motor controller
CN109967894B (en) Four-axis PEG and laser clock synchronous board card
CN104536330A (en) Data communication device for absolute value encoder with SSI
CN206563892U (en) A kind of novel universal servo-drive EtherCAT bus interface modules
CN210804034U (en) Motion control card
CN108015771A (en) A kind of industrial robot control system
CN111505992B (en) Multichannel laser galvanometer motion control system with multiple connection modes
CN115685886A (en) Linkage laser marking control card based on EtherCAT network communication
CN111230323A (en) Special-shaped cutting machining control system and method based on double-shaft track position coordinates
CN107592286A (en) A kind of intelligent communications terminal and its implementation for supporting multi-protocols
CN104181901A (en) Upper computer centralized management and multi-level control system based on VxWorks
CN115396256A (en) RS 485-based networking mode for rapidly acquiring data
CN211708405U (en) Special-shaped cutting processing control system based on double-shaft track position coordinates
CN204155117U (en) A kind of big-power transducer control system
CN212034137U (en) PROFIBUS-DP and CC-Link protocol converter
CN210867732U (en) SPI changes ethernet interface circuit and frequency conversion controller
CN211349034U (en) Multi-axis motion controller based on FPGA
CN104635626A (en) Laser micro-processing control system
CN104035399A (en) Large-power inverter control system and control method thereof
CN202094918U (en) General servo pulse value interface module of ether CAT bus

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant