CN209821820U - Interface conversion circuit - Google Patents
Interface conversion circuit Download PDFInfo
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- CN209821820U CN209821820U CN201920978863.4U CN201920978863U CN209821820U CN 209821820 U CN209821820 U CN 209821820U CN 201920978863 U CN201920978863 U CN 201920978863U CN 209821820 U CN209821820 U CN 209821820U
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Abstract
The utility model provides an interface conversion circuit, input interface can connect USB OTG interface line or UART debugging serial port line, if the input interface connects USB OTG interface line, the main control chip control be used for connecting in the switching circuit input interface with the circuit conduction of USB OTG interface, so that input interface with USB OTG interface connection; if the input interface is connected with the UART debugging serial port line, the main control chip controls the circuit which is used for connecting the input interface and the UART debugging serial port in the switching circuit to be conducted so as to enable the input interface to be connected with the UART debugging serial port. The interface conversion circuit provided by the embodiment realizes the compatibility of the USB OTG interface and the UART debugging serial port.
Description
Technical Field
The utility model relates to an interface conversion field, more specifically say, relate to an interface conversion circuit.
Background
The intelligent sound box device is mostly connected and debugged in an Android Debug Bridge (ADB) (android Debug bridge) mode through a USB OTG (USB On-The-Go) interface. When the ADB needs to complete system start-up of the device, it can be connected after the ADB service is run. The UART debugging serial port of the universal asynchronous receiving and transmitting transmitter can acquire complete information of the starting process of the equipment and carry out bottom layer control on the equipment. The UART debugging serial port is generally arranged inside a machine.
In the prior art, the USB OTG interface and the UART debugging serial port are two different interfaces which are incompatible with each other.
SUMMERY OF THE UTILITY MODEL
For solving USB OTG interface and UART debugging serial ports and being two different interfaces, incompatible problem each other, the utility model provides an interface conversion circuit.
In order to achieve the above object, the utility model provides a following technical scheme:
an interface conversion circuit, comprising:
the device comprises an input interface, a main control chip and a switching circuit; the input interface is used for connecting a USB OTG interface line or a UART debugging serial port line; the input interface and the switching circuit are respectively connected with the main control chip; the input interface is connected with a USB OTG interface or a UART debugging serial port inside the main control chip through the switching circuit;
if the input interface is connected with the USB OTG interface line, the main control chip controls the circuit which is used for connecting the input interface and the USB OTG interface in the switching circuit to be conducted so as to enable the input interface to be connected with the USB OTG interface;
if the input interface is connected with the UART debugging serial port line, the main control chip controls the circuit which is used for connecting the input interface and the UART debugging serial port in the switching circuit to be conducted so as to enable the input interface to be connected with the UART debugging serial port.
Preferably, the main control chip comprises a detection pin and a control pin; the detection pin is connected with the input interface; the switching circuit comprises a first switch and a second switch; the common end of the first switch and the second switch is connected with the input interface; the non-public end of the first switch is connected with the USB OTG interface; the non-common end of the second switch is connected with the UART debugging serial port; the control pin is connected with the control end of the first switch and the control end of the second switch respectively;
if the input interface is connected with the USB OTG interface line, the detection pin outputs a low level, and the main control chip controls the first switch to be conducted through the main control pin so as to enable the input interface to be connected with the USB OTG interface;
if the input interface is connected with the UART debugging serial port line, the detection pin outputs high level, and the main control chip controls the second switch to be conducted through the control pin so that the input interface is connected with the UART debugging serial port.
Preferably, the first switch includes a first triode, a second triode, a first resistor and an inverter, and a collector of the first triode and a collector of the second triode are respectively connected to the USB OTG interface; the base electrode of the first triode and the base electrode of the second triode are respectively connected with the control pin through the first resistor and the reverser; the emitting electrode of the first triode and the emitting electrode of the second triode are respectively connected with the input interface;
if the input interface is connected with the USB OTG interface line, the main control chip controls the control pin to output a low level, and the first triode and the second triode are conducted so that the input interface is connected with the USB OTG interface.
Preferably, the inverter includes a second resistor, a third resistor, and a third transistor; one end of the second resistor is connected with a high level; the other end of the second resistor is connected with the collector of the third triode; the emitter of the third triode is grounded; and the base electrode of the third triode is connected with the control pin through the third resistor.
Preferably, the second switch includes a fourth triode, a fifth triode and a fourth resistor, and a collector of the fourth triode and a collector of the fifth triode are respectively connected with the UART debugging serial port; the base electrode of the fourth triode and the base electrode of the fifth triode are respectively connected with the control pin through the fourth resistor; an emitter of the fourth triode and an emitter of the fifth triode are respectively connected with the input interface;
if the input interface is connected with the UART debugging serial port line, the main control chip controls the control pin to output high level, and the fourth triode and the fifth triode are conducted so that the input interface is connected with the UART debugging serial port.
Preferably, the number of the control pins is two; the first control pin is connected with the control end of the first switch; and the second control pin is connected with the control end of the second switch.
Preferably, the switching circuit comprises a single pole double throw switch; the control end of the single-pole double-throw switch is connected with the main control chip; the first movable end of the single-pole double-throw switch is connected with the USB OTG interface; and the second moving end of the single-pole double-throw switch is connected with the UART debugging serial port.
According to the above technical solution, the utility model provides an interface conversion circuit, input interface can connect USB OTG interface line or UART debugging serial port line, if the input interface connects USB OTG interface line, main control chip control be used for connecting in the switching circuit input interface with the circuit conduction of USB OTG interface, so that input interface with USB OTG interface connection; if the input interface is connected with the UART debugging serial port line, the main control chip controls the circuit which is used for connecting the input interface and the UART debugging serial port in the switching circuit to be conducted so as to enable the input interface to be connected with the UART debugging serial port. The interface conversion circuit provided by the embodiment realizes the compatibility of the USBOTG interface and the UART debugging serial port.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an interface conversion circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another interface conversion circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another interface conversion circuit according to an embodiment of the present invention;
fig. 4 is a schematic view of a test scenario provided by an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another interface conversion circuit according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a fifth interface conversion circuit provided in the embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
The embodiment of the utility model provides an interface conversion circuit, this interface conversion circuit compatible USB OTG interface and UART debugging serial ports simultaneously. Specifically, referring to fig. 1, the interface conversion circuit may include:
an input interface 101, a main control chip 102 and a switching circuit 103; the input interface 101 is used for connecting a USB OTG interface line or a UART debugging serial port line; the input interface 101 and the switching circuit 103 are respectively connected with the main control chip 102; the input interface 101 is connected with a USB OTG interface or a UART debugging serial port inside the main control chip 102 through the switching circuit 103;
if the input interface 101 is connected to the USB OTG interface line, the main control chip 102 controls the circuit in the switching circuit 103 for connecting the input interface 101 and the USB OTG interface to be turned on, so that the input interface 101 is connected to the USB OTG interface;
if the input interface 101 is connected to the UART debug serial port line, the main control chip 102 controls the circuit in the switching circuit 103 for connecting the input interface 101 and the UART debug serial port to be conducted, so that the input interface 101 is connected to the UART debug serial port.
The master control chip may be an embedded master control chip, such as embedded master control chips with the chip models of S905D2, S905LS805, a113 and a311 developed by semiconductor Amlogic in crystal morning, Hi3716, Hi3798 and Hi3796 developed by hai, a31, a33, H3, H6 and R328 developed by zhahi holozhi technology, RK3326, RK3399 and RK3308 developed by reychia micro Rockchip, MT8516 developed by joint development technology, MSD7828 developed by shengmai technology, and the like.
Specifically, when the devices accessed by the input interface 101 are different, the control logic of the main control chip 102 is different, and further, the internal components of the main control chip 102 connected to the input interface 101 are different. The main control chip 102 may detect the accessed device and then execute corresponding control logic. If the input interface 101 is connected to the USB OTG interface line, the main control chip 102 controls a circuit in the switching circuit 103, which is used for connecting the input interface 101 and the USB OTG interface, to be turned on, so that the input interface 101 is connected to the USB OTG interface;
if the input interface 101 is connected to the UART debug serial port line, the main control chip 102 controls the circuit in the switching circuit 103 for connecting the input interface 101 and the UART debug serial port to be conducted, so that the input interface 101 is connected to the UART debug serial port.
In this embodiment, the input interface 101 may be connected to a USB OTG interface line or a UART debug serial port line, and if the input interface 101 is connected to the USB OTG interface line, the main control chip 102 controls the circuit in the switching circuit 103 for connecting the input interface 101 and the USB OTG interface to be turned on, so that the input interface 101 is connected to the USB OTG interface; if the input interface 101 is connected to the UART debug serial port line, the main control chip 102 controls the circuit in the switching circuit 103 for connecting the input interface 101 and the UART debug serial port to be conducted, so that the input interface 101 is connected to the UART debug serial port. The interface conversion circuit provided by the embodiment realizes the compatibility of the USB OTG interface and the UART debugging serial port.
Optionally, on the basis of the foregoing embodiment, referring to fig. 2, the main control chip 102 includes a detection pin and a control pin; the detection pin is connected with the input interface 101; the switching circuit 103 includes a first switch K1 and a second switch K2; the common terminal of the first switch K1 and the second switch K2 is connected with the input interface 101; the non-public end of the first switch K1 is connected with the USB OTG interface; the non-public end of the second switch K2 is connected with the UART debugging serial port; the control pin is respectively connected with the control end of the first switch K1 and the control end of the second switch K2;
if the input interface 101 is connected to the USB OTG interface line, the detection pin outputs a low level, and the main control chip 102 controls the first switch K1 to be turned on through the main control pin, so that the input interface 101 is connected to the USB OTG interface;
if the input interface 101 is connected with the UART debugging serial port line, the detection pin outputs a high level, and the main control chip 102 controls the second switch K2 to be conducted through the control pin, so that the input interface 101 is connected with the UART debugging serial port.
Specifically, in this embodiment, the switching circuit 103 is implemented by a first switch K1 and a second switch K2, where the first switch K1 controls the connection between the input interface 101 and the USB OTG interface, and the second switch K2 controls the connection between the input interface 101 and the UART debug serial port. The detection chip detects the type of the device accessed by the input interface 101, and if the device is accessed to the USB OTG interface line, a low level is output, and at this time, the main control chip 102 controls the first switch K1 to be turned on through the main control pin, so that the input interface 101 is connected to the USB OTG interface. If the UART debugging serial port line is accessed, the detection pin outputs high level, the main control chip 102 controls the conduction of the second switch K2 through the control pin, so that the input interface 101 is connected with the UART debugging serial port.
Optionally, on the basis of this embodiment, the first switch K1 includes a first transistor IQ3, a second transistor IQ2, a first resistor R1, and an inverter, and a collector 3 of the first transistor IQ3 and a collector 3 of the second transistor IQ2 are respectively connected to the USB OTG interface; the base 1 of the first triode IQ3 and the base 1 of the second triode IQ2 are respectively connected with the control pin through the first resistor R1 and the inverter; an emitter 2 of the first transistor IQ3 and an emitter 2 of the second transistor IQ2 are respectively connected with the input interface 101;
if the input interface 101 is connected to the USB OTG interface line, the main control chip 102 controls the control pin to output a low level, and the first transistor IQ3 and the second transistor IQ2 are turned on, so that the input interface 101 is connected to the USB OTG interface.
The inverter comprises a second resistor R2, a third resistor R3 and a third triode IQ 1; one end of the second resistor R2 is connected with a high level VCC; the other end of the second resistor R2 is connected with the collector 3 of the third triode IQ 1; the emitter 2 of the third triode IQ1 is grounded; the base 1 of the third transistor IQ1 is connected to the control pin through the third resistor R3.
The second switch K2 includes a fourth transistor IQ4, a fifth transistor IQ5 and a fourth resistor R4, wherein a collector 3 of the fourth transistor IQ4 and a collector 3 of the fifth transistor IQ5 are respectively connected with the UART debugging serial port; the base 1 of the fourth triode IQ4 and the base 1 of the fifth triode IQ5 are respectively connected with the control pin through the fourth resistor R4; the emitter 2 of the fourth transistor IQ4 and the emitter 2 of the fifth transistor IQ5 are respectively connected with the input interface 101;
if the input interface 101 is connected to the UART debug serial port line, the main control chip 102 controls the control pin to output a high level, and the fourth transistor IQ4 and the fifth transistor IQ5 are turned on, so that the input interface 101 is connected to the UART debug serial port.
Referring to fig. 3, the first switch K1 and the second switch K2 are both implemented by two triodes, and in addition, the first switch K1 is further provided with an inverter, the inverter is used for implementing opposite on-off of the first switch K1 and the second switch K2, when the input interface 101 is connected to a USB OTG interface line, the first switch K1 is connected, the second switch K2 is disconnected, and when the input interface 101 is connected to a UART debug serial line, the first switch K1 is disconnected, and the second switch K2 is connected.
When the input interface 101 is connected to the UART debug serial line, the detection pin is at a high level, and the main control chip 102 controls the control pin to output a high level, so that point a in fig. 3 is at a high level and point B is at a low level. Further, 1Q5 and 1Q4 are controlled to be turned on, and 1Q3 and 1Q2 are controlled to be turned off. Therefore, the UART debugging serial port is connected to the input interface 101, and the USB OTG interface is disconnected from the input interface 101.
When the input interface 101 is connected to the USB OTG serial line, the detection pins are connected to a low level, and the main control chip 102 controls the control pins to output the low level, so that point a in fig. 3 is a low level and point B is a high level. Further, 1Q3 and 1Q2 are controlled to be turned on, and 1Q4 and 1Q5 are controlled to be turned off. Therefore, the USB OTG serial port is connected to the input interface 101, and the UART debug serial port is disconnected from the input interface 101.
In this embodiment, the compatible interface is designed to combine the UART debug serial port and the USB OTG interface into one, and the type of the device connected to the input interface 101 can be automatically identified, so that the UART debug serial port and the USB OTG interface can be automatically switched to the input interface 101.
The structure of the interface conversion circuit is described above, and several usage scenarios of the interface conversion circuit are described. The method comprises the following specific steps:
1. when the factory production test is carried out, the automatic test can be realized.
Referring to fig. 4, a debugging tool is manufactured, and the tool includes a USB OTG serial port and a UART debugging serial port for connecting a PC for testing, a control interface, a switch circuit, and an input interface 101 connected to a testing device.
The working process is as follows: the PC machine for testing controls the debugging tool plate to be switched to the UART debugging serial port, and simultaneously sends out a control signal to the testing equipment, so that an interface detection pin of the testing equipment is in a high level, the testing equipment is synchronously switched to the UART debugging serial port for connection, and the UART debugging serial port testing project is carried out.
The testing PC controls the debugging tool plate to be switched to the USB OTG serial port, and simultaneously sends a control signal to the testing equipment, so that an interface detection pin of the testing equipment is in a low level, the testing equipment is synchronously switched to the USB OTG serial port for connection, and USB OTG serial port testing items are carried out.
2. The method can be used for writing the solid-state memory and the Flash program of the animation editor on line during factory production, and the test tool has the same scene.
The working process is as follows:
the testing PC controls the debugging tool plate to be switched to the UART debugging serial port, and simultaneously sends a control signal to the testing equipment, so that an interface detection pin of the testing equipment is in a high level, the testing equipment is synchronously switched to the UART debugging serial port for connection, and a bootstrap program is written in.
The testing PC controls the debugging tool plate to be switched to the USB OTG serial port, and simultaneously sends a control signal to the testing equipment, so that an interface detection pin of the testing equipment is in a low level, the testing equipment is synchronously switched to the USB OTG serial port for connection, and a system program is written in.
3. The interface is applied to after-sales maintenance of fault machines, many fault machines in the market are in software faults, programs cannot be started normally, program writing needs to be carried out through a serial port at the moment, and after the interface is used, after-sales maintenance personnel can maintain the fault machines without opening a shell.
Optionally, on the basis of any one of the above embodiments, the embodiment of the present invention has another implementation manner, specifically, referring to fig. 5, the number of the control pins is two; a first control pin is connected with a control end of the first switch K1; the second control pin is connected to the control terminal of the second switch K2.
Specifically, the main control chip 102 in this embodiment uses two control pins to control the first switch K1 and the second switch K2, respectively, so that compared with the previous embodiment, an inverter is not used. It should be noted that, the specific structures of the first switch K1 and the second switch K2 are the same as those of the previous embodiment, please refer to the corresponding descriptions in the previous embodiment, and are not repeated herein.
When the input interface 101 is connected to the USB OTG serial line, the detection pin is connected to a low level, and the main control chip 102 controls the control pin 1 to output the low level, so that point a in fig. 3 is the low level and point B is the high level. Further, 1Q3 and 1Q2 are controlled to be turned on, and 1Q4 and 1Q5 are controlled to be turned off. Therefore, the USB OTG serial port is connected to the input interface 101, and the UART debug serial port is disconnected from the input interface 101.
When the input interface 101 is connected to the UART debug serial line, the detection pin is at a high level, and the main control chip 102 controls the control pin 2 to output a high level, so that point a in fig. 3 is at a high level and point B is at a low level. Further, 1Q5 and 1Q4 are controlled to be turned on, and 1Q3 and 1Q2 are controlled to be turned off. Therefore, the UART debugging serial port is connected to the input interface 101, and the USB OTG interface is disconnected from the input interface 101.
In addition, according to another implementation manner of the embodiment of the present invention, referring to fig. 6, the switching circuit 103 includes a single-pole double-throw switch K3; the control end of the single-pole double-throw switch K3 is connected with the main control chip 102; the first movable end of the single-pole double-throw switch K3 is connected with the USB OTG interface; and the second moving end of the single-pole double-throw switch K3 is connected with the UART debugging serial port.
Specifically, referring to fig. 6, a single-pole double-throw switch K3 is used as the switching circuit 103, and the single-pole double-throw switch K3 is connected to the USB OTG interface and the UART debug serial port, respectively.
When the input interface 101 is connected to a UART debug serial port line, the detection pin is at a high level, and the main control chip 102 controls the single-pole double-throw switch K3 to access the UART debug serial port. Therefore, the UART debugging serial port is connected to the input interface 101, and the USB OTG interface is disconnected from the input interface 101.
When the input interface 101 is connected to a USB OTG serial port line, the detection pins are connected to a low level, and the main control chip 102 controls the single-pole double-throw switch K3 to access the USB OTG serial port. Therefore, the USB OTG serial port is connected to the input interface 101, and the UART debug serial port is disconnected from the input interface 101.
In the embodiment, two implementation modes of realizing compatibility of the USB OTG serial port and the UART debugging serial port are provided, the circuit implementation modes are diversified, and different circuit structures can be used in different scenes.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). The memory is an example of a computer-readable medium.
Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in the process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (7)
1. An interface conversion circuit, comprising:
the device comprises an input interface, a main control chip and a switching circuit; the input interface is used for connecting a USB OTG interface line or a UART debugging serial port line; the input interface and the switching circuit are respectively connected with the main control chip; the input interface is connected with a USB OTG interface or a UART debugging serial port inside the main control chip through the switching circuit;
if the input interface is connected with the USB OTG interface line, the main control chip controls the circuit which is used for connecting the input interface and the USB OTG interface in the switching circuit to be conducted so as to enable the input interface to be connected with the USB OTG interface;
if the input interface is connected with the UART debugging serial port line, the main control chip controls the circuit which is used for connecting the input interface and the UART debugging serial port in the switching circuit to be conducted so as to enable the input interface to be connected with the UART debugging serial port.
2. The interface converting circuit of claim 1, wherein the main control chip comprises a detection pin and a control pin; the detection pin is connected with the input interface; the switching circuit comprises a first switch and a second switch; the common end of the first switch and the second switch is connected with the input interface; the non-public end of the first switch is connected with the USB OTG interface; the non-common end of the second switch is connected with the UART debugging serial port; the control pin is connected with the control end of the first switch and the control end of the second switch respectively;
if the input interface is connected with the USB OTG interface line, the detection pin outputs a low level, and the main control chip controls the first switch to be conducted through the control pin so as to enable the input interface to be connected with the USB OTG interface;
if the input interface is connected with the UART debugging serial port line, the detection pin outputs high level, and the main control chip controls the second switch to be conducted through the control pin so that the input interface is connected with the UART debugging serial port.
3. The interface conversion circuit according to claim 2, wherein the first switch comprises a first transistor, a second transistor, a first resistor and an inverter, and a collector of the first transistor and a collector of the second transistor are respectively connected to the USB OTG interface; the base electrode of the first triode and the base electrode of the second triode are respectively connected with the control pin through the first resistor and the reverser; the emitting electrode of the first triode and the emitting electrode of the second triode are respectively connected with the input interface;
if the input interface is connected with the USB OTG interface line, the main control chip controls the control pin to output a low level, and the first triode and the second triode are conducted so that the input interface is connected with the USB OTG interface.
4. The interface converting circuit according to claim 3, wherein the inverter comprises a second resistor, a third resistor and a third transistor; one end of the second resistor is connected with a high level; the other end of the second resistor is connected with the collector of the third triode; the emitter of the third triode is grounded; and the base electrode of the third triode is connected with the control pin through the third resistor.
5. The interface converting circuit according to claim 4, wherein the second switch comprises a fourth transistor, a fifth transistor and a fourth resistor, and a collector of the fourth transistor and a collector of the fifth transistor are respectively connected to the UART debugging serial port; the base electrode of the fourth triode and the base electrode of the fifth triode are respectively connected with the control pin through the fourth resistor; an emitter of the fourth triode and an emitter of the fifth triode are respectively connected with the input interface;
if the input interface is connected with the UART debugging serial port line, the main control chip controls the control pin to output high level, and the fourth triode and the fifth triode are conducted so that the input interface is connected with the UART debugging serial port.
6. The interface converting circuit according to claim 2, wherein the number of the control pins is two; the first control pin is connected with the control end of the first switch; and the second control pin is connected with the control end of the second switch.
7. The interface conversion circuit of claim 1, wherein the switching circuit comprises a single pole double throw switch; the control end of the single-pole double-throw switch is connected with the main control chip; the first movable end of the single-pole double-throw switch is connected with the USB OTG interface; and the second moving end of the single-pole double-throw switch is connected with the UART debugging serial port.
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| CN201920978863.4U CN209821820U (en) | 2019-06-26 | 2019-06-26 | Interface conversion circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114880265A (en) * | 2022-06-07 | 2022-08-09 | 成都航盛智行科技有限公司 | Method for transmitting serial port data through usb interface and transmission circuit |
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2019
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114880265A (en) * | 2022-06-07 | 2022-08-09 | 成都航盛智行科技有限公司 | Method for transmitting serial port data through usb interface and transmission circuit |
| CN114880265B (en) * | 2022-06-07 | 2024-03-19 | 成都航盛智行科技有限公司 | Method for transmitting serial port data by usb interface and transmission circuit |
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