CN209821699U - Force calculation board based on edge calculation application - Google Patents
Force calculation board based on edge calculation application Download PDFInfo
- Publication number
- CN209821699U CN209821699U CN201920624716.7U CN201920624716U CN209821699U CN 209821699 U CN209821699 U CN 209821699U CN 201920624716 U CN201920624716 U CN 201920624716U CN 209821699 U CN209821699 U CN 209821699U
- Authority
- CN
- China
- Prior art keywords
- unit
- display card
- power supply
- cpu
- supply unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The embodiment of the utility model discloses calculation power board based on edge calculation is used, which comprises a circuit board, the integration has the CPU unit on the circuit board, the memory cell, IO the control unit, general IO interface unit, display card calculation power unit, display card electrical unit, the CPU electrical unit, memory electrical unit, IO the control power unit, IO interface electrical unit, CPU unit and memory cell, the IO the control unit, display card calculation power unit, CPU electrical unit is connected, general IO interface unit and IO interface electrical unit, IO the control unit electricity is connected, display card electrical unit is connected with display card calculation power unit electricity, memory electrical unit is connected with the memory cell electricity, IO the control power unit is connected with IO the control unit electricity. The utility model discloses increase display card arithmetic unit, through the design theory of board year chip, effectively avoided the system failure risk that traditional outer interpolation display card's mode brought, can better adapt to the application under the complicated multi-environment of edge calculation.
Description
Technical Field
The utility model relates to a technical field of the thing networking especially relates to a calculate power board based on edge calculation is used.
Background
With the approach of the 5G network era, the application of the Internet of things is wider and wider, the data volume of the whole network shows the increase of geometric multiple, based on the market and application change, the concept of edge calculation is proposed, and at present, a product which selects a strong CPU as an arithmetic unit is adopted in more conventional edge calculation application.
Although the powerful CPU has strong computing power, the power of the powerful CPU is not as high as that of a video card in terms of floating point concurrent operation, and the computing requirement of edge computing is comprehensive, so that the traditional powerful CPU cannot well meet the requirement of edge computing application. The traditional mode of externally inserting the display card has the risk of system failure and cannot adapt to the application of edge calculation under complex multi-environment.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides a technical problem that will solve provides a calculation board based on edge calculation is used to the system's risk of becoming invalid that the mode of avoiding traditional extrapolation display card brought.
In order to solve the technical problem, the embodiment of the utility model provides a calculate power board based on edge calculation is used, which comprises a circuit board, the integration has the CPU unit on the circuit board, the memory cell, IO the control unit, general IO interface unit, display card power unit, display card electrical unit, the CPU electrical unit, memory electrical unit, IO the control power unit, IO interface electrical unit, CPU unit and memory cell, IO the control unit, display card power unit, CPU electrical unit electricity is connected, general IO interface unit and IO interface electrical unit, IO the control unit electricity is connected, display card electrical unit and display card power unit electricity are connected, memory electrical unit and memory cell electricity are connected, IO the control power unit is connected with IO the control unit electricity.
Further, the CPU unit comprises an X86 central processing unit, and the X86 central processing unit is connected with the memory unit, the IO control unit and the display card computing power unit through a bus for communication.
Further, the CPU power supply unit includes a PX8746HDN chip circuit.
Further, the memory power supply unit includes a PX8143H chip circuit.
The utility model has the advantages that: the utility model discloses integrateed a display card calculation power unit provides two kinds of calculation power boards based on CPU high frequency and the multinuclear high concurrency of display card and calculates power mode, increases the display card arithmetic unit, through the design theory of board year chip, has effectively avoided the system failure risk that traditional outer interpolation display card's mode brought, can adapt to the application under the complicated multi-environment of edge calculation better.
Drawings
Fig. 1 is a schematic structural diagram of a force calculation board based on an edge calculation application according to an embodiment of the present invention.
Fig. 2 is a partial circuit diagram of a CPU unit according to an embodiment of the present invention.
Fig. 3 is a circuit diagram of a memory cell according to an embodiment of the present invention.
Fig. 4 is a circuit diagram of an IO control unit according to an embodiment of the present invention.
Fig. 5 is a circuit diagram of a general IO interface unit according to an embodiment of the present invention.
Fig. 6 is a circuit diagram of the display card computing power unit according to the embodiment of the present invention.
Fig. 7 is a circuit diagram of a graphics card power supply unit according to an embodiment of the present invention.
Fig. 8 is a circuit diagram of a CPU power supply unit according to an embodiment of the present invention.
Fig. 9 is a circuit diagram of a memory power supply unit according to an embodiment of the present invention.
Fig. 10 is a circuit diagram of an IO control power supply unit according to an embodiment of the present invention.
Fig. 11 is a circuit diagram of an IO interface power supply unit according to an embodiment of the present invention.
Detailed Description
It should be noted that, in the present application, the embodiments and features of the embodiments may be combined with each other without conflict, and the present invention is further described in detail with reference to the accompanying drawings and specific embodiments.
In the embodiment of the present invention, if there is directional indication (such as upper, lower, left, right, front, and rear … …) only for explaining the relative position relationship between the components and the motion situation under a certain posture (as shown in the drawing), if the certain posture is changed, the directional indication is changed accordingly.
In addition, the descriptions of the first, second, etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying any relative importance or implicit indication of the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature.
Referring to fig. 1 to 11, an algorithm board based on edge computing application according to an embodiment of the present invention includes a circuit board, and a CPU unit, a memory unit, an IO control unit, a general IO interface unit, a graphics card algorithm unit, a graphics card power unit, a CPU power unit, a memory power unit, an IO control power unit, and an IO interface power unit are integrated on the circuit board.
The CPU unit is electrically connected with the memory unit, the IO control unit, the display card computing power unit and the CPU power supply unit. The general IO interface unit is electrically connected with the IO interface power supply unit and the IO control unit. The display card power supply unit is electrically connected with the display card computing power unit, the memory power supply unit is electrically connected with the memory unit, and the IO control power supply unit is electrically connected with the IO control unit. The memory unit provides a 4-channel memory bus channel based on a DDR4 memory architecture, the support of a DDR 42400 frequency module can be realized to the maximum extent, a memory bandwidth of about 76.8GB/s of the 4 channel is provided, enough data bandwidth is provided for temporary operation data, and operation delay is effectively reduced. The IO control unit is a main control unit of the general IO interface unit, and is responsible for communication between I/O buses, such as a PCI bus, a USB, a LAN, an ATA, a SATA, an audio controller, a keyboard controller, a real-time clock controller, and advanced power management. The general IO interface units are mainly some general IO interface units, for example: PCI slot, PCIE slot, USB, LAN, SATA, audio interface, keyboard, mouse, VGA, DVI, HDMI and other general IO interfaces, respectively realize the data input and output function. The display card computing power unit can design display card computing power units of different grades to the computing power board according to different requirements of application, and by means of onboard mounting, the failure risk of the display card computing power unit is effectively reduced, meanwhile, the onboard mounting mode also reduces the delay risk of a data bus, and timeliness and effectiveness of data transmission are guaranteed. The display card power supply unit, the CPU power supply unit, the memory power supply unit, the IO control power supply unit and the IO interface power supply unit respectively provide power supply and management required by the units according to the requirements of the units.
As an implementation mode, the CPU unit comprises an X86 central processing unit, and the X86 central processing unit is connected and communicated with the memory unit, the IO control unit and the display card computing power unit through a bus. The core unit based on the X86 central processing unit instruction set architecture is an operation core and a control core of an algorithm board based on edge computing application, performs data interaction with a memory unit, an IO control unit and a display card algorithm unit through a bus, and coordinates effective work of each unit module.
As an embodiment, the CPU power supply unit includes a PX8746HDN chip circuit.
As one embodiment, the memory power supply unit includes a PX8143H chip circuit.
The utility model discloses an algorithm board based on marginal calculation, the display interface that has at first solved traditional to strong CPU does not have the display element and leads to is abundant the scaling disease inadequately, the adaptation marginal calculation that just so can be better is to the demand of demonstration scene, traditional X86 to strong CPU algorithm board has been solved to the second, calculate the single problem of power class, through board display card algorithm power unit, the multinuclear and complicated algorithm power service of class has been increased, the applied scene demand of calculation power has been richened, the tradition mode that increases the algorithm power through outer plug-in display card has been solved to the third, be more complicated and harsh environmental condition than the IDC computer lab to the application field of marginal calculation, outer plug-in display card can increase the inefficacy risk of system under such environment, and then effectual this problem of avoiding through board display card unit, through also having reduced data bus delay risk. The utility model discloses a calculation board based on edge calculation possesses the performance stronger than traditional calculation board unit, uses the scene suitable for face more for abundant, and the reliability is higher, and a great deal of advantage such as cost is more excellent solution based on edge calculation.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (4)
1. The utility model provides a power calculating board based on edge calculation is used, including the circuit board, its characterized in that, integrated CPU unit on the circuit board, memory cell, IO control unit, general IO interface unit, display card power calculating unit, display card power supply unit, CPU power supply unit, memory power supply unit, IO control power supply unit, IO interface power supply unit, CPU unit and memory cell, IO control unit, display card power calculating unit, CPU power supply unit electricity is connected, general IO interface unit and IO interface power supply unit, IO control unit electricity is connected, display card power supply unit and display card power calculating unit electricity are connected, memory power supply unit and memory cell electricity are connected, IO control power supply unit and IO control unit electricity are connected.
2. The computing force board based on edge computing application of claim 1, wherein the CPU unit comprises an X86 central processing unit, and the X86 central processing unit is connected and communicated with the memory unit, the IO control unit and the video card computing force unit through a bus.
3. The computing board of claim 1, wherein the CPU power supply unit comprises a PX8746HDN chip circuit.
4. The computing power board of claim 1, wherein the memory power supply unit comprises a PX8143H chip circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201920624716.7U CN209821699U (en) | 2019-05-05 | 2019-05-05 | Force calculation board based on edge calculation application |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201920624716.7U CN209821699U (en) | 2019-05-05 | 2019-05-05 | Force calculation board based on edge calculation application |
Publications (1)
Publication Number | Publication Date |
---|---|
CN209821699U true CN209821699U (en) | 2019-12-20 |
Family
ID=68882444
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201920624716.7U Active CN209821699U (en) | 2019-05-05 | 2019-05-05 | Force calculation board based on edge calculation application |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN209821699U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111935940A (en) * | 2020-07-10 | 2020-11-13 | 北京比特大陆科技有限公司 | Computing board assembly and server with same |
CN114172907A (en) * | 2021-12-27 | 2022-03-11 | 重庆忽米网络科技有限公司 | Edge computing system for monitoring equipment state |
-
2019
- 2019-05-05 CN CN201920624716.7U patent/CN209821699U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111935940A (en) * | 2020-07-10 | 2020-11-13 | 北京比特大陆科技有限公司 | Computing board assembly and server with same |
CN114172907A (en) * | 2021-12-27 | 2022-03-11 | 重庆忽米网络科技有限公司 | Edge computing system for monitoring equipment state |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN105183683B (en) | A kind of more fpga chip accelerator cards | |
CN204065979U (en) | One exempts from instrument dismounting PCIE adapter | |
CN209821699U (en) | Force calculation board based on edge calculation application | |
CN203720714U (en) | Compatible CPCI (compact peripheral component interconnect) server mainboard | |
CN206312134U (en) | A kind of switching device suitable for multipath server | |
CN103677216A (en) | Interface between host and peripheral device | |
CN107704413A (en) | A kind of reinforcement type parallel information processing platform based on VPX frameworks | |
CN204595692U (en) | Based on the VPX computer motherboard of Shen prestige 410 processor and Shen Wei nest plate | |
CN102799224A (en) | High-density blade type micro-server | |
WO2020143794A1 (en) | Display control system and display apparatus | |
TWI704734B (en) | External electrical connector and computer system | |
CN107590097B (en) | Server IO equipment extension device | |
CN216817397U (en) | Backboard and conversion card | |
CN203133695U (en) | BMC (backboard management controller) card based on AST2300 control chip | |
CN212569635U (en) | VPX computer motherboard based on processor chip flies to ten | |
CN204595691U (en) | A kind of CPCI-E computer motherboard based on Shen prestige processor and nest plate | |
CN205229928U (en) | Extension GPU's blade server | |
CN203673396U (en) | Multifunctional master board with OPS interface | |
CN209086914U (en) | The industrial control mainboard of multi-USB interface and more PCI-E expansion interfaces | |
CN206627881U (en) | A kind of internal extended PCIE blade server node | |
CN208314765U (en) | Mainboard and intelligent terminal for intelligent terminal | |
CN210377258U (en) | HDMI high-definition digital output computer mainboard | |
CN220603943U (en) | Nationally produced computing blade and equipment cabinet | |
CN205210761U (en) | CPEX industrial control computer mainboard based on explain majestic nest plate | |
CN218497484U (en) | MXM display card and computing device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |