CN209804668U - silicon solar cell - Google Patents
silicon solar cell Download PDFInfo
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- CN209804668U CN209804668U CN201920818103.7U CN201920818103U CN209804668U CN 209804668 U CN209804668 U CN 209804668U CN 201920818103 U CN201920818103 U CN 201920818103U CN 209804668 U CN209804668 U CN 209804668U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The utility model provides a silicon solar cell relates to solar cell technical field. This solar cell includes from bottom to top in proper order: the semiconductor device comprises a back electrode, a first silicon nitride layer, an aluminum oxide layer, a first silicon oxide layer, a silicon substrate, an emitter layer, a second silicon oxide layer, a second silicon nitride layer, a third silicon oxide layer and a front electrode. Through further increasing the silicon oxide layer on the positive silicon nitride layer of battery, can reduce the reflectivity of positive rete, promote the utilization ratio of light, through increase the silicon oxide layer between back aluminium oxide layer and silicon substrate, be favorable to strengthening the effect of the fixed negative charge of aluminium oxide, strengthened the field passivation and the chemical passivation effect of aluminium oxide to battery efficiency has been improved.
Description
Technical Field
the utility model relates to a solar cell technical field, concretely relates to silicon solar cell.
Background
In recent years, with the progress and development of solar cell technology, low cost and high conversion efficiency have become inevitable trends of solar cells. A passivated emitter back contact (PERC) cell is added with back passivated aluminum oxide and silicon nitride and a laser hole opening process in the conventional single crystal cell preparation process, so that the efficiency of the cell is improved. Due to high conversion efficiency, PERC cells are widely popularized.
At present, the conventional PERC back passivation film layer structure is an aluminum oxide structure with the thickness of 3-20 nm and a silicon nitride structure with the thickness of 100-130 nm, the front surface adopts a passivation anti-reflection film design with multiple layers of silicon nitride, and the front surface reflectivity is generally 3-5%.
However, the back surface of the silicon wafer and the aluminum oxide have a high interface state density, which can weaken the passivation effect of the passivation film layer to some extent, and in addition, the multilayer silicon nitride antireflection film design on the front surface is difficult to further reduce the reflectivity, thereby making it difficult to further improve the battery efficiency.
SUMMERY OF THE UTILITY MODEL
an object of the utility model is to provide a silicon solar cell to the not enough among the above-mentioned prior art to solve the problem that is difficult to further promote battery efficiency.
in order to achieve the above object, the utility model adopts the following technical scheme:
in a first aspect, the utility model provides a silicon solar cell, this battery includes from bottom to top in proper order: the semiconductor device comprises a back electrode, a first silicon nitride layer, an aluminum oxide layer, a first silicon oxide layer, a silicon substrate, an emitter layer, a second silicon oxide layer, a second silicon nitride layer, a third silicon oxide layer and a front electrode.
Optionally, a fourth silicon oxide layer is further disposed between the back electrode and the first silicon nitride layer.
Alternatively, the thickness of the second silicon oxide layer is in a range of 1nm to 5nm, the thickness of the second silicon nitride layer is in a range of 40nm to 70nm, and the refractive index of the second silicon nitride layer is in a range of 2.08 to 2.15.
Optionally, the thickness of the third silicon oxide layer is in the range of 10nm to 30 nm.
Optionally, the thickness of the first silicon oxide layer is in the range of 1nm to 5nm, the thickness of the aluminum oxide layer is in the range of 4nm to 20nm, the thickness of the first silicon nitride layer is in the range of 60nm to 90nm, and the refractive index of the first silicon nitride layer is in the range of 2.08 to 2.2.
Optionally, the thickness of the fourth silicon oxide layer is in the range of 10nm to 30 nm.
Optionally, the silicon substrate is a P-type single crystal silicon substrate.
In a second aspect, the present invention provides a method for manufacturing a silicon solar cell, the method comprising:
a) providing a P-type monocrystalline silicon wafer, and performing double-sided texturing, wherein the size of a textured surface is in the range of 1-3 mu m;
b) Performing single-side diffusion on the front surface of the textured silicon wafer, wherein the diffusion sheet resistance is in the range of 70-100 ohms;
c) Polishing the back of the silicon wafer after single-side diffusion to enable the reflectivity of the back to be more than 35%;
d) Carrying out single-side thermal oxidation on the silicon wafer with the polished back surface, and forming a first silicon oxide layer on the front surface of the silicon wafer, wherein the thickness of the first silicon oxide layer is within the range of 1nm to 5 nm;
e) Sequentially and continuously depositing a second silicon dioxide layer, an aluminum oxide layer, a first silicon nitride layer and a third silicon oxide layer on the back of the silicon wafer with a single surface subjected to thermal oxidation, wherein the thickness of the second silicon dioxide layer is within the range of 1nm to 5nm, the thickness of the aluminum oxide layer is within the range of 4nm to 20nm, the thickness of the first silicon nitride layer is within the range of 60nm to 90nm, the refractive index of the first silicon nitride layer is within the range of 2.08 to 2.2, and the thickness of the third silicon oxide layer is within the range of 10nm to 30 nm;
f) Depositing a second silicon nitride layer and a fourth silicon oxide layer in sequence on the front side of the silicon wafer after the back side deposition, wherein the thickness of the second silicon nitride layer is in the range of 40nm to 70nm, the refractive index of the second silicon nitride layer is in the range of 2.08 to 2.15, and the thickness of the fourth silicon oxide layer is in the range of 10nm to 30 nm;
g) performing laser grooving on the back of the silicon wafer after the front deposition is performed to expose an area for forming electrode contact on the surface of the silicon wafer;
h) And carrying out screen printing and sintering on the silicon wafer subjected to laser grooving to form an electrode.
optionally, the temperature of the thermal oxidation carried out in step d) is in the range of 600 ℃ to 750 ℃ and the oxygen flow rate is in the range of 1SLM to 5SLM, the time of the thermal oxidation is in the range of 10 minutes to 30 minutes.
optionally, the deposition in step e) and step f) is performed by plasma enhanced chemical vapor deposition.
The beneficial effects of the utility model include:
The utility model provides a solar cell includes from bottom to top in proper order: the semiconductor device comprises a back electrode, a first silicon nitride layer, an aluminum oxide layer, a first silicon oxide layer, a silicon substrate, an emitter layer, a second silicon oxide layer, a second silicon nitride layer, a third silicon oxide layer and a front electrode. Through further increasing the silicon oxide layer on the positive silicon nitride layer of battery, can reduce the reflectivity of positive rete, promote the utilization ratio of light, through increase the silicon oxide layer between back aluminium oxide layer and silicon substrate, be favorable to strengthening the effect of the fixed negative charge of aluminium oxide, strengthened the field passivation and the chemical passivation effect of aluminium oxide to battery efficiency has been improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention, and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
FIG. 1 shows a schematic of the structure of a conventional PERC solar cell;
Fig. 2 is a schematic structural diagram of a solar cell according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a solar cell according to another embodiment of the present invention;
Fig. 4 shows a schematic flow chart of a method for manufacturing a solar cell according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
Fig. 1 shows a schematic structural view of a conventional PERC solar cell, which, as shown in fig. 1, includes, in order from bottom to top: a back electrode 101, a first silicon nitride layer 102, an aluminum oxide layer 103, a silicon substrate 104, an emitter layer 105, a silicon oxide layer 106, a second silicon nitride layer 107, and a front electrode 108. In this structure, a high interface state density exists between the back surface of the silicon substrate 104 and the aluminum oxide layer 103, which may weaken the passivation effect of the passivation film layer to some extent, and the antireflection effect of the front silicon oxide layer 106 and the second silicon nitride layer 107 is limited. These limit the improvement of the solar cell efficiency.
In order to further improve the efficiency of solar cell, the embodiment of the utility model provides a novel solar cell structure is proposed, as shown in fig. 2, this battery includes from bottom to top in proper order: a back electrode 201, a first silicon nitride layer 202, an aluminum oxide layer 203, a first silicon oxide layer 204, a silicon substrate 205, an emitter layer 206, a second silicon oxide layer 207, a second silicon nitride layer 208, a third silicon oxide layer 209, and a front electrode 210.
Compared with the conventional technology shown in fig. 1, the reflectivity of the front film layer can be reduced and the light utilization rate can be improved by further adding the silicon oxide layer on the front silicon nitride layer of the battery, the effect of fixing negative charges of aluminum oxide can be enhanced by adding the silicon oxide layer between the back aluminum oxide layer and the silicon substrate, the field passivation and chemical passivation effects of the aluminum oxide are enhanced, and the battery efficiency is improved. Compare with the solar cell of conventional structure, the embodiment of the utility model provides a solar cell's open circuit voltage promotes more than 2mV, subtracts anti-membrane layer weighted average reflectivity and can reach 0.5% ~ 2%.
in addition, the preparation of the battery structure is compatible with the existing preparation process, and no additional manufacturing equipment is required.
alternatively, as shown in fig. 3, a fourth silicon oxide layer 211 may be further disposed between the back electrode 201 and the first silicon nitride layer 202. The silicon oxide layer is introduced into the outer layer of the back side, so that a high-low refractive index film layer can be formed on the back side of the cell, and the spectral response of the cell to a long-wave band is improved.
alternatively, the thickness of the second silicon oxide layer 207 is in the range of 1nm to 5nm, the thickness of the second silicon nitride layer 208 is in the range of 40nm to 70nm, and the refractive index of the second silicon nitride layer 208 is in the range of 2.08 to 2.15.
optionally, the thickness of the third silicon oxide layer 209 is in the range of 10nm to 30 nm.
Alternatively, the thickness of the first silicon oxide layer 204 is in the range of 1nm to 5nm, the thickness of the aluminum oxide layer 203 is in the range of 4nm to 20nm, the thickness of the first silicon nitride layer 202 is in the range of 60nm to 90nm, and the refractive index of the first silicon nitride layer 202 is in the range of 2.08 to 2.2.
optionally, the thickness of the fourth silicon oxide layer 211 is in the range of 10nm to 30 nm.
alternatively, the silicon substrate 205 may be a P-type single crystal silicon substrate.
The utility model discloses in still provide solar cell's preparation method, this method can be used for preparing the utility model discloses the solar cell who provides in the above-mentioned embodiment. The preparation method is described in detail below with reference to fig. 4. The method comprises the following steps:
a) providing a P-type monocrystalline silicon wafer, and performing double-sided texturing, wherein the size of a textured surface is in the range of 1-3 mu m;
b) Performing single-side diffusion on the front surface of the textured silicon wafer, wherein the diffusion sheet resistance is in the range of 70-100 ohms;
c) Polishing the back of the silicon wafer after single-side diffusion to enable the reflectivity of the back to be more than 35%;
d) carrying out single-side thermal oxidation on the silicon wafer with the polished back surface, and forming a first silicon oxide layer on the front surface of the silicon wafer, wherein the thickness of the first silicon oxide layer is within the range of 1nm to 5 nm; in this step, when the silicon wafers are placed in the wafer grooves for thermal oxidation, two silicon wafers may be placed back to back in one wafer groove so that the fronts of both silicon wafers are exposed for simultaneous thermal oxidation. Compared with the double-sided thermal oxidation of the silicon wafer, the single-sided thermal oxidation adopted in the step doubles the yield;
e) Sequentially and continuously depositing a second silicon dioxide layer, an aluminum oxide layer, a first silicon nitride layer and a third silicon oxide layer on the back of the silicon wafer with a single surface subjected to thermal oxidation, wherein the thickness of the second silicon dioxide layer is within the range of 1nm to 5nm, the thickness of the aluminum oxide layer is within the range of 4nm to 20nm, the thickness of the first silicon nitride layer is within the range of 60nm to 90nm, the refractive index of the first silicon nitride layer is within the range of 2.08 to 2.2, and the thickness of the third silicon oxide layer is within the range of 10nm to 30 nm;
f) Depositing a second silicon nitride layer and a fourth silicon oxide layer in sequence on the front side of the silicon wafer after the back side deposition, wherein the thickness of the second silicon nitride layer is in the range of 40nm to 70nm, the refractive index of the second silicon nitride layer is in the range of 2.08 to 2.15, and the thickness of the fourth silicon oxide layer is in the range of 10nm to 30 nm;
g) performing laser grooving on the back of the silicon wafer after the front deposition is performed to expose an area for forming electrode contact on the surface of the silicon wafer;
h) And carrying out screen printing and sintering on the silicon wafer subjected to laser grooving to form an electrode.
Optionally, the temperature of the thermal oxidation carried out in step d) is in the range of 600 ℃ to 750 ℃ and the oxygen flow rate is in the range of 1SLM to 5SLM, the time of the thermal oxidation is in the range of 10 minutes to 30 minutes.
Optionally, the deposition in step e) and step f) is performed by Plasma Enhanced Chemical Vapor Deposition (PECVD).
The above embodiments are only for illustrating the technical conception and the features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and the protection scope of the present invention can not be limited thereby, and all equivalent changes or modifications made according to the spirit of the present invention should be covered in the protection scope of the present invention.
Claims (7)
1. A silicon solar cell, comprising in sequence from bottom to top: the semiconductor device comprises a back electrode, a first silicon nitride layer, an aluminum oxide layer, a first silicon oxide layer, a silicon substrate, an emitter layer, a second silicon oxide layer, a second silicon nitride layer, a third silicon oxide layer and a front electrode.
2. The silicon solar cell of claim 1, wherein a fourth silicon oxide layer is further disposed between the back electrode and the first silicon nitride layer.
3. silicon solar cell according to claim 1 or 2, characterised in that the thickness of the second silicon oxide layer is in the range of 1 to 5nm, the thickness of the second silicon nitride layer is in the range of 40 to 70nm and the refractive index of the second silicon nitride layer is in the range of 2.08 to 2.15.
4. Silicon solar cell according to claim 3, characterised in that the thickness of the third silicon oxide layer is in the range of 10 to 30 nm.
5. The silicon solar cell of claim 2, wherein the first silicon oxide layer has a thickness in a range of 1nm to 5nm, the aluminum oxide layer has a thickness in a range of 4nm to 20nm, the first silicon nitride layer has a thickness in a range of 60nm to 90nm, and the first silicon nitride layer has a refractive index in a range of 2.08 to 2.2.
6. Silicon solar cell according to claim 5, characterised in that the thickness of the fourth silicon oxide layer is in the range of 10 to 30 nm.
7. The silicon solar cell of claim 1, wherein the silicon substrate is a P-type single crystal silicon substrate.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920818103.7U CN209804668U (en) | 2019-05-31 | 2019-05-31 | silicon solar cell |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201920818103.7U CN209804668U (en) | 2019-05-31 | 2019-05-31 | silicon solar cell |
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| CN209804668U true CN209804668U (en) | 2019-12-17 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115172522A (en) * | 2022-07-12 | 2022-10-11 | 浙江晶科能源有限公司 | Solar cell, preparation method and photovoltaic module |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115172522A (en) * | 2022-07-12 | 2022-10-11 | 浙江晶科能源有限公司 | Solar cell, preparation method and photovoltaic module |
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