CN209460611U

CN209460611U - A kind of address code setting circuit

Info

Publication number: CN209460611U
Application number: CN201920283328.7U
Authority: CN
Inventors: 吕少锋; 孙阳; 张亮; 周长文; 田云芳
Original assignee: Liuzhou Kai Oriental Automobile Co Ltd
Current assignee: Liuzhou Kai Oriental Automobile Co Ltd
Priority date: 2019-03-06
Filing date: 2019-03-06
Publication date: 2019-10-01
Anticipated expiration: 2029-03-06

Abstract

The utility model relates to the address codes of BMS module, and technical field is arranged, and in particular to a kind of address code setting circuit.Circuit is arranged in the address code, including switch S1, switch S2, Light-emitting diode LED, processor and several resistance, the level of the port switch S1 control processor P1, the level of the port switch S2 control processor P2, it is converted by the low and high level of the port P1 and the port P2 and carries out binary address coding, LED indication is then lighted in address code success.The beneficial effect is that: binary address codings are carried out by two manual switches, and then realize the address setting of module, circuit is simple, coding simplicity, strong flexibility, high-efficient, with least hardware resource solution module's address encoded question.

Description

A kind of address code setting circuit

Technical field

The utility model relates to the address codes of BMS module, and technical field is arranged, and in particular to a kind of address code setting Circuit.

Background technique

Cell management system of electric automobile (BMS) mostly uses master-slave system topological structure, by a master control and it is multiple from Control is managed battery pack, in order to realize the communication of multiple modules, needs that address is arranged from control to each.Common BMS mould There are three types of the block address plans of establishment: the first scheme, is solidified address by burn recording software before module factory, each module entrucking Match address before, needing more change of address then must burning program, defect be again that module's address is fixed, and module does not have There is versatility；Second scheme, stage of hardware designing solidify address, and automatic identification is arranged by SCM peripheral circuit in software Address, each address correspond to a kind of hardware state, and defect is that hardware version is more, and control is complicated；The third scheme, design are hard Enable port outside part can be realized and install in BMS application by software setting or more change of address in the case that hardware is enabled Setting address, defect are manually to participate in more, address setting low efficiency in real time in the process.Three of the above scheme is needing scene The module of specified address is needed replacing in the case where replacement module or specific technology personnel is needed to reset address, work effect Rate is low, and Operating Complexity is big.

The batch production and delivery of BMS needs modular platform design, General design, while exigent assembly is imitated Rate and convenient after-sales service.In consideration of it, designing simple and efficient, high reliablity the module's address setting circuit of one kind is BMS hair The needs of exhibition.

Utility model content

In order to make up for the defects of the prior art, the utility model provides a kind of address codes, and circuit is arranged.

The utility model is achieved by the following technical solution:

A kind of address code setting circuit, including switch S1, switch S2, Light-emitting diode LED, processor, resistance R1, electricity Hinder 2, resistance R3, the port P1 of the processor connect via switch S1 with VDD, the port P2 of processor via switch S2 and The port P3 of GND connection, processor is connect via R3 and LED with GND, the port P1 connection pull down resistor R1, in the connection of the port P2 Pull-up resistor R2 generates low and high level transformation in the port P1 and the port P2 by control switch S1, switch S2 and realizes binary address LED indication is then lighted in coding, address code success.

Further, circuit is arranged in the address code, and switch S1 and switch S2 are self-resetting button switches, multiple It is off-state under the conditions of position.P1 port default low level then generates a high level signal in the port P1 by lower switch S1；P2 Port default high level then generates a low level signal in the port P2 by lower switch S2；Simultaneously by lower switch S1 and switch S2 Then enter address Setting pattern, LED, which is lighted, then enters operational mode.

Further, circuit is arranged in the address code, and effectively, variation generates two to the triggering of the port P1 high level from low to high Binary state 1；Effectively, variation generates binary condition 0, binary address code length to the triggering of the port P2 low level from high to low N, N are natural number, are set by processor software, and the n times power that the maximum address quantity of setting is 2, N takes 5 to can be set 32 Address.

The beneficial effects of the utility model are: carrying out binary address coding by two manual switches, and then realize mould The address of block is arranged, simple structure, it is reliable, at low cost, operate conveniently, code efficiency it is high, effectively solve the setting of BMS module's address Problem.

Detailed description of the invention

The utility model will be further described below with reference to the accompanying drawings.

Attached drawing 1 is that schematic block circuit diagram is arranged in the utility model address code；

Attached drawing 2 is that the utility model starts coding mode schematic diagram；

Attached drawing 3 is the utility model high level trigger theory figure；

Attached drawing 4 is the utility model low level trigger theory figure；

Attached drawing 5 is the utility model address #3 setting procedure figure.

Specific embodiment

Attached drawing 1-5 is a kind of specific embodiment of the utility model.Circuit, packet is arranged in a kind of address code of the utility model Include switch S1, switch S2, Light-emitting diode LED, processor, resistance R1, resistance 2, resistance R3, the port the P1 warp of the processor It is connect by switch S1 with VDD, the port P2 of processor is connect via switch S2 with GND, and the port P3 of processor is via R3 and LED It is connect with GND, the port P1 connects pull down resistor R1, and the port P2 connects pull-up resistor R2, by control switch S1, switch S2 in P1 Port and the port P2 generate low and high level transformation and realize binary address coding, and LED indication is then lighted in address code success.

Circuit is arranged in a kind of address code of the utility model, into after address code mode, is then holding by primary switch S1 The mouth port P1 generates a state 1, shown in Fig. 3；A state 0, Fig. 4 institute then are generated in the port port P2 by primary switch S2 Show.It is assumed that the total number of addresses needed is 16, then binary address code length N is set in the program of all modules as 4.With For the #3 of setup module address, corresponding binary coding is 0011, and state write-in is from status to high-order sequence, address setting stream Journey is as shown in Figure 5.

The port SteP1: while by lower switch S1 and switch S2, into address Setting pattern.

The port SteP2: by No. 1 S1, bit0, switch write-ins 1.

Step3: by No. 1 S1, bit1, switch write-ins 1.

Step4: by No. 1 S2, bit2, switch write-ins 0.

Step5: by No. 1 S2, bit3, switch write-ins 0.

Step6: address 0011 is arranged successfully, and LED is lighted, and from address, Setting pattern is transferred to operational mode.

And so on, the address if necessary to coding is more, can change the numerical value of N.The number of BMS module in one system Amount is typically less than 20, therefore settable N=5, amounts to the address code for carrying out 32 modules.The coding mode is simple, it is practical, Reliably, efficiently, there is application value.

The utility model is not limited to above embodiment, anyone, which should learn, makes under the enlightenment of the utility model There is same or similar technical solution with the utility model, each fall within the protection scope of the utility model.

Technology that the utility model is not described in detail, shape, construction portion are well-known technique.

Claims

1. circuit, including switch S1, switch S2, Light-emitting diode LED, processor, resistance R1, resistance is arranged in a kind of address code 2, resistance R3, which is characterized in that the port P1 of the processor is connect via switch S1 with VDD, the port P2 of processor via Switch S2 is connect with GND, and the port P3 of processor is connect via R3 and LED with GND, and the port P1 connects pull down resistor R1, the end P2 Mouth connection pull-up resistor R2 generates low and high level transformation in the port P1 and the port P2 by control switch S1, switch S2 and realizes two LED indication is then lighted in system address code, address code success.

2. circuit is arranged in a kind of address code according to claim 1, it is characterised in that: the switch S1 and switch S2 are Self-resetting button switch is off-state, P1 port default low level, by lower switch S1 then at the end P1 under reset condition Mouth generates a high level signal；P2 port default high level then generates a low level signal in the port P2 by lower switch S2； Then enter address Setting pattern by lower switch S1 and switch S2 simultaneously, LED, which is lighted, then enters operational mode.

3. circuit is arranged in a kind of address code according to claim 1 or 2, it is characterised in that: the port P1 high level Effectively, variation generates binary condition 1 from low to high for triggering；Effectively, variation generates two to the triggering of the port P2 low level from high to low Binary state 0.

4. circuit is arranged in a kind of address code according to claim 1, it is characterised in that: the binary address coding length N is spent, N is natural number, is set by processor software, the n times power that the maximum address quantity of setting is 2.