CN209404775U

CN209404775U - A kind of electrocardiogram signal processing device

Info

Publication number: CN209404775U
Application number: CN201821022098.0U
Authority: CN
Inventors: 秦宗荣
Original assignee: Cheng Cheng Technology Chengdu Co Ltd
Current assignee: Cheng Cheng Technology Chengdu Co Ltd
Priority date: 2018-06-29
Filing date: 2018-06-29
Publication date: 2019-09-20
Anticipated expiration: 2028-06-29

Abstract

The utility model discloses a kind of electrocardiogram signal processing devices, including Signal Pretreatment unit, counting unit and display unit, Signal Pretreatment unit includes shaping circuit and phase-locking frequency multiplication circuit, counting unit includes control signal generator, basic counter and count status register, display unit includes decoder and display, the shaping circuit is correspondingly connected with the basic counter by the phase-locking frequency multiplication circuit, the control signal generator is correspondingly connected with the basic counter and the count status register, the basic counter is correspondingly connected with the count status register, the count status register is correspondingly connected with the display by the decoder.The measurement result accuracy obtained using the equipment is high, and reference value is big, strong antijamming capability, while apparatus figure circuit structure is simple, easy to carry, less energy-consuming, at low cost.

Description

A kind of electrocardiogram signal processing device

Technical field

The utility model relates to a kind of cardioelectric monitor system, especially a kind of electrocardiogram signal processing device.

Background technique

Electrocardiogram has the advantages that hurtless measure, goes out to scheme fast, easy to operate, and Electrocardiography is the normal of heart disease clinical examination Rule means provide important references authority for the diagnosis of various arrhythmia cordis and conductive impairment.With computer technology, the communication technology Etc. the relevant technologies rapid development, electrocardiogram monitoring technology is also gradually applied to tele-medicine field, remote ecg monitoring It is the physiology of distal end and medical signals to be transmitted to monitoring center by communication network to analyze, and provide the one of diagnostic comments Kind technological means.The existing generally existing volume of remote ecg monitoring device is big, cost is excessively high, monitoring result accuracy is low lacks It falls into, this is unfavorable for the popularization and application of remote ecg monitoring in patients.

Utility model content

The goal of the invention of the utility model is: in view of the above problems, providing a kind of reliable performance, structure letter Single, low-cost electrocardiogram signal processing device.

The technical solution adopted in the utility model is as follows:

A kind of electrocardiogram signal processing device, including Signal Pretreatment unit, counting unit and display unit, Signal Pretreatment Unit includes shaping circuit and phase-locking frequency multiplication circuit, and counting unit includes control signal generator, basic counter and count status Register, display unit include decoder and display, and the shaping circuit is correspondingly connected with institute by the phase-locking frequency multiplication circuit Basic counter is stated, the control signal generator is correspondingly connected with the basic counter and the count status register, the master Counter is correspondingly connected with the count status register, and the count status register is correspondingly connected with described by the decoder Display.

Further, the shaping circuit uses monostable flipflop, and the monostable flipflop uses schmidt trigger Device input structure.

Further, the phase-locking frequency multiplication circuit includes phase discriminator, loop filter and voltage controlled oscillator, the phase discriminator Closed loop is formed by the loop filter and the voltage controlled oscillator.

Further, the voltage controlled oscillator is provided with free oscillation frequency design circuit.

Further, the control signal generator is provided with signal strobe generation unit, and the signal strobe occurs single Member includes second signal generator and frequency dividing circuit.

Further, the control signal generator is provided with reset signal generating unit, and the reset signal occurs single Member is made of 2 inputs and door and 2 inputs or door.

Further, the control signal generator is provided with latch signal generating unit, and the signal strobe generates single Member connection phase inverter constitutes the latch signal generating unit.

Further, the second signal generator includes crystal oscillating circuit, trimming circuit and binary counter.

Further, described device further includes alarm unit, and the alarm unit includes digital comparator, phase inverter harmony Light crossing-signal.

The achievable positive advantageous effects of the utility model include passing through setting shaping circuit and phase locking frequency multiplying electricity Road is realized and is inhibited to the harmonic wave dynamic inhibition of electrocardiosignal and noise jamming, is then carried out using basic counter to electrocardiosignal It counts, accuracy is high, and reference value is big, strong antijamming capability；Apparatus figure circuit structure is simple, and equipment is easy to carry, operates It is simplicity, less energy-consuming, at low cost.

Detailed description of the invention

Fig. 1 is electrocardiogram signal processing device structural block diagram provided by the embodiment of the utility model；

Fig. 2 is phase-locking frequency multiplication circuit structure chart provided by the embodiment of the utility model；

Fig. 3 is second signal generator circuit diagram provided by the embodiment of the utility model；

Fig. 4 is frequency dividing circuit provided by the embodiment of the utility model, latch signal, clear circuit figure；

Fig. 5 is counter circuit figure provided by the embodiment of the utility model；

Fig. 6 is latch, decoding and display circuit provided by the embodiment of the utility model；

Fig. 7 is that comparator provided by the embodiment of the utility model transfinites sound light alarming circuit figure.

Specific embodiment

With reference to the accompanying drawing, the utility model is described in detail.

In order to make the purpose of the utility model, technical solutions and advantages more clearly understood, below in conjunction with attached drawing and implementation Example, the present invention will be further described in detail.It should be appreciated that specific embodiment described herein is only used to explain The utility model is not used to limit the utility model.

Fig. 1 is electrocardiogram signal processing device structural block diagram provided by the embodiment of the utility model, as shown in Figure 1, including letter Number pretreatment unit, counting unit and display unit, Signal Pretreatment unit include shaping circuit and phase-locking frequency multiplication circuit, are counted Unit includes control signal generator, basic counter and count status register, and display unit includes decoder and display, institute It states shaping circuit and the basic counter is correspondingly connected with by the phase-locking frequency multiplication circuit, the control signal generator is correspondingly connected with The basic counter and the count status register, the basic counter is correspondingly connected with the count status register, described Count status register is correspondingly connected with the display by the decoder.

Shaping circuit uses monostable flipflop, and monostable flipflop uses Schmidt trigger input structure, works as input When the poor electrocardiosignal in the edge of device is as shaping circuit trigger signal, shaping circuit exports the square of width and constant amplitude Shape pulse.Phase-locking frequency multiplication circuit includes phase discriminator, loop filter and voltage controlled oscillator, and the phase discriminator is filtered by the loop Wave device and the voltage controlled oscillator form closed loop.As embodiment, phase-locking frequency multiplication circuit, frequency multiplication N are constituted using CC4046 =4, Fractional-N frequency need to be only inserted between the voltage controlled oscillator VCO input terminal and phase discriminator PC2 output end of locking phase at this time.Fig. 2 For phase-locking frequency multiplication circuit structure chart provided by the embodiment of the utility model, as shown in Fig. 2, input signal is input to phase discriminator PC2 Input terminal (14 foot), voltage controlled oscillator VCO exports signal Fo/N after Fractional-N frequency, while divided signal Fo/N is added to Another input terminal of phase discriminator.Optimally, voltage controlled oscillator be provided with free oscillation frequency design circuit (elements such as R1, R2, C1 Selection), guarantee Fo/N and Fi difference fall in phaselocked loop catching range, otherwise can losing lock, Fi expression average electro-cardiologic signal frequency. If Vdd=5V, Fi (average)=80 beats/min=1.333HZ, Fomin=50 beats/min=0.883HZ, Fomax=10HZ, according to Fomin and Fomax determines voltage controlled oscillator VCO timing element R1, R2, C1 value, when obtaining Fomin=3.332HZ, R2= 100K Ω, C1=1uf, Fomin/Fomin=10/3.332=3, R2/R1=6, so R1=R2/6=16.66K Ω.In order to Convenient for appropriate adjustment in practice, R1=18 Ω is selected, R2 is in series by 82K Ω fixed resistance and 40 Ω potentiometers.Loop filter Wave device is made of R3, R4, C2, generally takes R3=470K Ω, R4=47K Ω, C2=1uf.

Control signal generator is provided with signal strobe and unit occurs, and is input to basic counter for generating signal strobe In, signal strobe occurs unit and generates the second signal that 1 period is 1s, and then through 15 frequency dividings, then through 2 frequency dividings, obtaining the period is 30s, the signal strobe that pulse is 15s.It includes second signal generator and frequency dividing circuit that unit, which occurs, for signal strobe, and second signal occurs Device includes crystal oscillating circuit, trimming circuit and binary counter, and Fig. 3 is second signal provided by the embodiment of the utility model hair Raw device circuit diagram is made of as shown in figure 3, the crystal frequency of crystal-oscillator circuit is 32768HZ Resistor-Capacitor Unit and gate circuit , trimming circuit C2 effect is fine tuning frequency of oscillation.Crystal oscillator is sent into first 12 binary counter CC4040 and is made The clock as second CC4040 is exported for counting clock (CLK), the Q12 of first CC4040, because to make 2¹⁵Frequency dividing, institute To be exported from the Q3 of second CC4040, to obtain the second signal that frequency is 1HZ.

Fig. 4 is frequency dividing circuit provided by the embodiment of the utility model, latch signal, clear circuit figure, as shown in figure 4, raw After the second signal for being 1HZ at frequency, the frequency dividing of mould 15 and constitute 2 points of a d type flip flop being made of a piece of 74LS163D are utilized Frequency circuit handles second signal, and obtaining the period is 30S, and duty ratio 50%, i.e. high level time are the counting gate signal of 15s. Control signal generator is provided with reset signal generating unit, is input in basic counter for generating reset signal, resets letter Number generating unit is inputted by 2 inputs with door and 2 or door is constituted.The latch signal of count status register is directly by signal strobe Inversion signal is realized.

Fig. 5 is counter circuit figure provided by the embodiment of the utility model, and Fig. 6 is lock provided by the embodiment of the utility model Deposit, decode and display circuit, as shown, after frequency multiplication electrocardiosignal and signal strobe phase with that is, electrocardiosignal passes through master control door Remove the synchronous counting clock as basic counter.Because the heart rate upper limit is up to more than 100 beats/min, as shown in figure 5, selecting 3 74LS160 Binary counter is as basic counter.As shown in Fig. 6, asynchronous resetting signal first through basic counter is reset, then by The signal strobe control of 15s is output to 74377 count status register of two panels, latched clock control in count status register Output finally shows electrocardio frequency using common cathode seven segment digital tubes BS205 by 3 7447 decoder for decoding.

Optimally, described device further includes alarm unit, and alarm threshold is set as 50 beats/min of lower bound, and height limits 150 beats/min, Alarm unit includes digital comparator, phase inverter and combined aural and visual alarm.The overload alarm of heart rate is realized using digital comparator, Because a position of lower bound (50 beats/min) and high limit (150 beats/min) is all 0, need to only compare tens and hundreds. Fig. 7 is that comparator provided by the embodiment of the utility model transfinites sound light alarming circuit figure, as shown in fig. 7, using 7 bit digital of two panels Comparator 74LS686 constitutes warning circuit, and upper piece 74LS682 comparator compares for high limit, and bottom sheet 74LS682 comparator is used for Lower bound compares.It compares shown in the setting difference following table of end P.

74LS686 compares the setting at end

The output end of count status latch and the input terminal of comparator connect, as long as the hundreds of latch are 1, ten Digit is 5, then upper comparator output is high level, and red light emitting diodes are lit.Similarly, when hundred of latch are 0, ten When digit is less than or equal to 5, the end EQ of bottom sheet comparator is high level, and the end P-GR-QN is low level, it is inverted and with it is defeated behind the door It is out high level, respective leds are lighted, and then complete to compare the sound-light alarm that transfinites constituted by high-order and low level.

The above is only the preferred embodiment of the utility model only, is not intended to limit the utility model, all at this Made any modifications, equivalent replacements, and improvements etc., should be included in the utility model within the spirit and principle of utility model Protection scope within.

Claims

1. a kind of electrocardiogram signal processing device, it is characterised in that including Signal Pretreatment unit, counting unit and display unit, letter Number pretreatment unit includes shaping circuit and phase-locking frequency multiplication circuit, counting unit include control signal generator, basic counter and Count status register, display unit include decoder and display, and the shaping circuit passes through the phase-locking frequency multiplication circuit pair The basic counter should be connected, the control signal generator is correspondingly connected with the basic counter and count status deposit Device, the basic counter are correspondingly connected with the count status register, and the count status register passes through the decoder pair The display should be connected.

2. a kind of electrocardiogram signal processing device according to claim 1, which is characterized in that the shaping circuit is using monostable State trigger, the monostable flipflop use Schmidt trigger input structure.

3. a kind of electrocardiogram signal processing device according to claim 1, which is characterized in that the phase-locking frequency multiplication circuit includes Phase discriminator, loop filter and voltage controlled oscillator, the phase discriminator pass through the loop filter and the voltage controlled oscillator shape At closed loop.

4. a kind of electrocardiogram signal processing device according to claim 3, which is characterized in that the voltage controlled oscillator is provided with Free oscillation frequency designs circuit.

5. a kind of electrocardiogram signal processing device according to claim 1, which is characterized in that the control signal generator is set It is equipped with signal strobe and unit occurs, it includes second signal generator and frequency dividing circuit that unit, which occurs, for the signal strobe.

6. a kind of electrocardiogram signal processing device according to claim 5, which is characterized in that the control signal generator is set It is equipped with reset signal generating unit, the reset signal generating unit is made of 2 inputs and door and 2 inputs or door.

7. a kind of electrocardiogram signal processing device according to claim 5, which is characterized in that the control signal generator is set It is equipped with latch signal generating unit, the signal strobe generation unit connection phase inverter constitutes the latch signal generating unit.

8. a kind of electrocardiogram signal processing device according to claim 5, which is characterized in that the second signal generator includes Crystal oscillating circuit, trimming circuit and binary counter.

9. a kind of electrocardiogram signal processing device according to claim 1, which is characterized in that described device further includes that alarm is single Member, the alarm unit include digital comparator, phase inverter and combined aural and visual alarm.