CN209374035U - A kind of high speed differential signal circuit and test macro - Google Patents
A kind of high speed differential signal circuit and test macro Download PDFInfo
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- CN209374035U CN209374035U CN201920224771.7U CN201920224771U CN209374035U CN 209374035 U CN209374035 U CN 209374035U CN 201920224771 U CN201920224771 U CN 201920224771U CN 209374035 U CN209374035 U CN 209374035U
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Abstract
The utility model discloses a kind of high speed differential signal circuit and test macros.Wherein, high speed differential signal circuit includes at least one set of high speed differential signal transmission line road, wherein high speed differential signal transmission line road described in every group includes a pair of of difference cabling, and one or more groups of high speed differential signal transmission line roads are provided with adjustable resistance network.The technical solution of the utility model on high speed differential signal transmission line road by being arranged adjustable resistance network, it can be when there is impedance mismatch in high speed differential signal transmission line road, by the impedance for adjusting adjustable resistance network, matching status is recalled into the impedance on high speed differential signal transmission line road, it is unmatched to solve the problems, such as that high speed differential signal transmission line roadlock resists, improve the reliability of differential signal transmission.
Description
Technical field
The utility model embodiment is related to differential signal technical field more particularly to a kind of high speed differential signal circuit and survey
Test system.
Background technique
In the design of high-resolution display panel, display panel may be driven using multiple groups driving chip, therefore
When to display panel image test, the high speed differential signal transmission line road group number in image test system becomes more, and FPC design becomes
Complexity, the connector between FPC and PCB also become, and test fixture also becomes complicated in impedance design.And same set of image news
Number generator is likely encountered a variety of different determinands, test environment and other factors, causes and the high speed differential news of type design
Number transmission circuit occur impedance mismatch state, make electric signal generate reflex, and cause energy attenuation, intersymbol interference,
EMI is exceeded, shakes and influence rising edge and failing edge etc., finally makes signal decoding error.In summary all changeable because knowing
In the application of image test system, due to test environmental factor, FPC design, PCB design and connector contact etc., it is easy
Lead to high speed differential signal transmission line road impedance mismatch, fails so as to cause to display panel image test.
Utility model content
In view of this, the purpose of this utility model is to propose a kind of high speed differential signal circuit and test macro, to solve
High speed differential signal transmission line roadlock resists unmatched problem, improves the reliability of differential signal transmission.
To achieve the above objectives, the present invention adopts the following technical solutions:
On the one hand, the utility model embodiment provides a kind of high speed differential signal circuit, including at least one set of high speed difference
Dynamic signal transmission line road, wherein high speed differential signal transmission line road described in every group includes a pair of of difference cabling, one or more groups of institutes
It states high speed differential signal transmission line road and is provided with adjustable resistance network.
Optionally, the road of high speed differential signal transmission line described in every group is provided with the adjustable resistance network.
Optionally, the adjustable resistance network is numerical digit adjustable resistance network.
Optionally, the pair of difference cabling includes the first difference cabling and the second difference cabling, the numerical digit adjustable electric
Hinder network include the first digital regulation resistance, the second digital regulation resistance sum number level controller, the numerical digit controller respectively with it is described
First digital regulation resistance and second digital regulation resistance electrical connection, for controlling first digital regulation resistance and described second
Digital regulation resistance adjusting resistance value, first digital regulation resistance are serially connected in the first difference cabling, second number
Potentiometer is serially connected in the second difference cabling.
Optionally, the numerical digit controller includes control signal trigger module and control signal reception end, the control news
Number trigger module and control signal reception end electrical connection；And/or the numerical digit controller includes wireless communication module and control
Signal reception end processed, the wireless communication module and control signal reception end electrical connection.
Optionally, the control signal trigger module includes rotary-type switch, push switch, refers to the type of dialling switch or touch-control
Type controls component.
Optionally, the wireless communication module includes WIFI module, bluetooth module, 2G/3G/4G/5G module or Zigbee
Module.
Optionally, the numerical digit controller is single-chip microcontroller, special application integrated circuit ASIC or field programmable gate array
FPGA。
On the other hand, the utility model embodiment additionally provides a kind of test macro, including the utility model embodiment institute
The high speed differential signal circuit of offer.
Optionally, the test macro further includes video signal generator and at least one video signal conversion chip, institute
It states video signal generator to connect at least one described video signal conversion chip, the video signal conversion chip and described
High speed differential signal transmission line road in high speed differential signal circuit is arranged in a one-to-one correspondence, high speed differential signal transmission line road
One end be electrically connected with the differential signal port of the video signal conversion chip, high speed differential signal transmission line road it is another
One end with the differential signal port of driving chip for being electrically connected, wherein the driving chip and the high speed differential signal pass
Defeated route is arranged in a one-to-one correspondence, and the driving chip is for driving display panel.
The beneficial effects of the utility model are: high speed differential signal circuit provided by the utility model and test macro, lead to
It crosses on one or more groups of high speed differential signal transmission line roads at least one set of high speed differential signal transmission line road and is arranged
Adjustable resistance network, so that when impedance mismatch occurs in the high speed differential signal transmission line road for being provided with adjustable resistance network,
The impedance on corresponding high speed differential signal transmission line road can be recalled into matching status by the impedance of adjusting adjustable resistance network, from
And it is unmatched to solve the problems, such as that corresponding high speed differential signal transmission line roadlock resists, and improves the reliability of differential signal transmission.
Detailed description of the invention
The exemplary embodiment of the utility model will be described in detail by referring to accompanying drawing below, make the ordinary skill of this field
Personnel become apparent from the above-mentioned and other feature and advantage of the utility model, in attached drawing:
Fig. 1 is the structural schematic diagram of high speed differential signal circuit provided by the embodiment of the utility model；
Fig. 2 is the structural schematic diagram of test macro provided by the embodiment of the utility model.
Specific embodiment
Further illustrate the technical solution of the utility model below with reference to the accompanying drawings and specific embodiments.It can manage
Solution, specific embodiment described herein are used only for explaining the utility model, rather than the restriction to the utility model.Separately
Outside it should also be noted that, illustrating only part relevant to the utility model for ease of description, in attached drawing and not all knot
Structure.
Fig. 1 is the structural schematic diagram of high speed differential signal circuit provided by the embodiment of the utility model.The present embodiment provides
High speed differential signal circuit be suitable for adjusting the case where impedance of high speed differential signal transmission line road is to carry out impedance matching,
It may be disposed in the circuit system for needing transmission differential signal.As shown in Figure 1, the high speed differential signal circuit 1 includes at least one
Group high speed differential signal transmission line road 10, wherein every group of high speed differential signal transmission line road 10 includes a pair of of difference cabling, and one group
Or adjustable resistance network 20 is provided on multiple groups high speed differential signal transmission line road 10.
In the present embodiment, the both ends on every group of high speed differential signal transmission line road 10 and the differential amplifier circuit of external circuit connect
It connects, the Z in Fig. 1 indicates the equivalent impedance of single difference cabling.By adjusting the resistance value of adjustable resistance network 20, it is poor to can be changed
The impedance on dynamic signal transmission line road 10 so that the impedance of differential signal transmission line 10 be made to reach matching status, and then eliminates electricity
The reflex of sub- signal prevents differential signal decoding error.The adjustable resistance range of above-mentioned adjustable resistance network 20 can basis
The parameter etc. of the design parameter of high speed differential signal circuit 1 and its practical circuit system accessed is designed, the present embodiment
With no restriction to this, as long as when impedance mismatch occurs in high speed differential signal transmission line road 10, by adjusting adjustable resistance net
The impedance on high speed differential signal transmission line road 10 is recalled to matching status by network 20.
The present embodiment passes through one or more groups of high speed differentials at least one set of high speed differential signal transmission line road
Signal transmission line road setting adjustable resistance network, so that on the high speed differential signal transmission line road for being provided with adjustable resistance network
When there is impedance mismatch, the resistance on high speed differential signal transmission line road can will be corresponded to by the impedance of adjusting adjustable resistance network
It is anti-to recall to matching status, so that it is unmatched to solve the problems, such as that corresponding high speed differential signal transmission line roadlock resists, improve differential
The reliability of signal transmission.
Optionally, in above-mentioned technical proposal, adjustable resistance net is provided on every group of high speed differential signal transmission line road 10
Network, it is possible thereby to guarantee the impedance match situation of entire high speed differential signal circuit 1.
Optionally, adjustable resistance network is numerical digit adjustable resistance network.It can be realized using numerical digit adjustable resistance network to can
Long-range and/or short range the control and regulation of the resistance value of resistor network 20 are adjusted, to adapt to various different test environment.
Illustratively, it continues to refer to figure 1, a pair of of difference cabling includes the first difference cabling 101 and the second difference cabling
102, numerical digit adjustable resistance network includes the first digital regulation resistance VR1, the second digital regulation resistance VR2 sum number level controller 201, number
Level controller 201 is electrically connected with the first digital regulation resistance VR1 and the second digital regulation resistance VR2 respectively, for controlling the first number
Potentiometer VR1 and the second digital regulation resistance VR2 adjusting resistance value, the first digital regulation resistance VR1 are serially connected with the first difference cabling 101
In, the second digital regulation resistance VR2 is serially connected in the second difference cabling 102.
In the present embodiment, the first digital regulation resistance VR1 and the second digital regulation resistance VR2 be can be by Maxim offer
MAX5419, is also possible to the TPL0401B provided by Texas Instruments, is not construed as limiting to this.Numerical digit controller 201
It can be single-chip microcontroller, special application integrated circuit ASIC or on-site programmable gate array FPGA, or other can be generated pair
The component of the control signal of digital regulation resistance control.Above-mentioned numerical digit controller 201 can control one or more digital current potentials
Device, as long as the output pin of numerical digit controller 201 is enough.Numerical digit controller 201 and the first digital regulation resistance VR1 and
Two digital regulation resistance VR2 pass through the communication interface being mutually matched and carry out communication connection；For example, if the first digital regulation resistance VR1 and
Second digital regulation resistance VR2 uses I2C communication interface, then numerical digit controller 201 is controlled using identical communications protocol；
If the first digital regulation resistance VR1 and the second digital regulation resistance VR2 uses SPI, UART or customized communication interface, numerical digit control
As long as the control mode of device 201 is matched.When the resistance value of adjustable resistance network 10 is adjusted in realization, numerical digit
Controller 201 receives a control signal (can be a digital value), the corresponding first digital regulation resistance VR1 of the control signal or
Second digital regulation resistance VR2 only one resistance value, numerical digit controller 201 are sent to the will control signal by communication interface
One digital regulation resistance VR1 or the second digital regulation resistance VR2, to control to adjust the digital current potential of the first digital regulation resistance VR1 or second
The resistance value of device VR2.
Optionally, numerical digit controller includes control signal trigger module and control signal reception end, controls signal trigger mode
Block and the electrical connection of control signal reception end；And/or numerical digit controller includes wireless communication module and controls signal reception end, wirelessly
Communication module and the electrical connection of control signal reception end.
Specifically, when numerical digit controller includes control signal trigger module and control signal reception end, it can be achieved that logarithm
Level controller manually controls.Wherein, control signal trigger module may include rotary-type switch, push switch, refer to the type of dialling
Switch or touch controlled type control component.When numerical digit controller include wireless communication module and control signal reception end when, it can be achieved that
The wireless control of logarithm level controller.Wherein, wireless communication module may include WIFI module, bluetooth module, 2G/3G/4G/5G
Module or Zigbee module.
Numerical digit controller in the present embodiment can have the function of to manually control, and can also have Radio Control Function, can also be same
When have the function of to manually control and Radio Control Function.
It should be noted that the adjustable resistance network in above-mentioned technical proposal may be traditional mechanical adjustable resistance net
Network, correspondingly, adjustable resistance network includes the first mechanical potentiometer and the second mechanical potentiometer, the first mechanical potentiometer is serially connected with
In above-mentioned first difference cabling, the second mechanical potentiometer is serially connected in above-mentioned second difference cabling, the first mechanical potentiometer and
Two mechanical potentiometers can by manually adjusting resistance value, also may be implemented as a result, to high speed differential signal transmission line roadlock resist
It adjusts.
In addition, the utility model embodiment additionally provides a kind of test macro, with reference to Fig. 2, which includes above-mentioned
The high speed differential signal circuit 1 that embodiment provides.
Test macro provided in this embodiment includes high speed differential signal circuit provided by the embodiment of the utility model, is had
Corresponding function and beneficial effect, details are not described herein again.
Illustratively, above-mentioned test macro can be the influence test macro for display panel image test.Such as Fig. 2 institute
Show, test macro further includes video signal generator 2 and at least one video signal conversion chip 3,2 He of video signal generator
At least one video signal conversion chip 3 connects, the high speed difference in video signal conversion chip 3 and high speed differential signal circuit 1
Dynamic signal transmission line road 10 is arranged in a one-to-one correspondence, the one end on high speed differential signal transmission line road 10 and video signal conversion chip 3
Differential signal port (differential amplifier circuit) electrical connection, the other end on high speed differential signal transmission line road 10 is used for and driving core
The differential signal port (differential amplifier circuit) of piece 4 is electrically connected, wherein driving chip 4 and high speed differential signal transmission line road 10
It is arranged in a one-to-one correspondence, driving chip 4 is for driving display panel 5.
The present embodiment, when image signal receives generation problem, can pass through control when carrying out image test to display panel 5
System adjusts the adjustable resistance network on high speed differential signal transmission line road 10, so that high speed differential signal transmission line road 10 reaches resistance
Thus anti-matching status eliminates the reflex of electric signal, so that image signal, which receives, restores normal, realize to display panel
Proper testing.
Note that above are only the preferred embodiment and institute's application technology principle of the utility model.Those skilled in the art's meeting
Understand, the utility model is not limited to specific embodiment described here, is able to carry out for a person skilled in the art various bright
Aobvious variation is readjusted, be combined with each other and is substituted without departing from the protection scope of the utility model.Therefore, although passing through
Above embodiments are described in further detail the utility model, but the utility model is not limited only to the above implementation
Example can also include more other equivalent embodiments in the case where not departing from the utility model design, and the utility model
Range is determined by the scope of the appended claims.
Claims (10)
1. a kind of high speed differential signal circuit, which is characterized in that including at least one set of high speed differential signal transmission line road, wherein
High speed differential signal transmission line road described in every group includes a pair of of difference cabling, one or more groups of high speed differential signal transmission lines
Road is provided with adjustable resistance network.
2. high speed differential signal circuit according to claim 1, which is characterized in that the transmission of high speed differential signal described in every group
The adjustable resistance network is provided on route.
3. high speed differential signal circuit according to claim 1, which is characterized in that the adjustable resistance network is that numerical digit can
Adjust resistor network.
4. high speed differential signal circuit according to claim 3, which is characterized in that the pair of difference cabling includes first
Difference cabling and the second difference cabling, the numerical digit adjustable resistance network include the first digital regulation resistance, the second digital regulation resistance
Sum number level controller, the numerical digit controller are electrically connected with first digital regulation resistance and second digital regulation resistance respectively
It connects, for controlling first digital regulation resistance and the second digital regulation resistance adjusting resistance value, the described first digital current potential
Device is serially connected in the first difference cabling, and second digital regulation resistance is serially connected in the second difference cabling.
5. high speed differential signal circuit according to claim 4, which is characterized in that the numerical digit controller includes control news
Number trigger module and control signal reception end, the control signal trigger module and the control signal reception end are electrically connected；With/
Or the numerical digit controller includes wireless communication module and control signal reception end, the wireless communication module and the control are interrogated
The electrical connection of number receiving end.
6. high speed differential signal circuit according to claim 5, which is characterized in that the control signal trigger module includes
Rotary-type switch, push switch refer to the type of dialling switch or touch controlled type control component.
7. high speed differential signal circuit according to claim 5, which is characterized in that the wireless communication module includes WIFI
Module, bluetooth module, 2G/3G/4G/5G module or Zigbee module.
8. high speed differential signal circuit according to claim 4, which is characterized in that the numerical digit controller be single-chip microcontroller,
Special application integrated circuit ASIC or on-site programmable gate array FPGA.
9. a kind of test macro, which is characterized in that including high speed differential signal circuit a method as claimed in any one of claims 1-8.
10. test macro according to claim 9, which is characterized in that the test macro further includes that video signal generates
Device and at least one video signal conversion chip, the video signal generator and at least one described video signal conversion chip
It connects, the high speed differential signal transmission line road one in the video signal conversion chip and the high speed differential signal circuit is a pair of
It should be arranged, the one end on high speed differential signal transmission line road and the differential signal port of the video signal conversion chip are electrically connected
It connects, the other end on high speed differential signal transmission line road with the differential signal port of driving chip for being electrically connected, wherein institute
It states driving chip and high speed differential signal transmission line road is arranged in a one-to-one correspondence, the driving chip is for driving display surface
Plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201920224771.7U CN209374035U (en) | 2019-02-22 | 2019-02-22 | A kind of high speed differential signal circuit and test macro |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920224771.7U CN209374035U (en) | 2019-02-22 | 2019-02-22 | A kind of high speed differential signal circuit and test macro |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110930914A (en) * | 2019-12-17 | 2020-03-27 | 京东方科技集团股份有限公司 | Signal detection circuit, signal detection method and display device |
| CN112017581A (en) * | 2020-09-03 | 2020-12-01 | Tcl华星光电技术有限公司 | Differential signal interface and display device using same |
| CN112117990A (en) * | 2020-09-16 | 2020-12-22 | 珠海格力电器股份有限公司 | Communication apparatus and control method thereof |
-
2019
- 2019-02-22 CN CN201920224771.7U patent/CN209374035U/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110930914A (en) * | 2019-12-17 | 2020-03-27 | 京东方科技集团股份有限公司 | Signal detection circuit, signal detection method and display device |
| CN112017581A (en) * | 2020-09-03 | 2020-12-01 | Tcl华星光电技术有限公司 | Differential signal interface and display device using same |
| CN112017581B (en) * | 2020-09-03 | 2022-02-22 | Tcl华星光电技术有限公司 | Differential signal interface and display device using same |
| US20220189379A1 (en) * | 2020-09-03 | 2022-06-16 | TCL China Star Optoelectronics Technology Co.,Ltd. | Differential signal interface and display device adopting the differential signal interface |
| US11705049B2 (en) * | 2020-09-03 | 2023-07-18 | Tcl China Star Optoelectronics Technology Co., Ltd. | Differential signal interface and display device adopting the differential signal interface |
| CN112117990A (en) * | 2020-09-16 | 2020-12-22 | 珠海格力电器股份有限公司 | Communication apparatus and control method thereof |
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Address after: 201506 No. nine, No. 1568 engineering road, Shanghai, Jinshan District Patentee after: Shanghai Hehui optoelectronic Co., Ltd Address before: 201506 No. nine, No. 1568 engineering road, Shanghai, Jinshan District Patentee before: EverDisplay Optronics (Shanghai) Ltd. |