CN209311566U - Signal validation apparatus - Google Patents
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- CN209311566U CN209311566U CN201821965043.3U CN201821965043U CN209311566U CN 209311566 U CN209311566 U CN 209311566U CN 201821965043 U CN201821965043 U CN 201821965043U CN 209311566 U CN209311566 U CN 209311566U
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Abstract
The utility model provides a kind of signal validation apparatus, it include: digital data acquisition interface, it is connect with the output end of the digital quantity input type combining unit at the first measuring point in the first two times transfer equipment for being connected to the first power circuit, for acquiring the message of digital quantity signal；Analog acquisition interface is connect, for acquiring analog signals with the second measuring point in the second secondary conversion equipment of the second power circuit；One of the analog signals and the digital quantity signal are to confirm correct signal in advance；Fpga chip is connect with the digital data acquisition interface and the analog acquisition interface respectively, for exporting the analog signals and according to the digital quantity signal after the specified delay data delay calibration in the message；Digital signal processing chip is connect with the fpga chip, is used for output signal verification result.It can be achieved at the same time through the above scheme and accurate, integrated signal verification carried out to digital quantity and analog quantity.
Description
Technical field
The utility model relates to electronic technology field more particularly to a kind of signal validation apparatus.
Background technique
The new equipment of substation before putting into operation, survey by the integrality and correctness for needing to carry out primary circuit and secondary circuit
Examination, must carry out the work of voltage nuclear phase and electric current direction finding amount thus.Voltage nuclear phase refers to correctly secondary with some determination
On the basis of voltage, whether each secondary voltage amplitude that measurement needs to verify is correct.Electric current direction finding amount refers to some determination
On the basis of correct secondary voltage/electric current, whether each secondary current phase and amplitude that measurement needs to verify is correct.It can incite somebody to action
Voltage nuclear phase and electric current direction finding amount are referred to as signal verification.
For conventional substation, since using electromagnetic transformer, secondary side voltage, electric current are electrical quantity,
So only voltage, electric current need to be accessed phase meter (as shown in Figure 1) by cable, electric signal core can be directly read from phase meter
Real result.
For the intelligent substation using analog input formula combining unit, since secondary side voltage, electric current are to pass through light
Fibre web network enters the digital quantity of the secondary devices such as protection and measure and control device, only need to be found from fault oscillograph corresponding voltage,
Current channel (as shown in Figure 2), that is, may check that its amplitude and phase.
But for New Generation of Intelligent substation, due to the merging using electronic mutual inductor and digital quantity input
Unit.When electronic mutual inductor and the combining unit of digital quantity input are used cooperatively, each remote end module and digital quantity input type are closed
And between unit and between digital quantity input type combining unit and secondary device connected by optical fiber, entire circuit does not all have
There are voltage, current-mode analog quantity, voltage, current data are sent to protection, observing and controlling and therefore record etc. entirely in the form of digital quantity
Secondary device.If the equipment that put into operation of certain substation is electronic mutual inductor, and new used device is electromagnetic transformer, when
When the electric signal for carrying out analog quantity to new equipment being needed to verify, since the equipment that put into operation is entirely optical fiber and digital amount, and it can not find
It can be used as the voltage or electric current of the analog quantity form of reference quantity, to be unable to complete the electric signal before putting into operation to new equipment
Verify work.
Utility model content
In view of this, the present invention provides a kind of signal validation apparatus, to realize the one of digital quantity and analog quantity
Formula signal is verified.
To achieve the goals above, the utility model uses following scheme:
In an embodiment of the utility model, signal validation apparatus, comprising:
Digital data acquisition interface, with the number being connected in the first two times transfer equipment of the first power circuit at the first measuring point
The output end of word amount input type combining unit connects, for acquiring the message of digital quantity signal；
Analog acquisition interface connect with the second measuring point in the second secondary conversion equipment of the second power circuit, is used for
Acquire analog signals；One of the analog signals and the digital quantity signal are to confirm correct signal in advance；
Fpga chip is connect, for receiving respectively with the digital data acquisition interface and the analog acquisition interface
Message and the analog signals are stated, and exports the analog signals and prolongs according to the specified delay data in the message
When calibration after the digital quantity signal；
Digital signal processing chip is connect with the fpga chip, for receiving the analog signals and delay calibration
The digital quantity signal afterwards, and output signal verification result.
In an embodiment of the utility model, the digital data acquisition interface is optical fiber interface.
In an embodiment of the utility model, the analog acquisition interface is A/D acquisition interface.
In an embodiment of the utility model, signal validation apparatus, further includes:
SD storage card and/or USB interface are connect with the digital signal processing chip, are used to provide the described the first electric power
The SCD file of substation corresponding to route.
In an embodiment of the utility model, signal validation apparatus, further includes:
Touch screen is connect with the digital signal processing chip.
In an embodiment of the utility model, the fpga chip, comprising:
First subtracter subtracts described specified at the time of for the digital data acquisition interface to be acquired the message in real time
Delay data, as the generation moment after the delay calibration of the digital quantity signal.
In an embodiment of the utility model, the digital signal processing chip, comprising:
Second subtracter, for calculate the analog signals amplitude and delay calibration after the digital quantity signal
The difference of amplitude, or calculate the difference of the phase of the analog signals and the phase of the digital quantity signal after delay calibration.
In an embodiment of the utility model, the first two times transfer equipment includes and is set at first measuring point
Electronic mutual inductor, for sending out the digital quantity signal to the digital data acquisition interface；The second secondary conversion is set
The standby electromagnetic transformer comprising being set at second measuring point, for sending out the analog signals to the analog quantity
Acquisition interface.
In an embodiment of the utility model, first measuring point is located at the secondary side of the electronic mutual inductor and described
Between the input terminal of digital quantity input type combining unit.
In an embodiment of the utility model, the secondary side of the electromagnetic transformer and analog input formula combining unit
Input terminal connection, the analog acquisition interface be connected to the electromagnetic transformer merge with the analog input formula singly
Between member.
The signal validation apparatus of the utility model acquires number by digital data acquisition interface and analog acquisition interface respectively
Word amount signal and analog signals, and can be realized using digital signal processing chip the integrated nuclear of digital quantity and analog quantity
It is real, so that the verification of signal is easier.Importantly, this programme dexterously utilizes fpga chip output according to solid in message
Digital quantity signal after the specified delay correction having, is able to solve the stationary problem of digital quantity signal and analog signals, with this
It is significantly improved so that digital quantity signal and analog signals carry out the real-time accuracy of integrated nuclear.
Detailed description of the invention
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, the accompanying drawings in the following description is only
It is some embodiments of the utility model, for those of ordinary skill in the art, in the premise not made the creative labor
Under, it is also possible to obtain other drawings based on these drawings.In the accompanying drawings:
Fig. 1 is the schematic diagram for carrying out signal verification using phase meter in the prior art；
Fig. 2 is the schematic diagram for carrying out signal verification using fault oscillograph in the prior art；
Fig. 3 is the structural schematic diagram of the signal validation apparatus of an embodiment of the present invention；
Fig. 4 is the structural schematic diagram of the signal validation apparatus of another embodiment of the utility model；
Fig. 5 is the structural schematic diagram of the signal validation apparatus of one specific embodiment of the utility model；
Fig. 6 is the schematic device for carrying out signal verification in an embodiment of the present invention to substation；
Fig. 7 is the waveform diagram for carrying out signal verification in an embodiment of the present invention to substation.
Specific embodiment
It is right with reference to the accompanying drawing for the objectives, technical solutions, and advantages of the embodiments of the present invention are more clearly understood
The utility model embodiment is described in further details.Here, the illustrative embodiments and their description of the utility model are for solving
The utility model is released, but is not intended to limit the scope of the present invention.
Fig. 3 is the structural schematic diagram of the signal validation apparatus of an embodiment of the present invention.As shown in figure 3, some implementations
In example, signal validation apparatus 100, it may include: digital data acquisition interface 110, analog acquisition interface 120, FPGA (Field-
Programmable Gate Array, field programmable gate array) chip 130 and digital signal processing chip 140.
Digital data acquisition interface 110, and is connected to first in the first two times transfer equipment 220 of the first power circuit 211
The output end of digital quantity input type combining unit 230 at measuring point connects, for acquiring the message of digital quantity signal.
The digital data acquisition interface 110 can acquire digital quantity signal, for example, it may be optical fiber interface, more specifically, example
It such as can be the interface of BCM52681EB model.The quantity of digital data acquisition interface 110 can be one or more, can basis
The quantity of digital quantity input type combining unit 230 determines.First power circuit 211 may include power plant, substation, electric power use
It is used to transmit the route of electric energy between family etc..The first two times transfer equipment 220 may include electronic mutual inductor or light mutual inductance
Device.The quantity of first two times transfer equipment 220 can be one or more, and a first two times transfer equipment 220 may include
One or more measuring points, as above-mentioned first measuring point.Each first two times transfer equipment 220 or each measuring point can provide one
Digital quantity signal.Available one or more signals after the message of parsing digital quantity signal, for example, digital quantity voltage signal
And/or digital quantity current signal or optical signal, the quantity of the digital quantity voltage signal can be one or more, the number
The quantity of amount current signal can be one or more.The digital quantity input type combining unit 230 is existing processing unit, can
One or more digital quantity signals are converted into message.The message of the digital quantity signal can be various comprising specified delay number
According to message, for example, 61850-9-2 message.
The second measuring point in analog acquisition interface 120, with the second secondary conversion equipment 240 of the second power circuit 212
Connection, for acquiring analog signals；One of the analog signals and the digital quantity signal are that confirmation is correct in advance
Signal.It can use and confirm that correct signal verifies other analog signals or digital quantity signal in advance.Second electricity
Line of force road 212 may include the route for being used to transmit electric energy between power plant, substation, power consumer etc..First power line
Road 211 and second power circuit 212 can be different two section of same power circuit, or be different power circuit,
High voltage can generally be transmitted.
The analog acquisition interface 120 can acquire analog signals, analog signals can be carried out digital sample, example
Such as, it can be A/D acquisition interface (there is analog-digital conversion function), more specifically, for example can be the interface of AD9172 model.It should
Second secondary conversion equipment 240 may include electromagnetic transformer, for example, can be the new circuit for throwing secondary device, the new throwing
Electromagnetic transformer output analog quantity digital signal can be used in secondary device.In other embodiments, which sets
Standby 240 for example may include main transformer, may include main transformer high side switch, main transformer low-pressure side switch etc..Second secondary conversion is set
Standby 240 quantity can be one or more, can have one or more measuring points in a second secondary conversion equipment 240, make
For above-mentioned second measuring point, each second measuring point can acquire an analog signals, such as analog quantity voltage signal, analog quantity electricity
Flow signal etc..When the quantity of the digital quantity signal be it is multiple and wherein exist it is multiple have confirmed that correct digital quantity signal when, can
Using therefrom select one have confirmed that correct digital quantity signal as reference, to other digital quantity signals or each analog signals into
Line delay correction.The quantity of the analog acquisition interface 120 can be one or more, and multiple analog acquisition interfaces 120 can
To be respectively used to acquire different analog signals, for example, the quantity of analog acquisition interface 120 can be two, wherein one
A to can be used for acquiring analog quantity voltage signal, another can be used for acquiring analog quantity current signal.
Fpga chip 130 is connect with the digital data acquisition interface 110 and the analog acquisition interface 120 respectively, is used
In receiving the message and the analog signals, and the output analog signals and prolong according to specified in the message
When data delay calibration after the digital quantity signal.
The fpga chip 130 can use various existing capability modules or circuit, for example, subtracter, comparator etc., are realized
The analog signals are pre-processed and exported to message, the analog signals etc. of the digital quantity signal of acquisition and according to described
The digital quantity signal after specified delay data delay calibration in message.For example, the digital quantity signal that parsing receives
Message, using SCD file (Substation Configuration Description, substation configuration description file) from solution
The digital quantity signal in each channel is taken out in message after analysis (for example, voltage only can be carried out to digital quantity signal using existing
Module in nuclear phase or the device of electric current direction finding amount is realized), processing is synchronized to digital quantity signal and analog signals.It should
Fpga chip 130 for example can be the chip of XC7A100T model.In the prior art, pass through digital quantity input type combining unit
The purpose of setting of specified delay data in 230 messages generated is in special equipment (for example, protection, measure and control device)
Realize corresponding protection and measurement and control logic function.And the utility model creatively borrows the specified delay data and comes to digital quantity
Signal carries out delay calibration, to realize that the analog signals are synchronous with the digital quantity signal.
Digital signal processing chip 140 is connect with the fpga chip 130, for receiving the analog signals and prolonging
When calibration after the digital quantity signal, and output signal verification result.The digital signal processing chip 140 can be various numbers
Word signal processing chip, for example, the chip of DRA24PCT signal, can carry out signal verification to signal, with the width of confirmation signal
Whether value, phase are correct.Specifically, the analog signals of input or the amplitude of digital quantity signal or phase are accurately calculated, or
By calculating the amplitude of unlike signal or the difference of phase, correct analog signals or digital quantity signal is confirmed in verification before this
It is whether correct.
The digital signal processing chip 140 can use existing functional module or circuit is realized, such as can be by existing
There is the magnitude extraction module and phase extraction module only carried out to analog signals in voltage nuclear phase or the device of electric current direction finding amount
Realize the magnitude extraction and phase extraction to analog signals herein；Voltage core only can be carried out to digital quantity signal by existing
Magnitude extraction module and phase extraction module in the device of phase or electric current direction finding amount realize the amplitude to digital quantity signal herein
Extraction and phase extraction；Can realize that the size of amplitude or phase compare by comparator, or by subtracter realization amplitude or
The difference of phase calculates.
For analog signals, due to can directly be sampled with A/D, the delay of links is caused by equipment itself
, be it is controllable, measurable, finally can be carried out correcting, so, after being easily corrected to analog signals,
Make its sampling time delay " zero ".And for digital quantity signal, due to remote end module sampling element, combining unit receive processing and
All there is certain delay in forwarding link, and these delays can be different according to the difference of Practical Project, so digital quantity signal
Sampling there is the delay that cannot ignore.If it is desired that obtaining the verification result of digital quantity signal and analog signals accurately can be used,
It just needs to solve the stationary problem between received analog signals and digital quantity signal.In order to correct number when signal is verified
Measure the delay of signal, it is necessary to precise measurement digital quantity the entire link such as generation, transmission, parsing, framing delay, it is practical new
The discovery of type people's creativeness can carry out delay calibration to digital quantity signal as calibration foundation using the specified delay in message.
In the present embodiment, digital quantity signal and simulation are acquired by digital data acquisition interface and analog acquisition interface respectively
Signal is measured, and is verified using the integration that digital signal processing chip can be realized digital quantity and analog quantity, so that the core of signal
It is real easier.Importantly, this programme dexterously utilizes fpga chip output according to specified delay school intrinsic in message
Digital quantity signal after just, is able to solve the stationary problem of digital quantity signal and analog signals, makes digital quantity signal with this
The real-time accuracy of integrated nuclear is carried out with analog signals to significantly improve.
Fig. 4 is the structural schematic diagram of the signal validation apparatus of another embodiment of the utility model.As shown in figure 4, some
In embodiment, the signal validation apparatus 100, may also include that SD storage card (Secure Digital Memory Card,
Safe digital storage card) 150 and/or USB (Universal Serial Bus, universal serial bus) interface 160.SD storage card
150 and usb 1 60, it can be connect respectively with the digital signal processing chip 140, be used to provide the described the first power circuit
The SCD (Substation Configuration Description, substation configuration description file) of substation corresponding to 211
File.Usb 1 60 can be used as the approach for externally carrying out data exchange, for example, reading SCD file etc..SD storage card 150
It can be used for storing SCD file, program software etc..
In other embodiments, the signal validation apparatus 100, may also include the module needed for other, for example, interior
It deposits, memory etc..Memory can provide program running space, and memory can store the information such as setting definite value, operating parameter.
Again as shown in figure 4, in some embodiments, the signal validation apparatus 100 may also include that touch screen 170.
Touch screen 170 is connect with the digital signal processing chip 140.Touch screen 170 can provide human-computer interaction interface, for example, can
To be LCD (liquid crystal display) touching display screen, the data of analog signals, the data of digital quantity signal, signal can be shown
Verification result etc. can input specified signal for user as a reference to carrying out signal verification.
In some embodiments, the fpga chip 130, it may include: the first subtracter.
First subtracter subtracts described specified at the time of for the digital data acquisition interface to be acquired the message in real time
Delay data, as the generation moment after the delay calibration of the digital quantity signal.
Phase is converted by the generation moment after delay calibration, i.e., obtains the digital quantity after delay correction using the phase
Signal.Wherein, at the time of digital quantity signal or at the time of phase can use in existing voltage nuclear phase or electric current direction finding amount device
Or phase extraction module is realized.
In some embodiments, the digital signal processing chip 140, it may include: the second subtracter.
Second subtracter, for calculate the analog signals amplitude and delay calibration after the digital quantity signal
The difference of amplitude, or calculate the difference of the phase of the analog signals and the phase of the digital quantity signal after delay calibration.
Wherein, the amplitude or phase of analog signals can use the width in the voltage nuclear phase or electric current direction finding amount device of existing analog quantity
Value or phase extraction module are realized；The amplitude or phase of the digital quantity signal after delay calibration can use existing digital quantity
Voltage nuclear phase or amplitude in electric current direction finding amount device or phase extraction module realize.
In other embodiments, the digital signal processing chip 140, it may include: third subtracter.Second subtracter and
Third subtracter is respectively used to calculate the amplitude of the amplitude of the analog signals and the digital quantity signal after delay calibration
Difference, and calculate the difference of the phase of the analog signals and the phase of the digital quantity signal after delay calibration.
In some embodiments, the first two times transfer equipment 220 may include the electricity being set at first measuring point
Then minor mutual inductor exports institute for sending out the digital quantity signal to the digital quantity input type combining unit 230 again
State digital data acquisition interface 110.The second secondary conversion equipment 240 may include the electromagnetic type being set at second measuring point
Mutual inductor, for sending out the analog signals to the analog acquisition interface 120.Since there are many commissioning of new equipment scene
In the case of do not run the correct analog signals of confirmation, the analog signals that not can refer to, so can not be directly right
The analog signals of measuring point are verified in second secondary conversion equipment 240.But, using in the first two times transfer equipment 220
Measuring point has confirmed that correct digital quantity signal can be to the analog signals progress core of measuring point in second secondary conversion equipment 240
Real, such situation has given full play to the advantage of this programme.
Further, first measuring point is located at the secondary side of the electronic mutual inductor and the digital quantity input type closes
And between the input terminal of unit 230.Further, the secondary side of the electromagnetic transformer merges single with analog input formula
The input terminal connection of member 120, the analog acquisition interface 230 are connected to the electromagnetic transformer and the analog input
Between formula combining unit 230.
Fig. 5 is the structural schematic diagram of the signal validation apparatus of one specific embodiment of the utility model.As shown in figure 5, one
In a little specific embodiments, signal validation apparatus 100, it may include: at least one digital data acquisition interface 110, at least one simulation
Measure acquisition interface 120, fpga chip 130, digital signal processing chip 140, SD storage card 150, usb 1 60, touch screen
170, DDR (Double Date Rate, Double Data Rate) memory 180, eeprom memory (Electrically-Erasable
Programmable Read-Only Memory, Electrically Erasable Programmable Read-Only Memory) 190.
Touch screen 170 can be LCD display, provide the human-computer interaction interface containing touch screen.SD storage card 150 can store
SCD file and program software.DDR memory 180 can provide running space when program operation.Usb 1 60 can be counted externally
According to the approach of exchange, for example read SCD file etc..Eeprom memory 190 can store the information such as setting definite value, operating parameter.
Chip 140 can be used as the brain of signal validation apparatus at digital signal, is responsible for calculating data, realizes logic function.FPGA core
Piece 130 pretreatment, the processing result in real time such as can synchronize to digital quantity and analog quantity channel data and give core at digital signal
Piece 140 is further analyzed.Digital data acquisition interface 110 can be the optical fiber interface of acquisition 61850-9-2 specification message.Analog quantity
Acquisition interface 130 can acquire the voltage of analog quantity, electric current.Analog quantity can directly carry out A/D sampling, later, pass through FPGA core
Piece 130 carries out data preparation, then, into digital signal at chip 140, digital quantity can be 61850-9-2 message, passes through
Fpga chip 130 can quickly decode specification, into digital signal at chip 140, two paths of signals is at digital signal
It carries out can be calculated phase difference in chip 140.
To make those skilled in the art be best understood from the utility model, a specific embodiment will be lifted below and illustrates that this is practical
Novel embodiment.
Fig. 6 is the schematic device for carrying out signal verification in an embodiment of the present invention to substation.As shown in fig. 6,
Intelligent substation 220kV bus 401,402 operates normally, under initial situation, electronic current mutual inductor CT-1, CT-2 connection
To 220kV bus 401,402, electronic type voltage transformer PT-4, PT-5 are respectively connected to 220kV bus 401,402, and this
A little electronic mutual inductors (electronic current mutual inductor CT-1, CT-2 and electronic type voltage transformer PT-4, PT-5) pass through number
Each protection is transferred to after amount input type combining unit MU1, the data of measure and control device also have confirmed that completely correct, i.e., data 1 are being just
Really.For ease of description, the data flow current embodiment require that illustrating only has been marked in Fig. 6, there may also be in Practical Project other
Data and equipment.
The equipment that newly puts into operation now is needed, the equipment newly to put into operation includes: 1# main transformer, main transformer low-pressure side switch 301, main transformer low-pressure side
The secondary devices such as 35kV bus 302, analog input formula combining unit MU2.Main transformer low-pressure side switch 301 and main transformer low-pressure side
Measuring point between 35kV bus 302 uses electromagnetic current transducer CT-3 by analog quantity current signal via analog input formula
Combining unit MU2 sends protection supervisory equipment to, and the measuring point on main transformer low-pressure side 35kV bus 302 uses electromagnetic potential mutual inductance
Device PT-3 sends analog quantity voltage signal to protection supervisory equipment via analog input formula combining unit MU2.
The step that the signal of measuring point in the above-mentioned equipment that newly puts into operation is verified using the method for an embodiment of the present invention
Suddenly can include:
1, main transformer high side switch 2202 is closed, then closes main transformer low-pressure side switch 301；
2, the SCD file for reading in this substation parses the corresponding voltage of data 1, current channel；
3, data 1 are accessed to the digital quantity input channel of signal validation apparatus 100, select some voltage or electric current therein
The reference quantity (for example, the reference quantity for selecting voltage 1 to verify for signal) verified as signal；
4, data 2 are accessed to the analog input channel of signal validation apparatus 100；
5, signal validation apparatus 100 carries out delay correction to reference quantity voltage automatically, it is assumed that signal validation apparatus 100 is real-time
It is T1 at the time of receiving digital quantity voltage, the specified delay in message is △ t, then the corresponding virtual voltage of digital quantity voltage
The generation moment is T0=T1- △ t, then, the automatic reference quantity voltage calculated after voltage different in data 2, electric current and correction
Between phase, vector measurement waveform diagram is as shown in Figure 7；
6, the phase difference between digital quantity (voltage 1) after practical vector measurement result is data 2 (analog quantity) and corrects
φ (degree)=T0 (μ s) × 360 (degree)/20000 (μ s) (the power frequency quality period is 20ms, that is, 20000 μ s).
Data 2 before analog input formula combining unit MU2 input terminal are analog quantity voltage signal and analog quantity electric current
The data 3 of signal, analog input formula combining unit MU2 output end are digital quantity voltage signal and digital quantity current signal.It needs
It is emphasized that the signal validation apparatus 100 of the utility model embodiment is using data 2 and has confirmed that correct data 1 to new
The integrality of secondary device that puts into operation and accuracy are verified.Rather than using data 3 and have confirmed that correct data 1 are thrown new
The integrality and accuracy for transporting secondary device are verified, because if carrying out vector measurement (letter only by data 1 and data 3
Number verify), it is judged as vector measurement success, after converting since data 3 are data 2 by analog input formula combining unit MU2
It obtains, it is possible to 3 mistake of data can be led to because of the configuration error or transcription error of analog input formula combining unit MU2.
In conclusion the signal validation apparatus of the utility model embodiment, is adopted by digital data acquisition interface and analog quantity
Collection interface acquires digital quantity signal and analog signals respectively, and can be realized digital quantity and mould using digital signal processing chip
The integration of analog quantity is verified, so that the verification of signal is easier.Importantly, this programme dexterously utilizes fpga chip defeated
Out according to the digital quantity signal after specified delay correction intrinsic in message, it is able to solve digital quantity signal and analog signals
Stationary problem makes digital quantity signal and analog signals carry out the real-time accuracy of integrated nuclear and significantly improves with this.
In the description of this specification, reference term " one embodiment ", " specific embodiment ", " some implementations
Example ", " such as ", the description of " example ", " specific example " or " some examples " etc. mean it is described in conjunction with this embodiment or example
Particular features, structures, materials, or characteristics are contained at least one embodiment or example of the utility model.In this specification
In, schematic expression of the above terms may not refer to the same embodiment or example.Moreover, the specific features of description,
Structure, material or feature can be combined in any suitable manner in any one or more of the embodiments or examples.It is each to implement
The step of involved in example, sequence was used to schematically illustrate the implementation of the utility model, and sequence of steps therein is not construed as limiting, can root
It is appropriately adjusted according to needs.
Particular embodiments described above has carried out into one the purpose of this utility model, technical scheme and beneficial effects
Step is described in detail, it should be understood that being not used to limit this foregoing is merely specific embodiment of the utility model
The protection scope of utility model, within the spirit and principle of the utility model, any modification for being made, changes equivalent replacement
Into etc., it should be included within the scope of protection of this utility model.
Claims (10)
1. a kind of signal validation apparatus characterized by comprising
Digital data acquisition interface, with the digital quantity being connected in the first two times transfer equipment of the first power circuit at the first measuring point
The output end of input type combining unit connects, for acquiring the message of digital quantity signal；
Analog acquisition interface is connect, for acquiring with the second measuring point in the second secondary conversion equipment of the first power circuit
Analog signals；One of the analog signals and the digital quantity signal are to confirm correct signal in advance；
Fpga chip is connect, for receiving the report respectively with the digital data acquisition interface and the analog acquisition interface
The literary and described analog signals, and the output analog signals and be delayed school according to the specified delay data in the message
The digital quantity signal after standard；
Digital signal processing chip is connect with the fpga chip, after receiving the analog signals and delay calibration
The digital quantity signal, and output signal verification result.
2. signal validation apparatus as described in claim 1, which is characterized in that the digital data acquisition interface is optical fiber interface.
3. signal validation apparatus as described in claim 1, which is characterized in that the analog acquisition interface is that A/D acquisition connects
Mouthful.
4. signal validation apparatus as described in claim 1, which is characterized in that further include:
SD storage card and/or USB interface are connect with the digital signal processing chip, are used to provide the described the first power circuit
The SCD file of corresponding substation.
5. signal validation apparatus as described in claim 1, which is characterized in that further include:
Touch screen is connect with the digital signal processing chip.
6. signal validation apparatus as described in claim 1, which is characterized in that the fpga chip, comprising:
First subtracter subtracts the specified delay at the time of for the digital data acquisition interface to be acquired the message in real time
Data, as the generation moment after the delay calibration of the digital quantity signal.
7. signal validation apparatus as described in claim 1, which is characterized in that the digital signal processing chip, comprising:
Second subtracter, for calculate the analog signals amplitude and delay calibration after the digital quantity signal amplitude
Difference, or calculate the difference of the phase of the analog signals and the phase of the digital quantity signal after delay calibration.
8. signal validation apparatus as described in claim 1, which is characterized in that the first two times transfer equipment includes to be set to
Electronic mutual inductor at first measuring point merges list for sending out the digital quantity signal to the digital quantity input type
Then member is exported again to the digital data acquisition interface；The second secondary conversion equipment includes to be set to second measuring point
The electromagnetic transformer at place, for sending out the analog signals to the analog acquisition interface.
9. signal validation apparatus as claimed in claim 8, which is characterized in that first measuring point is located at the electronic type mutual inductance
Between the secondary side of device and the input terminal of the digital quantity input type combining unit.
10. signal validation apparatus as claimed in claim 9, which is characterized in that the secondary side and mould of the electromagnetic transformer
The input terminal of analog quantity input type combining unit connects, the analog acquisition interface be connected to the electromagnetic transformer with it is described
Between analog input formula combining unit.
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| CN109406866A (en) * | 2018-11-27 | 2019-03-01 | 北京锐创新智科技有限公司 | Signal validation apparatus and method |
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2018
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109406866A (en) * | 2018-11-27 | 2019-03-01 | 北京锐创新智科技有限公司 | Signal validation apparatus and method |
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