CN209297726U - Display control card and display screen control system - Google Patents
Display control card and display screen control system Download PDFInfo
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- CN209297726U CN209297726U CN201822050204.2U CN201822050204U CN209297726U CN 209297726 U CN209297726 U CN 209297726U CN 201822050204 U CN201822050204 U CN 201822050204U CN 209297726 U CN209297726 U CN 209297726U
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Abstract
The utility model embodiment discloses a kind of display control card, and the display control card includes video source input interface, Video Decoder, image processor, lamp plate interface and multiple dynamic RAMs；The Video Decoder is provided with decoded signal input interface and the first TTL format video signal output interface；The decoded signal input interface connects the video source input interface；Described image processor is provided with multiple ports, and the multiple port is separately connected the first TTL format video signal output interface, the lamp plate interface and the multiple dynamic RAM.Display control card disclosed in the present embodiment solves the problems, such as the existing low delay technology cable broadband limitation based on network interface, realizes the low latency of display screen control system.
Description
Technical field
The utility model relates to field of display technology more particularly to a kind of display control card and a kind of display screen control systems
System.
Background technique
In LED display industry, the frame delay of control system has become the important references standard of evaluation display system performance,
There is the low delay technology of a lot of types: the low delay technology of coaxial interface and the low delay technology of cable interface currently on the market.
The specific meaning of low delay is: originating from the source of video image, by different processing and the caching for calculating equipment, relies on
Different display medias, finally until information seen by person, the delay of the video image of this period of time is considered as controlling
The frame of system is delayed.Ultralow delay can allow experiencer to feel synchronism and real-time, but due to controlling mechanism and image
The reason of processing, the delay of 0 frame receive the limitation of many applications, pursue ultralow delay and are controls not by the application conditions of discount
The target of the effort always of system processed.
The control framework of low delay technology based on cable interface includes " sending card+reception card+display screen ", transmitting terminal
Directly pass through kilomega network with receiving end to connect, single network interface has maximum belt to carry limitation, therefore there are biggish application limitations.And base
Include " coaxial sending card+coaxially receive card+display screen " in the control framework of the low latency technology of coaxial interface, although single same
Axis mouth possesses sufficiently large bandwidth and meets its requirement for sending entire image, but due to its transmission medium and transmission standard compared with
Height, therefore coaxial interface needs mating pairs of coaxial sending card to block with coaxial reception, the cost is relatively high.
Utility model content
The utility model provides a kind of display control card and a kind of display to solve above-mentioned the deficiencies in the prior art
Shield control system.
To achieve the goals above, the utility model embodiment provides a kind of display control card, including video source input connects
Mouth, Video Decoder, image processor, lamp plate interface and multiple dynamic RAMs；The Video Decoder is provided with
Decoded signal input interface and the first TTL format video signal output interface；The decoded signal input interface connects the view
Frequency source input interface；Described image processor is provided with multiple ports, and the multiple port is separately connected the first TTL format
Video signal output interface, the lamp plate interface and the multiple dynamic RAM.
In one embodiment of the utility model, described image processor includes: field frequency detection circuit module, including the
One input port and the first output port；The first input port is connected to the first TTL format video signal output and connects
Mouthful；Receiving circuit module, including the second input port and second output terminal mouth；Second input port is connected to described first
Output port；The second output terminal mouth is connected to the multiple dynamic RAM；Conversion circuit module, including third are defeated
Inbound port, the 4th input port and third output port；The third input port is connected to the multiple dynamic random storage
Device；Generate test image module, including the 4th output port；4th output port is connected to the 4th input port；
Scanning circuit module, including the 5th input port and the 5th output port；It is defeated that 5th input port is connected to the third
Exit port；5th output port is connected to the lamp plate interface.
In one embodiment of the utility model, it is provided at the second output terminal mouth of the receiving circuit module
First dual-ported memory；The second dual-ported memory is provided at the 5th input port of the scanning circuit module.
In one embodiment of the utility model, the Video Decoder is provided with shunt circuit module, the shunting
Circuit module includes the first TTL format video signal output interface and the 2nd TTL format video signal output interface.
In one embodiment of the utility model, the display control card further includes video encoder and video source output
Interface；Wherein, the video encoder is provided with TTL format video signal input interface and encoded signal output interface；It is described
TTL format video signal input interface connects the 2nd TTL format video signal output interface, and the encoded signal output connects
Mouth connects the video source output interface.
In one embodiment of the utility model, the video source input interface and the video source output interface are
HDMI interface or network interface.
In one embodiment of the utility model, the display control card further includes controller, the controller connection
Described image processor.
In one embodiment of the utility model, described image processor includes Programmadle logic device.
In one embodiment of the utility model, the video source input interface, the Video Decoder, described image
Processor, the lamp plate interface and the multiple dynamic RAM are arranged on same circuit board.
To achieve the goals above, the utility model embodiment provides a kind of display screen control system, including display control
Block and be connected to the display screen of the display control card；Wherein, the display control card is display described in any of the above embodiments control
Fabrication.
Above-mentioned technical proposal can have following advantage or the utility model has the advantages that vision signal is directly transferred in display control card
Inside image processor, original PHY chip and sending card are eliminated, has evaded the delay at sending card end, by prolonging for display screen
When be reduced to 1 frame sign, realize from video source to the synchronism of user's vision and real-time, enhance user experience；Again
The low delay technology of person, display control card simplify the control framework of existing display screen in overall architecture, solve existing base
In the low latency technology Bandwidth-Constrained of network interface the problem of；The structure of display control card is simple, and cost is relatively low, avoids existing based on same
The higher problem of low latency technical costs of axial interface；In addition, being added to field frequency detection module and life inside display control card
The function of existing sending card may be implemented at image measurement module, so that display control card disclosed by the utility model has been compatible with now
There is sending card and receive the function of card, avoids existing display screen control many of framework with " sending card+reception card " and ask
Topic.
Detailed description of the invention
It, below will be to required in embodiment description in order to illustrate more clearly of the technical solution of the utility model embodiment
The attached drawing used is briefly described, it should be apparent that, the accompanying drawings in the following description is only some implementations of the utility model
Example, for those of ordinary skill in the art, without creative efforts, can also obtain according to these attached drawings
Obtain other attached drawings.
Fig. 1 is the structural schematic diagram of one of the utility model first embodiment display control card；
Fig. 2 is the structural schematic diagram of one of the utility model second embodiment display control card；
Fig. 3 is a kind of concrete configuration diagram of one of the utility model second embodiment display control card；
Fig. 4 a- Fig. 4 b is the video decoder circuit connection of one of the utility model second embodiment display control card
Relational graph；
Fig. 5 a- Fig. 5 d is the Image Processor Circuits connection of one of the utility model second embodiment display control card
Relational graph；
Fig. 6 is the video coder circuit connection relationship of one of the utility model second embodiment display control card
Figure；
Fig. 7 is the controller circuitry annexation figure of one of the utility model second embodiment display control card；
Fig. 8 is the structural schematic diagram of one of the utility model 3rd embodiment display control card；
Fig. 9 is the structural schematic diagram of one of the utility model fourth embodiment display screen control system.
[description of symbols]
10- display control card；11- video source input interface；12- Video Decoder；121- decoded signal input interface；
The first TTL format video signal output interface of 122-；13- image processor；14- dynamic RAM；15- lamp plate interface；
20- display control card；21- video source input interface；22- Video Decoder；221- decoded signal input interface；
The first TTL format video signal output interface of 222-；The 2nd TTL format video signal output interface of 223-；23- image procossing
Device；24- dynamic RAM；25- lamp plate interface；26- video encoder；261-TTL format video signal input interface；
262- encoded signal output interface；27- video source output interface；28- controller；
30- display control card；31- video source input interface；32- Video Decoder；321- decoded signal input interface；
The first TTL format video signal output interface of 322-；The 2nd TTL format video signal output interface of 323-；33- image procossing
Device；331- field frequency detection circuit module；3311- first input port；The first output port of 3312-；332- receiving circuit module；
The second input port of 3321-；3322- second output terminal mouth；333- conversion circuit module；3331- third input port；3332-
4th input port；3333- third output port；334- generates test image module；The 4th output port of 3341-；335- is swept
Scanning circuit module；The 5th input port of 3351-；The 5th output port of 3352-；The more a dynamic RAMs of 34-；35- lamp plate
Interface；36- video encoder；361-TTL format video signal input interface；362- encoded signal output interface；37- video
Source output interface；38- controller；
50- display control program；51- display control card；52- display screen.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without creative efforts
Every other embodiment obtained, fall within the protection scope of the utility model.It should be noted that the case where not conflicting
Under, the features in the embodiments and the embodiments of the present application can be combined with each other.Come below with reference to the accompanying drawings and in conjunction with the embodiments
Illustrate the application.
It should be noted that the specification and claims of the utility model and term " first " in above-mentioned attached drawing,
" second " etc. is to be used to distinguish similar objects, without being used to describe a particular order or precedence order.It should be understood that in this way
The term used is interchangeable under appropriate circumstances, so that the utility model embodiment described herein can be in addition to herein
Sequence other than those of diagram or description is implemented.In addition, term " includes " and " having " and their any deformation, it is intended that
Be to cover it is non-exclusive include, for example, containing the process, method, system, product or equipment of a series of steps or units not
Those of be necessarily limited to be clearly listed step or unit, but may include be not clearly listed or for these processes, side
Other intrinsic step or units of method, product or equipment.
It should also be noted that, the division of multiple embodiments is not merely to the convenience described, answers structure in the utility model
It is limited at special, the feature in various embodiments can combine in the case of no contradiction, mutually quote.
[first embodiment]
It is a kind of structural schematic diagram of display control card of the utility model first embodiment referring to Fig. 1.Such as Fig. 1 institute
Show, display control card 10 includes: that video source input interface 11, Video Decoder 12, image processor 13, multiple dynamic randoms are deposited
Reservoir 14 and lamp plate interface 15.
Video Decoder 12 is provided with decoded signal input interface 121 and the first TTL format video signal output interface
122.Decoded signal input interface 121 connects video source input interface 11.
Image processor 13 is provided with multiple ports, and it is defeated that the multiple port is separately connected the first TTL format video signal
Outgoing interface 122, lamp plate interface 15 and multiple dynamic RAMs 14.
Wherein, video source input interface 11 is used to receive the vision signal of video source sending.Video source input interface 11
For example HDMI (High Definition Multimedia Interface, high-definition multimedia interface) interface or network interface.
Wherein HDMI interface needs to be matched with HDMI wire.Video source is, for example, host computer.Wherein, when video source input interface 11 is
When HDMI interface, vision signal is TMDS format signal.When video source input interface 11 is network interface, vision signal RGMII
Format signal.
The decoded signal input interface 121 of Video Decoder 12 receives the video letter transmitted from video source input interface 11
Number, and pass out decoded video signal by the first TTL format video signal output interface 122 after inner decoding
It goes.Wherein decoded video signal is, for example, TTL format video signal.For example, when video source input interface 11 is HDMI
When interface, Video Decoder 12 is for example including ADV7612 chip, for TMDS format video signal to be decoded as TTL format view
Frequency signal.
Image processor 13 is after the acquisition decoding of the first TTL format video signal output interface 122 of Video Decoder 12
Vision signal is, for example, TTL format video signal.Wherein, decoded video signal includes image data and supplemental characteristic.Herein
Supplemental characteristic for example including in LED light template die group needed for image data driving chip type (PWM type driving chip or
Universal driving chip), the display area size with carrying, the total group number and LED lamp panel of output display data (such as RGB data)
Supplemental characteristic needed for the scanning mode (such as 8 sweep, 16 sweep, 32 sweep) and rear end LED light template die group of mould group is as LED lamp panel
Wide high, the scanning number of the pixel of mould group, scanning decoded mode, driving method, data group number and cabling information etc..Picture number herein
According to typically comprise field sync signal data and display data such as RGB data.Image processor 13 is according to the supplemental characteristic
Described image data are intercepted, are corrected, are reset and gray scale extraction handles to obtain destination image data and according to target figure
As data generate and export control signal group and display data group (such as multiple RGB data groups) to lamp plate interface 15.At image
Reason device 13 is for example including Programmadle logic device, for example, the model ALTERA of Programmadle logic device
EP3C16F484。
It should be noted that the present embodiment is not intended to limit chip model included by Video Decoder, image processor, on
Citing is stated just to better illustrate, in practical applications, user can meet function existing according to particular condition in use
Type selecting is carried out in the chip of energy.
The multiple such as SDRAM of dynamic RAM 14 (Synchronous Dynamic Random Access
Memory, synchronous DRAM), for caching the frame in the image to be displayed after the interception of image processor 13
Then image is passed back to correction, rearrangement and the gray scale for carrying out image data in image processor 13 so as to image processor 13
The operation such as extraction.Multiple dynamic RAMs 14 are for example set as 3 in the present embodiment, multiple dynamic RAMs
14 interact with image processor 13, interactive efficiency are improved, convenient for the storage and processing of image processor 13.This certain reality
The particular number that example is not intended to limit multiple dynamic RAMs 14 is applied, user can carry out particular number according to the actual situation
Setting.Wherein, the intercept operation be specially image processor 13 according to supplemental characteristic for example including display control card 10
The information real time processings such as the origin coordinates and display width of image to be displayed intercept to obtain the image to be displayed of display control card 10
Data.The image to be displayed data write-in dynamic RAM 14 that image processor 13 obtains interception carries out a frame buffer.
It should be noted that because being cached to the image data of dynamic RAM 14 at this time is directly transmitted from video source
, therefore have no other consumption.
Lamp plate interface 15 is connected in the LED light template die group of display screen such as LED display, is used for image processor 13
The control signal group and display burst data transmission of generation drive LED light template die group to be shown to LED light template die group.
Wherein, the video source input interface 11 in the present embodiment, Video Decoder 12, image processor 13, lamp plate interface
15 and multiple dynamic RAMs 14 be arranged on same circuit board.
Display control card 10 provided in this embodiment is connected to the LED light template die group and view of display screen such as LED display
Between frequency source.The course of work of display control card 10 provided in this embodiment are as follows: first come from the video signal transmission of video source
To the video source input interface 11 of display control card 10, the decoded signal input interface 121 and video source of Video Decoder 12 are defeated
The connection of incoming interface 11 receives vision signal, and the video signal decoding received is generated decoded video signal by Video Decoder 12
The first TTL format video signal output interface 122 as being transmitted to Video Decoder 12 after TTL format video signal, the first TTL
Format video signal output interface 122 is connected decoded video signal such as TTL format video with the port of image processor 13
Signal is transmitted to image processor 13, and then image processor 13 is according to the supplemental characteristic in the decoded video signal received
The information real time processings such as origin coordinates and display width for example including 10 image to be displayed of display control card intercept decoded video
Image data in frequency signal obtains the image to be displayed data of display control card 10, and then image processor 13 will be to be shown
A frame buffer is carried out in image data write-in dynamic RAM 14, because being cached to the figure of dynamic RAM 14 at this time
As data are directly to transmit from video source, therefore have no other consumption.Then image processor 13 will acquire dynamic with
The frame image to be displayed data cached in machine memory 14 are transmitted to after carrying out image real time transfer and conversion and image procossing
The lamp plate interface 15 that device 13 connects is to drive LED light template die group, and wherein image real time transfer is for example including to described image data
Be corrected, reset and gray scale extract.Image data is converted for example including according to the target image obtained after image real time transfer
Data generate and export control signal group and display data group (such as multiple RGB data groups).
Display control card 10 provided in this embodiment is connected to the LED light template die group and view of display screen such as LED display
It between frequency source, has been compatible with sending card and has received the function of card, avoided existing with " sending card+reception card " display control framework
Problems；And it is matched by image processor 13 with dynamic RAM 14 and realizes the picture number for being transferred to display screen
It is delayed according to merely through a frame, 1 frame sign is reduced into the whole delay of original display screen, realizes the low delay of control system, it is real
Show from video source to the synchronism of user's vision and real-time, has enhanced user experience；Furthermore display control card 10 is low
Delay technique simplifies the control mode of existing display screen in overall architecture, solves the existing low delay technology based on network interface
The problem of Bandwidth-Constrained；Furthermore 10 structure of display control card is simple, and cost is relatively low, while avoiding existing based on the low of coaxial interface
The problem of delay technique higher cost.
[second embodiment]
Fig. 2 is the structural schematic diagram for the display control card 20 that the utility model second embodiment provides.Fig. 3 is the present embodiment
A kind of concrete configuration diagram of the display control card 20 of offer controls display provided in this embodiment below with reference to Fig. 2 and Fig. 3
Fabrication is described in detail.
As shown in Fig. 2, display control card 20 includes: video source input interface 21, Video Decoder 22, image processor
23, multiple dynamic RAMs 24, lamp plate interface 25, video encoder 26, video source output interface 27 and controller
28。
Video Decoder 22 includes decoded signal input interface 221 and shunt circuit module, the shunt circuit module packet
Include the first TTL format video signal output interface 222 and the 2nd TTL format video signal output interface 223.Decoded signal input
Interface 221 connects video source input interface 21.
Image processor 23 is provided with multiple ports, and it is defeated that the multiple port is separately connected the first TTL format video signal
Outgoing interface 222, lamp plate interface 25, multiple dynamic RAMs 24 and controller 28.
Video encoder 26 is provided with TTL format video signal input interface 261 and encoded signal output interface 262.
TTL format video signal input interface 261 connects the 2nd TTL format video signal output interface 223, encoded signal output interface
262 connection video source output interfaces 27.
Wherein, video source input interface 21 is used to receive the vision signal of video source sending.Video source input interface 21
For example HDMI (High Definition Multimedia Interface, high-definition multimedia interface) interface or network interface.
Wherein HDMI interface needs to be matched with HDMI wire.Video source is, for example, host computer.It should be noted that when video source input connects
When mouth 21 is HDMI interface, vision signal is TMDS format video signal.When video source input interface 21 is network interface, video letter
Number be RGMII format video signal.
Video Decoder 22 receives the view transmitted from video source input interface 21 by decoded signal input interface 221
Frequency signal obtains decoded video signal such as TTL format video signal after inner decoding, then passes through shunt circuit mould
Decoded video signal is divided into two through the first TTL format video signal output interface 222 and the 2nd TTL format video by block
Signal output interface 223 passes.For example, when video source input interface 21 is HDMI interface, Video Decoder 22
For example including ADV7612 chip, TMDS format video signal can be decoded as to TTL format video signal.Video Decoder
22 circuit connecting relations for example including ADV7612 chip a- Fig. 4 b referring to fig. 4.Shunt circuit module has vision signal
Function more than one point, the present embodiment are not intended to limit quantity of the decoded video signal after the shunting of shunt circuit module.Citing
For, decoded video signal is divided into two-way after shunt circuit module.
Image processor 23 is after the acquisition decoding of the first TTL format video signal output interface 222 of Video Decoder 22
Vision signal is, for example, TTL format video signal.Wherein, decoded video signal includes image data and supplemental characteristic.Herein
Supplemental characteristic for example including in LED light template die group needed for image data driving chip type (PWM type driving chip or
Universal driving chip), the display area size with carrying, the total group number and LED lamp panel of output display data (such as RGB data)
Supplemental characteristic such as rear end LED needed for the scanning mode (such as 8 sweep, 16 sweep, 32 sweep) and rear end LED light template die group of mould group
Wide high, the scanning number of the pixel of lamp plate mould group, scanning decoded mode, driving method, data group number and cabling information etc..Figure herein
As data typically comprise field sync signal data and display data such as RGB data.Image processor 23 is according to the parameter
Data intercept described image data, are corrected, being reset and gray scale extraction handles to obtain destination image data and according to mesh
Logo image data generate and export control signal group and display data group (such as multiple RGB data groups) to lamp plate interface 25.This
The correction at place is, for example, inverse gamma (Gamma) correction, gamma correction and/or other correction such as chromaticity corrections.Rearrangement herein
It is according to data needed for the above-listed driving chip of rear end LED light template die group (such as universal driving chip or PWM type driving chip)
Format and LED lamp panel cabling information etc. carry out gradation data position and rearrange and carry out the operation such as splicing and combining.Ash herein
Degree, which extracts, e.g. optimizes image data progress Bit separation even Bit, and typically gray scale extraction is the ash after correction process
Degree carries out lock out operation according to according to every Bit, and gradation data is transformed into according to different Bit using different realization weights
Mode.Image processor 23 is for example including Programmadle logic device, the specifically model ALTERA of Programmadle logic device
EP3C16F484, circuit connecting relation is referring to Fig. 5 a to Fig. 5 d.
The multiple such as SDRAM of dynamic RAM 24 (Synchronous Dynamic Random Access
Memory, synchronous DRAM), for caching in the image to be displayed data after the interception of image processor 23
Then one frame image data passes back to carries out the operations such as correction, rearrangement and the gray scale extraction of image data in image processor 23.
Multiple dynamic RAMs 24 are for example set as 3 in the present embodiment, multiple dynamic RAMs 24 at image
Reason device 23 interacts, and interactive efficiency is improved, convenient for the storage and processing of image processor 23.Certain the present embodiment is not intended to limit
The particular number of multiple dynamic RAMs 24, user can carry out specific amount of setting according to the actual situation.It is described
Intercept operation is specially that image processor 23 is sat according to supplemental characteristic for example including the starting of 20 image to be displayed of display control card
The necessary informations such as mark and display width handle interception in real time and obtain the image to be displayed of display control card 20.Image processor 23 will
The image to be displayed data write-in dynamic RAM 24 that interception obtains carries out a frame buffer.It should be noted that because thus
When to be cached to the image data of dynamic RAM 24 be directly to transmit from video source, therefore have no other consumption.
Lamp plate interface 25 is connected to the LED light template die group of LED display, the control letter for generating image processor 23
Number group and display burst data transmission drive LED light template die group to be shown to LED light template die group.
It should be noted that, although there is certain load energy in the data address of image processor 23/control bus port
Power, but be more than its load capacity when loading, line transceiver namely driver should be added up, to increase driving capability.So such as
Shown in Fig. 3, bus transceiver is additionally provided in display controller 20, for example bus transceiver model 74HC245.Bus
Transceiver setting realizes that LED lamp panel is shown between lamp plate interface 25 and LED lamp panel driving, to increase driving capability.
The TTL format video signal input interface 261 of video encoder 26 receives the 2nd TTL from Video Decoder 22
The decoded video signal that format signal output interface 223 transmits is, for example, TTL format video signal, video encoder 26
Decoded video signal is encoded to obtain encoded video signal and is transmitted to view by encoded signal output interface 262 by inside
Frequency source output interface 27 is used for cascade display control card therewith.Wherein, when video source output interface 27 is HDMI interface,
TTL format video signal can be encoded and be exported as TMDS format view for example including ADV7511 chip by video encoder 26
Frequency signal, circuit connecting relation of the video encoder 26 for example including ADV7511 chip is referring to Fig. 6.
Controller 28 connects video source input interface 21, Video Decoder 22, image processor 23, video encoder 26
With video source output interface 27.Specifically, controller 28 is connected by I2C (Inter-Integrated Circuit) bus
Video Decoder 22 and video encoder 26 are supervised for the working condition of monitor video decoder 22 and video encoder 26
Whether control Video Decoder 22 and video encoder 26 work in the state of having vision signal.Controller 28 passes through UART interface
Video source input interface 21 and video source output interface 27 are connected, for by the Video Decoder 22 and video encoder 26 of the same level
Working condition be broadcast to the cascade display control card of rear class.Controller 28 is connect by SPI interface with image processor 23,
For controlling image processor 23.In addition, using as shown in figure 3, controller 28 is also connected with temperature monitoring, voltage monitor
In temperature and voltage value in detection circuit board, it is ensured that circuit board trouble free service and for subsequent maintenance search problem provide conveniently.
Controller 28 also connects flash memory by SPI interface, and the monitoring datas such as temperature, voltage and lamp plate are raw for storing data
Produce the lamps such as electrical information, lamp plate functional information, lamp plate and physical message, lamp plate operation information and/or lamp plate correction relevant information
Plate information.Controller 28 in the present embodiment is, for example, single-chip microcontroller, for example its model NUC123LD4AN0, and circuit connects
Relationship is connect referring to Fig. 7.
It should be noted that the present embodiment is not intended to limit Video Decoder 22, video encoder 26, image processor 23
With chip model included by controller 28, the example above is just to better illustrate, and in practical applications, user can be with
Type selecting is carried out in the existing chip for meeting corresponding function according to particular condition in use.
Video source input interface 21, Video Decoder 22, image processor 23, multiple dynamic randoms in the present embodiment are deposited
Reservoir 24, lamp plate interface 25, video encoder 26, video source output interface 27 and controller 28 are arranged in same circuit board
On.
Display control card 20 provided in this embodiment is connected to the LED light template die group and view of display screen such as LED display
Between frequency source.The course of work of display control card 20 provided in this embodiment are as follows: first come from the video signal transmission of video source
To the video source input interface 21 of display control card 20, video source input interface 21 and the decoded signal of Video Decoder 22 are defeated
Incoming interface 221 connects the video signal decoding that will receive video signal transmission to Video Decoder 22, Video Decoder 22
Decoded video signal is divided into two by shunt circuit module after generating decoded video signal such as TTL format video signal
It is transferred out afterwards by the first TTL format video signal output interface 222 and the 2nd TTL format video signal output interface 223.
The first TTL format video signal output interface 222 at this time is connected decoded video signal with the interface of image processor 23
If TTL format video signal is transmitted to inside image processor 23, image processor 23 is first according to the decoded video received
The information such as the origin coordinates and display width of image to be displayed of the supplemental characteristic for example including display control card 20 in frequency signal
After image data in the decoded video signal of processing interception in real time obtains the image to be displayed data of display control card 20, image
The image to be displayed data obtained after interception are written in multiple dynamic RAMs 24 and carry out a frame buffer by processor 23, because
It is directly to be transmitted from video source, therefore have no other and disappear to be cached to the image of multiple dynamic RAMs 24 at this time
Consumption, then image processor 23 will acquire the frame image to be displayed data cached in multiple dynamic RAMs 24 and carry out figure
As being transmitted to the lamp plate interface 25 connecting with image processor 23 after processing and conversion to drive LED light template die group, wherein image
Processing for example including described image data are corrected, reset and gray scale extraction processing, conversion for example including according to through figure
As treated, image data generated and exports control signal group and display data group (such as multiple RGB data groups) to lamp plate connects
Mouth 25.
The TTL format video signal of the 2nd TTL format video signal output interface 223 and video encoder 26 at this time is defeated
Incoming interface 261 connects, the decoded video signal that video encoder 26 will be obtained from TTL format video signal input interface 261
Such as TTL format video signal carries out coding generation encoded video signal and is transmitted to view by encoded signal output interface 262
Frequency source output interface 27 is used for cascade display control card.Controller 28 monitors video encoder 22 and Video Decoder in real time
26 working condition, when video encoder 22 and Video Decoder 26 work in no video signal condition, controller 28 passes through
Its working condition is broadcast to all display control cards of rear class by communication signal line, and the image processor in rear class display control card is received
To after instruction, directly closing display screen is shown.
Display control card 20 provided in this embodiment is connected to the LED light template die group and view of display screen such as LED display
Between frequency source, sending card has been compatible with it and has received the function of card, realized the cascade Mach-Zehnder interferometer of display control card, avoid existing have
The problems of " sending card+reception card " display control framework；And pass through image processor 23 and multiple dynamic RAMs
24 match and realize that be transferred to the image data of display screen be delayed merely through a frame, and whole be delayed of original display screen is reduced to 1
Frame sign realizes the low delay of control system, realizes from video source to the synchronism of user's vision and real-time, enhances
User experience；Furthermore the low delay technology of display control card 20 simplifies the controlling party of existing display screen in overall architecture
Formula solves the problems, such as the existing low delay technology Bandwidth-Constrained based on network interface；Furthermore the structure of display control card 20 simply at
This lower, problem for avoiding the low latency technical costs based on coaxial interface relatively high.
[3rd embodiment]
Fig. 8 is the display control card 30 that the utility model 3rd embodiment provides.As shown in figure 8, display control card 30 wraps
It includes: video source input interface 31, Video Decoder 32, image processor 33, multiple dynamic RAMs 34, lamp plate interface
35, video encoder 36, video source output interface 37 and controller 38.
Wherein, image processor 33 for example, field frequency detection circuit module 331, receiving circuit module 332, conversion electricity
Road module 333 generates test image module 334 and scanning circuit module 335.After image processor 33 is according to the decoding received
Supplemental characteristic in vision signal intercepts image data, is corrected, being reset and gray scale extraction handles to obtain target image number
Control signal group and display data group (such as multiple RGB data groups) are generated and exported accordingly and according to destination image data to lamp
Plate interface 35.
It should be noted that video source input interface 31, video solution in the display control card 30 provided in the present embodiment
Code device 32, multiple dynamic RAMs 34, lamp plate interface 35, video encoder 36, video source output interface 37 and control
It the connection relationship of device 38 and illustrates and can refer to above-described embodiment, illustrate that the present embodiment no longer carries out specifically it for simplification
It is bright.
Specifically, the field frequency detection circuit module 331 in image processor 33 is used to detect the frame of decoded video signal
Frequently comprising first input port 3311 and the first output port 3312.First input port 3311 is connected to the first TTL format
Video signal output interface 322.Receiving circuit module 332 be used for according to the supplemental characteristic interception image data of display control card with
Obtain image to be displayed data comprising the second input port 3321 and second output terminal mouth 3322.Second input port 3321
It is connected to the first output port 3312.Second output terminal mouth 3311 is connected to multiple dynamic RAMs 34.Wherein, it is receiving
Be provided with the first dual-ported memory at the second output terminal mouth 3322 of circuit module 332, the first dual-ported memory be used for into
Row data are temporary.Conversion circuit module 333 is for carrying out image real time transfer and conversion comprising third input port 3331,
4th input port 3332 and third output port 3333.Third input port 3331 is connected to multiple dynamic RAMs
34.It generates test image module 334, is mainly used for subtest display screen, i.e., it is raw in the case where no vision signal inputs
It can produce image data at test image module 334 and be sent to the test that display screen carries out display screen comprising the 4th output
Port 3341.4th output port 3341 is connected to the 4th input port 3332.Scanning circuit module 335 is mainly used for according to suitable
Sequence reads display screen in display data transmissions comprising the 5th input port 3351 and the 5th output port 3352.Wherein, it is sweeping
The second dual-ported memory, second dual-ported memory are provided at 5th input port 3351 of scanning circuit module 335
For the temporary image data for requiring reading according to display screen output format.5th input port 3351 is connected to third output end
Mouth 3333.5th output port 3352 is connected to lamp plate interface 35.Controller 28 passes through SPI interface and field frequency detection circuit module
331 connections.
It should be noted that the video source input interface 31 referred in the present embodiment, Video Decoder 32, image processor
33, multiple dynamic RAMs 34, lamp plate interface 35, video encoder 36, video source output interface 37 and controller 38
It is arranged on same circuit board.
Further, it is described in conjunction with the course of work of the Fig. 8 to display control card 30 provided in this embodiment.Display
Control card 30 is connected between the LED light template die group and video source of display screen such as LED display.First come from the view of video source
Frequency signal is transmitted to the video source input interface 31 of display control card 30, video source input interface 31 and Video Decoder 32
Decoded signal input interface 321 connects the view that will receive video signal transmission to Video Decoder 32, Video Decoder 32
The decoding of frequency signal believes decoded video by shunt circuit module after generating decoded video signal such as TTL format video signal
By the first TTL format video signal output interface 322 and the 2nd TTL format video signal output interface after number being divided into two
323 transfer out.The first TTL format video signal output interface 322 at this time detects electricity with the field frequency in image processor 33
First input port 3311 in road module 331 connects, and field frequency detection circuit module 331 is by detecting from first input port
The frame frequency of the 3311 decoded video signal received such as TTL format video signals exports decoding video signal electric to receiving
Road module 332.
Receiving circuit module 332 is connected to the first of field frequency detection circuit module 331 by its second input port 3321
Output port 3312 obtains decoded video signal, and receiving circuit module 332 is according in the decoded video signal received
Supplemental characteristic includes the information real-time interception image data such as origin coordinates and display width of 30 image to be displayed of display control card
To obtain the image to be displayed data of display control card 30, obtained image to be displayed data are put into and are located at reception circuit mould
First dual-ported memory is kept at the second output terminal mouth 3322 of block 332, and waiting will be in the first dual-ported memory
Image to be displayed data are written in multiple dynamic RAMs 34 and carry out a frame buffer because be cached at this time multiple dynamics with
The image of machine memory 34 is that other are lost from being transmitted to dynamic RAM 34 between video source, therefore not.
After frame image data caching, conversion circuit module 333 waits the arrival of field frequency signal next time, passes through company
The third input port 3331 for being connected to multiple dynamic RAMs 34 obtains the previous frame image to be displayed data progress of caching
Image procossing and conversion.Due to the delay that entire display control card only allows to have a frame image data, and in image to be displayed number
According to having cached a frame by receiving circuit module 332, thus in conversion circuit module 333 there is no frame buffer mechanism and when
Between.Conversion circuit module 333 can in real time want image to be displayed data according to the output format of display screen such as LED display
It asks, each pixel is read out by multiple dynamic RAMs 34 and is passed in real time by its third output port 3333
The second dual-ported memory being located at the 5th input port 3351 is sent into scanning circuit module 335 to carry out temporary cache.
Last scanning circuit module 335 will read out in sequence driving LED lamp panel from its second dual-ported memory
Data are shown required for mould group, and by the output of lamp plate interface 35 to LED light template die group.The display of lamp plate mould group is driven at this time
Data are to receive and cache to multiple 34 1 frames of dynamic RAM, then by receiving circuit module 332 from video source
It is converted after conversion circuit module 333 carries out image procossing according to image output sequence and keeps in scanning circuit module 335
In the second dual-ported memory after display image.
The TTL format video signal of the 2nd TTL format video signal output interface 323 and video encoder 36 at this time is defeated
Incoming interface 361 connects, the decoded video signal that video encoder 36 will be obtained from TTL format video signal input interface 361
Such as TTL format video signal carries out coding generation encoded video signal and is transmitted to view by encoded signal output interface 362
Frequency source output interface 37 is used for cascade display control card.In addition, controller 38 monitors video encoder 32 and video in real time
The working condition of decoder 36, when video encoder 32 and Video Decoder 36 work in no video signal condition, controller
Its working condition is broadcast to all display control cards of rear class by communication signal line by 38, at the image in rear class display control card
After reason device receives instruction, directly closing display screen is shown.
Display control card 30 provided in this embodiment is connected to the LED light template die group and view of display screen such as LED display
Between frequency source, and inside it by setting field frequency detection module 331 and generate test image module 334 be compatible with sending card and
The function of receiving card, may be implemented the cascade Mach-Zehnder interferometer of display control card, avoid existing with " sending card+reception card " display
Control the problems of framework；Furthermore image to be displayed data are obtained by 332 real-time interception image data of receiving circuit module
And be written into multiple dynamic RAMs 34 and carry out a frame buffer, the image data that final display screen uses is by a frame
The frame delay of existing display screen is reduced to 1 frame sign, realizes the low delay of control system by the display image data of delay,
It realizes from video source to the synchronism of user's vision and real-time, enhances user experience；Furthermore the display control card 30
Low delay technology the control mode of existing display screen is simplified in overall architecture, solve the existing low latency based on network interface
The problem of technology Bandwidth-Constrained；Furthermore 30 structure of display control card is simple, and cost is relatively low, while avoiding existing based on coaxially connecing
The higher problem of low delay technical costs of mouth.
[fourth embodiment]
Fig. 9 is the display screen control system 50 that the utility model fourth embodiment provides.As shown in figure 9, display screen controls
System 50 includes display control card 51 and the display screen 52 for being connected to display control card 51.
Wherein display screen 52 is, for example, LED display, and LED display is spliced by multiple LED boxes, each LED case
Body includes one or more LED lamp panels.One display control card can control a LED box.Between multiple display control cards
It is connected by cascade system.Display control card 51 in the present embodiment can be the display control card provided in previous embodiment,
It is not repeating herein.
Finally, it should be noted that above embodiments are only to illustrate the technical solution of the utility model, rather than its limitations；
Although the utility model is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that:
It is still possible to modify the technical solutions described in the foregoing embodiments, or part of technical characteristic is carried out etc.
With replacement；And these are modified or replaceed, various embodiments of the utility model technology that it does not separate the essence of the corresponding technical solution
The spirit and scope of scheme.
Claims (10)
1. a kind of display control card, which is characterized in that the display control card include video source input interface, Video Decoder,
Image processor, lamp plate interface and multiple dynamic RAMs；
The Video Decoder is provided with decoded signal input interface and the first TTL format video signal output interface；The solution
Code signal input interface connects the video source input interface；
Described image processor is provided with multiple ports, and the multiple port is separately connected the first TTL format video signal
Output interface, the lamp plate interface and the multiple dynamic RAM.
2. display control card according to claim 1, which is characterized in that described image processor includes:
Field frequency detection circuit module, including first input port and the first output port；The first input port is connected to institute
State the first TTL format video signal output interface；
Receiving circuit module, including the second input port and second output terminal mouth；Second input port is connected to described
One output port；The second output terminal mouth is connected to the multiple dynamic RAM；
Conversion circuit module, including third input port, the 4th input port and third output port；The third input port
It is connected to the multiple dynamic RAM；
Generate test image module, including the 4th output port；4th output port is connected to the 4th input port；
Scanning circuit module, including the 5th input port and the 5th output port；5th input port is connected to described
Three output ports；5th output port is connected to the lamp plate interface.
3. display control card according to claim 2, which is characterized in that second output of the receiving circuit module
The first dual-ported memory is provided at port；Second pair is provided at the 5th input port of the scanning circuit module
Port store.
4. display control card according to claim 1, which is characterized in that the Video Decoder is provided with shunt circuit mould
Block, the shunt circuit module include that the first TTL format video signal output interface and the 2nd TTL format video signal are defeated
Outgoing interface.
5. display control card according to claim 4, which is characterized in that the display control card further includes video encoder
With video source output interface；Wherein, the video encoder is provided with TTL format video signal input interface and encoded signal is defeated
Outgoing interface；The TTL format video signal input interface connects the 2nd TTL format video signal output interface, the volume
Code signal output interface connects the video source output interface.
6. display control card according to claim 5, which is characterized in that the video source input interface and the video source
Output interface is HDMI interface or network interface.
7. display control card according to claim 1, which is characterized in that the display control card further includes controller, institute
State controller connection described image processor.
8. display control card according to claim 1, which is characterized in that described image processor includes Programmadle logic device
Part.
9. display control card according to claim 1, which is characterized in that the video source input interface, the video solution
Code device, described image processor, the lamp plate interface and the multiple dynamic RAM are arranged on same circuit board.
10. a kind of display screen control system, which is characterized in that including display control card and be connected to the aobvious of the display control card
Display screen；Wherein, display control card display control card as claimed in any one of claims 1 to 9.
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| CN201822050204.2U CN209297726U (en) | 2018-12-07 | 2018-12-07 | Display control card and display screen control system |
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| CN201822050204.2U CN209297726U (en) | 2018-12-07 | 2018-12-07 | Display control card and display screen control system |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111954062A (en) * | 2020-07-14 | 2020-11-17 | 西安万像电子科技有限公司 | Information processing method and device |
| CN112351267A (en) * | 2020-10-29 | 2021-02-09 | 西安诺瓦星云科技股份有限公司 | Video display method, display controller, display control card and display control system |
| CN112463183A (en) * | 2019-09-06 | 2021-03-09 | 西安诺瓦星云科技股份有限公司 | Display control card aging detection method, device and system and computer readable medium |
| CN112863425A (en) * | 2019-11-08 | 2021-05-28 | 上海三思电子工程有限公司 | Multifunctional video splicing control device and LED display system |
| CN114615537A (en) * | 2020-11-24 | 2022-06-10 | 深圳市奥拓电子股份有限公司 | Zero-frame-delay video control system and method and LED display system |
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2018
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112463183A (en) * | 2019-09-06 | 2021-03-09 | 西安诺瓦星云科技股份有限公司 | Display control card aging detection method, device and system and computer readable medium |
| CN112863425A (en) * | 2019-11-08 | 2021-05-28 | 上海三思电子工程有限公司 | Multifunctional video splicing control device and LED display system |
| CN111954062A (en) * | 2020-07-14 | 2020-11-17 | 西安万像电子科技有限公司 | Information processing method and device |
| CN112351267A (en) * | 2020-10-29 | 2021-02-09 | 西安诺瓦星云科技股份有限公司 | Video display method, display controller, display control card and display control system |
| CN114615537A (en) * | 2020-11-24 | 2022-06-10 | 深圳市奥拓电子股份有限公司 | Zero-frame-delay video control system and method and LED display system |
| CN114615537B (en) * | 2020-11-24 | 2024-03-29 | 深圳市奥拓电子股份有限公司 | Zero-frame-delay video control system and method and LED display system |
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