CN209248523U - A kind of monobus communication signal repeat circuit - Google Patents
A kind of monobus communication signal repeat circuit Download PDFInfo
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- CN209248523U CN209248523U CN201822145709.7U CN201822145709U CN209248523U CN 209248523 U CN209248523 U CN 209248523U CN 201822145709 U CN201822145709 U CN 201822145709U CN 209248523 U CN209248523 U CN 209248523U
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Abstract
The utility model discloses a kind of monobus communication signal repeat circuit, and the first pull-up resistor and the first comparing unit non-inverting input terminal are connect with host interface port；First signal shaping unit input terminal is connect with the first comparing unit output end；First reference signal generates unit input terminal and connect with the first comparing unit output end；Second pull-up resistor and the first signal shaping unit are connect with slave interface end；Second comparing unit non-inverting input terminal is connect with slave interface end, and the inverting input terminal of the second comparing unit is connect with the output end that the first reference signal generates unit；Second signal shaping unit input terminal is connect with the second comparing unit output end, and second signal shaping unit output end is connect with host interface port；Second reference signal generates unit input terminal and connect with the second comparing unit output end, and the second reference signal generates unit output end and connect with the first comparing unit inverting input terminal.The utility model solves in monobus communication process the technical issues of vulnerable to signal interference.
Description
Technical field
The utility model relates to communication technique fields, and in particular to a kind of monobus communication signal repeat circuit.
Background technique
The universal serial bus carried out data transmission between currently used microcomputer and peripheral hardware mainly have I2C bus, spi bus and
SCI bus.Wherein I2C bus is communicated (clock lines, a data line) in a manner of 2 line of synchronous serial, and spi bus is then
It is communicated in a manner of 3 line of synchronous serial (clock lines, a data input line, a data output line), and SCI bus
It is to be communicated (a data input line, a data output line) in an asynchronous manner.These buses at least need two or
Two or more signal wires.In recent years, it is proposed distinctive monobus (1-Wire Bus) technology.The technology and above-mentioned total
Line is different, it uses single signal wire, can not only transmit clock, but also can transmit data, and data transmission is two-way, thus this
The advantages that kind Single Wire Bus Technology has route simple, and hardware spending is few, low in cost, convenient for bus extension and safeguards.
Monobus is suitable for single host system, can control one or more slave devices.Host can be microcontroller,
Slave can be single wire bus device, and the data exchange between them only passes through a signal line.When only one slave devices,
System can be operated by single node system；When there is a plurality of slave devices, system then presses multi-node system operation.
But current this monobus communication modes there are relay capabilities it is insufficient, vulnerable to signal interference the drawbacks of.
Utility model content
One purpose of the utility model is to solve at least the above problems, and provide the advantages of at least will be described later.
The purpose of the utility model is to provide a kind of monobus communication signal repeat circuit, by host side and from generator terminal
Signal shaping unit is respectively set, improves the relay capabilities of signal transmission, improves signal driving capability, solves monobus communication
In the process vulnerable to signal interference the technical issues of.
In order to realize these purposes according to the present utility model and other advantages, provide in a kind of monobus communication signal
After circuit, comprising:
First pull-up resistor, connect with host interface port；
First comparing unit, non-inverting input terminal are connect with the host interface port, the reverse phase of first comparing unit
Input terminal connects one first reference voltage；
First signal shaping unit, input terminal are connect with the first comparing unit output end；
Second pull-up resistor is connect with slave interface end, the output end of the first signal shaping unit and it is described from
The connection of machine interface end；
Second comparing unit, non-inverting input terminal are connect with the slave interface end, the reverse phase of second comparing unit
Input terminal connects one second reference voltage；
Second signal shaping unit, input terminal are connect with the second comparing unit output end, and the second signal is whole
The output end of shape unit is connect with the host interface port.
It preferably, further include that the first reference signal generates unit, input terminal and the first comparing unit output end connect
It connects, the inverting input terminal of second comparing unit is connect with the output end that first reference signal generates unit；
It preferably, further include that the second reference signal generates unit, input terminal and the second comparing unit output end connect
It connects, the output end that second reference signal generates unit is connect with the inverting input terminal of first comparing unit.
Preferably, first comparing unit includes:
First diode, cathode are connect with the host interface port；
First comparator, non-inverting input terminal are connect with the first diode anode, the reverse phase of the first comparator
Input terminal is connect with the output end that second reference signal generates unit；
First resistor, first end are connect with power end, the second end of the first resistor and the first comparator
Non-inverting input terminal connection.
Preferably, the first signal shaping unit includes:
Second comparator, non-inverting input terminal are connect with the output end of the first comparator, second comparator
Output end is connect with the slave interface end；
Second resistance, first end are connect with power end, the second end of the second resistance and second comparator
Non-inverting input terminal connection；
First bleeder circuit comprising concatenated 3rd resistor and the 4th resistance, the input terminal of first bleeder circuit
It is connect with power end, the output end of first bleeder circuit is connect with the inverting input terminal of second comparator.
Preferably, the first reference signal generation unit includes:
First buffer, input terminal are connect with the output end of the first comparator；
Second bleeder circuit comprising the 5th resistance being arranged in series and the 6th resistance, second bleeder circuit it is defeated
Enter end to connect with the output end of first buffer.
Preferably, second comparing unit includes:
Second diode, cathode are connect with the slave interface end；
Third comparator, non-inverting input terminal are connect with second diode anode, the reverse phase of the third comparator
Input terminal is connect with the output end of second bleeder circuit；
7th resistance, first end are connect with power end, second end and the third comparator of the 7th resistance
Non-inverting input terminal connection.
Preferably, the second signal shaping unit includes:
4th comparator, non-inverting input terminal are connect with the output end of the third comparator, the 4th comparator
Output end is connect with the host interface port；
8th resistance, first end are connect with power end, second end and the 4th comparator of the 8th resistance
Non-inverting input terminal connection；
Third bleeder circuit comprising concatenated 9th resistance and the tenth resistance, the input terminal of the third bleeder circuit
It is connect with power end, the output end of the third bleeder circuit is connect with the inverting input terminal of the 4th comparator.
Preferably, the second reference signal generation unit includes:
Second buffer, input terminal are connect with the output end of the third comparator；
4th bleeder circuit comprising the eleventh resistor and twelfth resistor being arranged in series, the 4th bleeder circuit
Input terminal connect with the output end of second buffer, the output end of the 4th bleeder circuit and the first comparator
Inverting input terminal connection.
Compared with prior art, the beneficial effect that the utility model includes is:
1, the utility model sends signal and passes through signal by the way that signal shaping unit is respectively set in host side and from generator terminal
Long distance transmission is carried out after shaping enhancing, increases signal long-distance transmittability；
2, signal transmission error rates are reduced, the reliability of monobus signal transmission is improved；
3, the variation benchmark that unit is generated by reference signal, improves signal in the stability of transmission process.
The further advantage, target and feature of the utility model will be partially reflected by the following instructions, and part will also pass through
Research and practice to the utility model and be understood by the person skilled in the art.
Detailed description of the invention
Fig. 1 is the circuit diagram of the utility model.
Specific embodiment
The following describes the utility model in further detail with reference to the accompanying drawings, to enable those skilled in the art referring to explanation
Text can be implemented accordingly.
As shown in Figure 1, the utility model provides a kind of monobus communication signal repeat circuit, including host transmission circuit
With slave transmission circuit, host transmission circuit includes the first pull-up resistor Rup1, the first comparing unit, the first signal shaping unit
Unit is generated with the first reference signal.Slave transmission circuit includes the second pull-up resistor Rup2, the second comparing unit, second signal
Shaping unit and the second reference signal generate unit.
First pull-up resistor Rup1 is connect with host interface port SBUS1, under normal condition, passes through the first pull-up resistor Rup1
The voltage of host interface port SBUS1 is maintained at high level.
First comparing unit is connected between host interface port SBUS1 and the first signal shaping unit, specifically, described
One comparing unit includes: first diode D1, first comparator OP1 and first resistor R1, the cathode of first diode D1 and institute
Host interface port SBUS1 connection is stated, the non-inverting input terminal of first comparator OP1 is connect with the first diode D1 anode, is led to
Crossing first diode D1 avoids the reception signal of host from generating interference to the first comparing unit.The first comparator OP1's is anti-
Phase input terminal is connect with the output end that second reference signal generates unit.The first end and power end Vcc of first resistor R1
Connection, the second end of the first resistor R1 are connect with the non-inverting input terminal of the first comparator OP1, under normal condition, are
The non-inverting input terminal of first comparator OP1 provides high level signal.
In the present embodiment, the voltage of each power end Vcc is 5V, and the resistance value of each resistance can be equal.
The input terminal of first signal shaping unit is connect with the first comparing unit output end, specifically, described first
Signal shaping unit includes: the second comparator OP2, second resistance R2 and the first bleeder circuit.Second comparator OP2's is same mutually defeated
Enter end to connect with the output end of the first comparator OP1, the output end of the second comparator OP2 and the slave interface end
The input signal of SBUS2 connection, host is sent to slave interface end SBUS2 by the output end of the second comparator OP2.
The first end of second resistance R2 is connect with power end Vcc, and the second end of the second resistance R2 and described second compares
Non-inverting input terminal compared with device OP2 connects, and under normal condition, the non-inverting input terminal of the second comparator OP2 is maintained at high level shape
State.
First bleeder circuit includes concatenated 3rd resistor R3 and the 4th resistance R4, the input terminal of first bleeder circuit
It being connect with power end Vcc, the output end of first bleeder circuit is connect with the inverting input terminal of the second comparator OP2,
Using the voltage on the 4th resistance R4 as the input voltage of the second comparator OP2 inverting input terminal.
First signal shaping unit carries out shaping, the output of first comparator OP1 to the output signal of first comparator OP1
Signal exports after passing through the first signal shaping unit shaping, and is sent to slave interface end SBUS2.Signal drives after shaping
Kinetic force is stronger, is equivalent to and has carried out relaying reinforcement processing to signal, increases the anti-interference ability of signal, and transmission range is more
It is long, and improve the accuracy transmitted at a distance.
The input terminal that first reference signal generates unit is connect with the first comparing unit output end；Specifically, described
It includes: the first buffer U1 and the second bleeder circuit that first reference signal, which generates unit,.First buffer U1 input terminal with it is described
The output end of first comparator OP1 connects；Second bleeder circuit includes the 5th resistance R5 and the 6th resistance R6 being arranged in series, the
The first end of five resistance R5 is connect with the output end of the first buffer U1, the second end ground connection of the 6th resistance R6.
Slave transmission circuit is consistent with host transmission circuit structure, and slave transmission circuit and host transmission circuit are staggeredly pair
Claim setting.Specifically, the second pull-up resistor Rup2 is connect with slave interface end SBUS2, the first signal shaping unit it is defeated
Outlet is connect with the slave interface end SBUS2, and the signal that host is sent is successively by comparing and being sent to slave after shaping
Interface end SBUS2.
The non-inverting input terminal of second comparing unit is connect with the slave interface end SBUS2, second comparing unit
Inverting input terminal is connect with the output end that first reference signal generates unit.Specifically, second comparing unit includes:
Second diode D2, third comparator OP3 and the 7th resistance R7, the cathode of the second diode D2 and the slave interface end
SBUS2 connection；The non-inverting input terminal of third comparator OP3 is connect with the second diode D2 anode, the third comparator
The inverting input terminal of OP3 is connect with the output end of second bleeder circuit, that is, with the 5th resistance R5 and the 6th resistance R6
Total contact connection.
The first end of 7th resistance R7 is connect with power end Vcc, the second end of the 7th resistance R7 and the third ratio
Non-inverting input terminal connection compared with device OP3.
The input terminal of second signal shaping unit is connect with the second comparing unit output end, the second signal shaping
The output end of unit is connect with the host interface port SBUS1, and the signal that slave is sent successively is passed by comparing with after shaping
It send to host interface port SBUS1.
The second signal shaping unit includes: the 4th comparator OP4, the 8th resistance R8 and third bleeder circuit.4th
The non-inverting input terminal of comparator OP4 is connect with the output end of the third comparator OP3, the output of the 4th comparator OP4
End is connect with the host interface port SBUS1；The first end of 8th resistance R8 is connect with power end Vcc, the 8th resistance R8
Second end connect with the non-inverting input terminal of the 4th comparator OP4.
Third bleeder circuit includes concatenated 9th resistance R9 and the tenth resistance R10, the input of the third bleeder circuit
End is connect with power end Vcc, and the inverting input terminal of the output end of the third bleeder circuit and the 4th comparator OP4 connect
It connects, using the voltage on the tenth resistance R10 as the input voltage of the 4th comparator OP4 inverting input terminal.
Second signal shaping unit carries out shaping, the output of third comparator OP3 to the output signal of third comparator OP3
Signal exports after passing through the first signal shaping unit shaping, and is sent to host interface port SBUS1.Signal drives after shaping
Kinetic force is stronger, is equivalent to and has carried out relaying reinforcement processing to signal, increases the anti-interference ability of signal, and transmission range is more
It is long, and improve the accuracy transmitted at a distance.
The input terminal that second reference signal generates unit is connect with the second comparing unit output end, second benchmark
The output end of signal generation unit is connect with the inverting input terminal of first comparing unit.
It includes: the second buffer U2 and the 4th bleeder circuit, the second buffer U2 that second reference signal, which generates unit,
Input terminal connect with the output end of the third comparator OP3；4th bleeder circuit includes the eleventh resistor being arranged in series
R11 and twelfth resistor R12, the input terminal of the 4th bleeder circuit are connect with the output end of the second buffer U2, institute
The output end for stating the 4th bleeder circuit is connect with the inverting input terminal of the first comparator OP1.
The course of work is as follows:
When host interface port SBUS1 issues high level signal, i.e., voltage is pulled up supreme electricity by the first pull-up resistor Rup1
It is flat, it is input to the non-inverting input terminal of first comparator OP1, first comparator OP1 exports high level, and first comparator OP1's is defeated
High level signal exports after the first signal shaping unit shaping out, the high level signal that host interface port SBUS1 is issued
It is sent to slave interface end SBUS2.That is the high level signal of first comparator OP1 output passes through the first signal shaping list
After first shaping, driving capability is stronger, is easy to transmit at a distance, and has stronger anti-interference ability, improves the standard of signal transmission
True property, in the utility model, signal shaping unit plays the role of signal relaying output.
Meanwhile the high level signal of first comparator OP1 output, it is sent to the input that the first reference signal generates unit
End, so that the first reference signal, which generates, exports height between unit output high level, that is, the 5th resistance R5 and the 6th resistance R6
Level so that third comparator OP3 exports low level signal, and is sent to second to the inverting input terminal of third comparator OP3
Reference signal generates the input terminal of unit, so that the second reference signal generates unit and exports low level, that is, eleventh resistor
The inverting input terminal that low level to first comparator OP1 is exported between R11 and twelfth resistor R12, by first comparator OP1's
Inverting input terminal is maintained at low level, so that first comparator OP1 stablizes output high level signal, final slave interface end
SBUS2 keeps receiving high level signal.
When host interface port SBUS1 issues low level signal, only host interface port SBUS1 need to be pulled down to low level i.e.
Can, at this point, input low level signal is input to the non-inverting input terminal of first comparator OP1, first comparator OP1 exports low electricity
Flat, the output low level signal of first comparator OP1 exports after the first signal shaping unit shaping, by host interface port
The low level signal that SBUS1 is issued is sent to slave interface end SBUS2.
Meanwhile the low level signal of first comparator OP1 output, it is sent to the input that the first reference signal generates unit
End, so that being exported between the first reference signal generation unit output low level, that is, the 5th resistance R5 and the 6th resistance R6 low
Level so that third comparator OP3 exports high level signal, and is sent to second to the inverting input terminal of third comparator OP3
Reference signal generates the input terminal of unit, so that the second reference signal generates unit and exports high level, that is, eleventh resistor
The inverting input terminal that high level to first comparator OP1 is exported between R11 and twelfth resistor R12, by first comparator OP1's
Inverting input terminal is maintained at high level, so that first comparator OP1 stablizes output low level signal, final slave interface end
SBUS2 keeps receiving low level signal.
In above process, the benchmark that reference signal generates unit output end changes, steady to keep signal to transmit
It is qualitative.
When slave interface end SBUS2 sends signal, and host interface port SBUS1 receives signal, the course of work and above-mentioned master
The process that machine interface end SBUS1 sends a signal to slave interface end SBUS2 is consistent.
From the above mentioned, the utility model plays signal by the way that signal shaping unit is respectively set in host side and from generator terminal
Relaying action sends signal by carrying out long distance transmission after signal shaping enhancing, increases signal long-distance transmittability.Together
When, signal transmission error rates are reduced, the reliability of monobus signal transmission is improved.Also, it is generated by reference signal single
The variation benchmark of member, improves signal in the stability of transmission process.
It is not only in the description and the implementation although the embodiments of the present invention have been disclosed as above
Listed utilization, it can be applied to various fields suitable for the present invention completely, for those skilled in the art,
It can readily realize other modification, therefore without departing from the general concept defined in the claims and the equivalent scope, this reality
It is not limited to specific details and legend shown and described herein with novel.
Claims (9)
1. a kind of monobus communication signal repeat circuit characterized by comprising
First pull-up resistor, connect with host interface port；
First comparing unit, non-inverting input terminal are connect with the host interface port, the anti-phase input of first comparing unit
One first reference voltage of end connection；
First signal shaping unit, input terminal are connect with the first comparing unit output end；
Second pull-up resistor is connect with slave interface end, and output end and the slave of the first signal shaping unit connect
The connection of mouth end；
Second comparing unit, non-inverting input terminal are connect with the slave interface end, the anti-phase input of second comparing unit
One second reference voltage of end connection；
Second signal shaping unit, input terminal are connect with the second comparing unit output end, the second signal shaping list
The output end of member is connect with the host interface port.
2. monobus communication signal repeat circuit as described in claim 1, which is characterized in that further include that the first reference signal produces
Raw unit, input terminal are connect with the first comparing unit output end, the inverting input terminal of second comparing unit and institute
State the output end connection that the first reference signal generates unit.
3. monobus communication signal repeat circuit as claimed in claim 2, which is characterized in that further include that the second reference signal produces
Raw unit, input terminal are connect with the second comparing unit output end, and second reference signal generates the output end of unit
It is connect with the inverting input terminal of first comparing unit.
4. monobus communication signal repeat circuit as claimed in claim 3, which is characterized in that the first comparing unit packet
It includes:
First diode, cathode are connect with the host interface port；
First comparator, non-inverting input terminal are connect with the first diode anode, the anti-phase input of the first comparator
The output end for generating unit with second reference signal is held to connect；
First resistor, first end are connect with power end, the same phase of the second end of the first resistor and the first comparator
Input terminal connection.
5. monobus communication signal repeat circuit as claimed in claim 4, which is characterized in that the first signal shaping unit
Include:
Second comparator, non-inverting input terminal are connect with the output end of the first comparator, the output of second comparator
End is connect with the slave interface end；
Second resistance, first end are connect with power end, the same phase of the second end of the second resistance and second comparator
Input terminal connection；
First bleeder circuit comprising concatenated 3rd resistor and the 4th resistance, the input terminal and electricity of first bleeder circuit
Source connection, the output end of first bleeder circuit are connect with the inverting input terminal of second comparator.
6. monobus communication signal repeat circuit as claimed in claim 5, which is characterized in that first reference signal generates
Unit includes:
First buffer, input terminal are connect with the output end of the first comparator；
Second bleeder circuit comprising the 5th resistance being arranged in series and the 6th resistance, the input terminal of second bleeder circuit
It is connect with the output end of first buffer.
7. monobus communication signal repeat circuit as claimed in claim 6, which is characterized in that the second comparing unit packet
It includes:
Second diode, cathode are connect with the slave interface end；
Third comparator, non-inverting input terminal are connect with second diode anode, the anti-phase input of the third comparator
End is connect with the output end of second bleeder circuit；
7th resistance, first end are connect with power end, the second end and the same phase of the third comparator of the 7th resistance
Input terminal connection.
8. monobus communication signal repeat circuit as claimed in claim 7, which is characterized in that the second signal shaping unit
Include:
4th comparator, non-inverting input terminal are connect with the output end of the third comparator, the output of the 4th comparator
End is connect with the host interface port；
8th resistance, first end are connect with power end, the second end and the same phase of the 4th comparator of the 8th resistance
Input terminal connection；
Third bleeder circuit comprising concatenated 9th resistance and the tenth resistance, the input terminal and electricity of the third bleeder circuit
Source connection, the output end of the third bleeder circuit are connect with the inverting input terminal of the 4th comparator.
9. monobus communication signal repeat circuit as claimed in claim 8, which is characterized in that second reference signal generates
Unit includes:
Second buffer, input terminal are connect with the output end of the third comparator；
4th bleeder circuit comprising the eleventh resistor and twelfth resistor being arranged in series, the 4th bleeder circuit it is defeated
Enter end to connect with the output end of second buffer, the output end of the 4th bleeder circuit is anti-with the first comparator
The connection of phase input terminal.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201822145709.7U CN209248523U (en) | 2018-12-20 | 2018-12-20 | A kind of monobus communication signal repeat circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201822145709.7U CN209248523U (en) | 2018-12-20 | 2018-12-20 | A kind of monobus communication signal repeat circuit |
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| CN209248523U true CN209248523U (en) | 2019-08-13 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109522260A (en) * | 2018-12-20 | 2019-03-26 | 苏州路之遥科技股份有限公司 | A kind of monobus communication signal repeat circuit |
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2018
- 2018-12-20 CN CN201822145709.7U patent/CN209248523U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109522260A (en) * | 2018-12-20 | 2019-03-26 | 苏州路之遥科技股份有限公司 | A kind of monobus communication signal repeat circuit |
| CN109522260B (en) * | 2018-12-20 | 2024-07-02 | 苏州路之遥科技股份有限公司 | Single-bus communication signal relay circuit |
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