CN209216958U - A kind of semiconductor structure - Google Patents
A kind of semiconductor structure Download PDFInfo
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- CN209216958U CN209216958U CN201821916113.6U CN201821916113U CN209216958U CN 209216958 U CN209216958 U CN 209216958U CN 201821916113 U CN201821916113 U CN 201821916113U CN 209216958 U CN209216958 U CN 209216958U
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Abstract
The utility model provides a kind of semiconductor structure characterized by comprising substrate；Hole or groove is located on the substrate, and described hole or groove have side wall upper part, lower sidewall and bottom；Tungsten nitride layer, is covered on the side wall upper part, lower sidewall and bottom of described hole or groove, and the thickness of the side wall upper part of described hole or groove, lower sidewall and the tungsten nitride on bottom is all the same；Metal layer covers the tungsten nitride layer and fills up described hole or groove.The barrier layer step coverage of the utility model is excellent, metal is enabled to adequately fill up hole or groove to avoid generating hole, the barrier layer thickness of deposition is appropriate and fine and close simultaneously, with good adhesive force and excellent barrier properties, and there is low contact resistance, it can be improved product yield, reduce production cost.
Description
Technical field
The utility model relates to semiconductor field, in particular to a kind of semiconductor structure.
Background technique
Currently, as semiconductor is widely applicable for the digital products such as computer, mobile phone, the manufacture of semiconductor product
Technique is also received and is widely paid close attention to.
In the manufacturing process of existing semiconductor, chemical vapor deposition (Chemical Vapor can be used
Deposition:CVD) technique or next using physical vapour deposition (PVD) (Physical Vapor Deposition:PVD) technique
Manufacture semiconductor.Due to physical gas-phase deposition have for example optional thin-film material extensively, be deposited into trip temperature it is relatively low,
The advantages that binding ability is excellent, therefore physical gas-phase deposition becomes essential in the manufacturing process of most semiconductors
Technique.
Developing as recent semiconductor devices has increasingly been towards small-sized direction, the size of semiconductor also becomes smaller therewith, and
Requirement to semiconducting behavior is also increasingly stringenter, especially in the size reduction of the significant points of semiconductor product to 30nm or less
In the case where, it is difficult to fill tungsten in contact hole, through-hole etc..The increase of depth-to-width ratio may cause the generation tungsten gap in device feature
Or seam, cause the yield of chip to reduce and performance decline.
In using conventional deposits tungsten interconnection structure, need titanium/titanium nitride as barrier layer, but physical vapour deposition (PVD)
The titanium nitride step coverage of formation is poor, thicker than lower sidewall in the barrier layer thickness that the side wall upper part of contact hole, through-hole deposits,
Cause subsequent tungsten filling bad, forms cavity or gap, reduce product yield and reliability.
It should be noted that information is merely for convenience of the back to the utility model disclosed in above-mentioned background technology part
The understanding of scape technology, therefore may include the information not constituted to the prior art known to persons of ordinary skill in the art.
Utility model content
In view of above-mentioned problems of the prior art, a purpose of the utility model is, provides a kind of with good
The barrier layer of good step coverage prevents tungsten from filling semiconductor structure and its system bad, that improve product yield and reliability
Make method.
To achieve the goals above, the utility model provides a kind of manufacturing method of semiconductor structure, the semiconductor junction
The manufacturing method of structure includes:
Substrate is provided；
Hole or groove is formed over the substrate, and described hole or groove have side wall upper part, lower sidewall and bottom；
Form tungsten nitride layer on the side wall upper part of described hole or groove, lower sidewall and bottom, the side wall upper part,
The tungsten nitride thickness that lower sidewall and bottom are formed is all the same；
Deposited metal layer and described hole or groove are filled up on the tungsten nitride layer.
Optionally, the manufacturing method of the semiconductor structure is formed before hole or groove over the substrate, described
Metal connecting line layer is formed in substrate, described hole or groove are located at metal connecting line layer top and make the metal connecting line layer extremely
Small part is exposed.
It optionally, further include plasma treatment step, using gas removes before cvd nitride tungsten layer over the substrate
With the metal oxide film of the metal connecting line layer surface of described hole or groove connected component.
Optionally, the metal connecting line layer formed in the substrate is copper connecting lines layer, the institute removed in plasma treatment step
Stating metal oxide film is copper oxide, and the metal layer deposited on the tungsten nitride layer is tungsten layer.
Optionally, gas used in the plasma treatment step is Ar or H2。
Optionally, the tungsten nitride layer is deposited using pulsed nucleation layer tungsten nitride depositing operation.
Optionally, the pulsed nucleation layer tungsten nitride depositing operation includes lamination circulation, makes institute in lamination circulation
It states substrate and is successively exposed to B2H6、WF6、NH3Gas.
Optionally, carrier gas is injected in the pulsed nucleation layer tungsten nitride depositing operation.
Optionally, the temperature used in the pulsed nucleation layer tungsten nitride depositing operation is 200 to 400 DEG C, the nitrogen of deposition
Change tungsten layer with a thickness of 110 angstroms or less.
To achieve the goals above, the utility model also provides a kind of semiconductor structure characterized by comprising
Substrate；
Hole or groove is located on the substrate, and described hole or groove have side wall upper part, lower sidewall and bottom；
The tungsten nitride layer that pulsed nucleation layer tungsten nitride depositing operation is formed, is covered on the side wall of described hole or groove
The thickness of the side wall upper part of portion, lower sidewall and bottom, described hole or groove, lower sidewall and the tungsten nitride on bottom is homogeneous
Together；
Metal layer covers the tungsten nitride layer and fills up described hole or groove.
Optionally, the depth-to-width ratio of described hole or groove be 2 or more, the tungsten nitride layer with a thickness of 110 angstroms or less.
Optionally, metal connecting line layer in the substrate and described hole or lower trench and makes the metal connecting line
Layer at least partly exposes.
Optionally, the metal connecting line layer is copper connecting lines layer, and the metal layer is tungsten layer.
Semiconductor structure provided by the utility model and its manufacturing method are brought the following benefits:
The barrier layer step coverage prepared using pulsed nucleation layer tungsten nitride depositing operation is excellent, enables tungsten abundant
Hole or groove is filled up, so as to avoid cavity or gap is generated；And the barrier layer deposited has good adhesive force and excellent
Different barrier property, and there is low contact resistance；The yield and reliability for improving product, reduce production cost.
Detailed description of the invention
Fig. 1 is the cross-sectional view for the interstitital texture for the hole or groove for illustrating the semiconductor structure of the prior art.
Fig. 2 is another cross-sectional view of the interstitital texture for the hole or groove for illustrating the semiconductor structure of the prior art.
Fig. 3 is the section view for the interstitital texture for illustrating the hole or groove of semiconductor structure according to the present embodiment
Figure.
Fig. 4 is the figure for illustrating the interconnection contact resistance behavior of semiconductor structure according to the present embodiment.
Fig. 5 is the schematic diagram for illustrating pulsed nucleation layer tungsten nitride depositing operation according to the present embodiment.
1: metal connecting line layer
2: substrate
3: titanium layer
4: titanium nitride layer
5: tungsten layer
6: gap
7: cavity
13: tungsten nitride layer
14: metal layer
Attached drawing herein is incorporated to specification to form part of this specification, is illustrated in attached drawing and the utility model
The embodiment being consistent, and be used to explain the utility model together with specification.It is apparent that the utility model is in following theory
Bright attached drawing is only a part of the embodiment of the utility model, can be with for those skilled in the art
Other attached drawings can also be obtained in the case where not needing to make the creative labor according to these attached drawings.
Specific embodiment
The embodiments of the present invention will be further illustrated with reference to the accompanying drawings below.Obviously, the implementation of the utility model
Mode can be implemented by miscellaneous embodiment, therefore the utility model should not be construed as being limited to following explanation
Embodiment；In addition, the explanation by these following embodiments can make the utility model more full and complete, and
It can make those skilled in the art more sufficiently and the design of embodiment that clearly understands the present invention.
Can in one or more embodiments feature illustrated by any combination, structure or characteristic.In the following description, it provides
Multiple details fully understand embodiment of the present disclosure to provide.It will be appreciated, however, by one skilled in the art that
It can be omitted with technical solution of the disclosure one or more in the specific detail, or others side can be used
Method, element, device, step etc..
It in addition, attached drawing appended by the utility model is only schematic illustrations, and is drawn in strict accordance with ratio
Attached drawing.Same or similar appended drawing reference is marked to part identical in figure, and repetition will not will do it to these appended drawing references
Explanation.
Fig. 1 is the cross-sectional view for the interstitital texture for the hole or groove for illustrating the semiconductor structure of the prior art.In addition,
Fig. 2 is another cross-sectional view of the interstitital texture for the hole or groove for illustrating the semiconductor structure of the prior art.
The semiconductor structure of the prior art includes metal connecting line layer 1 and substrate layer 2.In the substrate layer 2 formed hole or
Groove, using physical gas-phase deposition (PVD) or chemical vapor deposition process (CVD) in the bottom of described hole or groove
And side wall is formed with the barrier layer of titanium layer 3 and titanium nitride layer 4, and using using physical gas-phase deposition (PVD) or chemical gas
Phase depositing operation (CVD) fills tungsten layer 5 in described hole or groove.But since titanium nitride step coverage is poor, cause
Titanium nitride is greater than the thickness of lower sidewall in the thickness of side wall upper part, and tungsten layer 5 as shown in Figure 1 and Figure 2, and then after causing is not
It can be filled up completely described hole or groove, therefore form gap 6 or cavity 7 in described hole or groove.
Fig. 3 is the section view for illustrating the interstitital texture of the hole or groove in semiconductor structure according to the present embodiment
Figure.Hereinafter, illustrating the manufacturing method of the semiconductor structure of an embodiment of the utility model according to Fig. 3.
The utility model provides a kind of manufacturing method of semiconductor structure, which is characterized in that the system of the semiconductor structure
The method of making includes:
Substrate 2 is provided；Hole or groove is formed on the substrate 2, described hole or groove have side wall upper part, side wall
Lower part and bottom；Tungsten nitride layer 13, the side wall are formed on the side wall upper part of described hole or groove, lower sidewall and bottom
The tungsten nitride thickness that top, lower sidewall and bottom are formed is all the same；It deposited metal layer 14 and is filled out on the tungsten nitride layer 13
Full described hole or groove.
The substrate 2 can be any one of silica, silicon nitride, Low-k dielectric layer, boron-phosphorosilicate glass etc. or group
It closes, however, it is not limited to this.
In one example, the substrate 2 further includes wafer, and the semiconductor devices on the wafer, the wafer can be
Silicon Wafer, however, it is not limited to this.The semiconductor devices can with CMOS, DRAM, NAND, one of Nor flash etc. or
Combination, however, it is not limited to this.
Hole or groove is formed on the substrate 2, described hole or groove have side wall upper part, lower sidewall and bottom
Portion.Specifically, can use lithography and etching technique forms hole or groove on the substrate 2, described hole or groove
Depth-to-width ratio is greater than 2, and in one example, depth-to-width ratio 10, depth-to-width ratio is 80 in another example, and preferably 50.Described hole or
The part of 1/2 or more trench depth is side wall upper part, and the part less than 1/2 is lower sidewall.To the shape of described hole or groove
Shape, size, quantity, interval are not done and are particularly limited, such as can according to actual needs set the shape of described hole or groove
It is set to rectangle, square, the shapes such as semicircle, trapezoidal etc..In the same manner, the size of described hole or groove, quantity, interval can
It suitably sets according to actual needs.
Optionally, it is formed before hole or groove over the substrate, forms metal connecting line layer in the substrate, it is described
Hole or groove is located at metal connecting line layer top and exposes the metal connecting line layer at least partly.
Tungsten nitride layer 13 is formed in the bottom and side wall of described hole or groove, and is filled out completely in described hole or groove
Fill metal layer 14.In one example, the bottom of described hole or groove is provided with metal line layer, the metal connecting line layer 1 is
The material of metal wire or metal plug connecting line layer, the metal connecting line layer 1 can be copper, tungsten, aluminium, cobalt, manganese, iron, nickel, chromium
Any of or a combination of Deng.Preferably copper metal connecting line layer.Herein, it is illustrated so that metal wire is copper wire as an example.
In the present embodiment, by deposited in the bottom and side wall of described hole or groove the tungsten nitride layer 13 come
Instead of the double-layer structure of the titanium/titanium nitride (Ti/TiN) generally used in the past.
Fig. 5 is the schematic diagram for illustrating pulsed nucleation layer tungsten nitride depositing operation according to the present embodiment.Hereinafter, ginseng
According to attached drawing 5, illustrate pulsed nucleation layer tungsten nitride depositing operation.
Optionally, pulsed nucleation layer (Pulse Nucleation Layer) nitrogen is used in the tungsten nitride layer deposition step
Change tungsten depositing operation to deposit the tungsten nitride layer 13.
Due to using pulsed nucleation layer tungsten nitride depositing operation in the substrate 2 in the tungsten nitride layer deposition step
Described hole or groove bottom and side wall be formed with very thin tungsten nitride layer in homogeneous thickness 13, the pulsed nucleation layer
Tungsten nitride depositing operation is thermal atomic layer depositing operation (thermal ALD process), therefore relative to physical vapour deposition (PVD)
Technique has more excellent step coverage, and the thickness of tungsten nitride layer 13 is more appropriate and highly uniform, such as Fig. 3 institute
Show, the side wall upper part and lower sidewall of described hole or groove and the tungsten nitride thickness of bottom are all the same, in addition, tungsten nitride layer
13 shape-retaining ability is very good.
Optionally, the pulsed nucleation layer tungsten nitride depositing operation includes lamination circulation, makes to have in lamination circulation
There is the substrate 2 of the hole or groove to be successively exposed to B2H6、WF6、NH3Gas.
As an example, B described in single loop2H6Gas flow and the time be respectively 16sccm~26scmm and 0.2S
~3S, preferably 20sccm and 1.5S；The WF6Gas flow and the time be respectively 26sccm~36scmm and 0.2S~
3S, preferably 30sccm and 1.5S；The NH3Gas flow and the time be respectively 30sccm~40scmm and 0.2S~5S,
Preferably 35sccm and 4S.
Pulsed nucleation layer tungsten nitride depositing operation is the thermal atomic layer depositing operation carried out at the specified temperature comprising according to
The secondary circulation for being exposed to regulation gas, and pass through thickness needed for repeating the cyclic deposition.
Optionally, carrier gas can also be injected in the pulsed nucleation layer tungsten nitride depositing operation.Optionally, there is the hole
The substrate 2 of hole or groove is exposed to B2H6、WF6、NH3It further include purging (purge) step, the purging between gas
(purge) gas is the carrier gas.
As the carrier gas, argon (Ar), helium (He) or other inert gases can be used for example.
Optionally, the temperature set in the pulsed nucleation layer tungsten nitride depositing operation is 200 to 400 DEG C, the thickness of deposition
Degree is 50 to 110 angstroms.In one example, the temperature is 280 DEG C, and in another example, the temperature is 350 DEG C.
Specifically, as shown in figure 5, injecting B to reaction chamber first in pulsed nucleation layer tungsten nitride depositing operation2H6Make to serve as a contrast
Bottom 2 is exposed to B2H6, B at a certain temperature2H6Suction-operated is played as precursor gas, is adsorbed onto described hole or groove
The surface of bottom and side wall.Later, (purge) gas is purged and from chamber cleaning B2H6Gas.Then, to reaction chamber
Inject WF6Substrate 2 is set to be exposed to WF6, WF at a certain temperature6Replace B2H6It is attached to the bottom and side of described hole or groove
The surface of wall.Later, (purge) gas is purged and from chamber cleaning WF6Gas.Then, NH is injected to reaction chamber3Make
Substrate 2 is exposed to NH3, nitrogen replaces the fluorine for being attached to the bottom and side wall of described hole or groove at a certain temperature, thus
Form tungsten nitride layer 13.Later, (purge) gas is purged and from chamber cleaning NH3Gas.In pulsed nucleation layer nitrogen
Change in tungsten depositing operation, repeats above-mentioned cyclic deposition to required thickness.
Pulsed nucleation layer tungsten nitride depositing operation carries out within the scope of lower temperature relative to physical vapor deposition technique
The problem of depositing, therefore can reduce the high temperature resistant requirement to equipment, and can reduce ageing equipment.
In addition, titanium/the titanium nitride deposited in physical vapor deposition is with a thickness of 100 to 300 angstroms, but according to this implementation
The pulsed nucleation layer tungsten nitride depositing operation of mode deposited with a thickness of 110 angstroms hereinafter, more preferably 50 to 110 angstroms, due to
The thickness deposited in depositing operation can be greatly reduced, therefore the usage amount of tungsten nitride can not only be saved, and also contribute to
Realize the miniaturization of product.
Optionally, the metal layer 14 deposited in the metal layer deposition steps can be for tungsten layer 5, aluminium layer etc., preferably
For tungsten layer 5.
As an example, can be deposited on the tungsten nitride layer 13 as the metal layer 14, it can also be by aluminium layer in institute
Stating deposition on tungsten nitride layer 13, as the metal layer 14, however, it is not limited to this, can also deposit other metal layers.
Optionally, the substrate 2 further includes metal connecting line layer 1, and described hole or groove are located on the metal connecting line layer 1
Side, and connected in the metal connecting line layer 1.
Optionally, the manufacturing method of the semiconductor structure further include: plasma treatment step, it is heavy in the tungsten nitride layer
Using gas removes the oxidation film on the metal connecting line layer 1 before product step.
As an example, in the manufacturing process of semiconductor structure, due in substrate 2 metal connecting line layer 1 in hole or groove
Position be exposed to air or other gases and can be oxidized.In the present embodiment, existed by the plasma treatment step
Using gas is made a return journey cvd nitride tungsten layer 13 after oxide film dissolving before the tungsten nitride layer deposition step.Therefore, because going deoxygenation
Cvd nitride tungsten layer 13 after change film, therefore can be avoided because tungsten nitride layer 13 is low with the binding force of oxide skin(coating), so that tungsten nitride
The problem of layer 13 is easy to fall off, to ensure that product quality.Simultaneously as eliminating oxidation film, therefore copper-connection can be made
Resistance in structure reduces significantly.
As an example, the metal connecting line layer 1 is copper connecting lines layer, the oxidation film is copper oxide.
Optionally, gas used in the plasma treatment step is Ar or H2。
In the present embodiment, the oxidation film is removed by the plasma treatment step based on chemically reacting.With H2
Reaction for, hydrogen and reactive metal oxide in plasma treatment step and generate metal and water, covered it is possible thereby to remove
The oxide of cap surface.Due to cvd nitride tungsten layer 13 after removal oxide, can be avoided because of tungsten nitride layer 13 and oxidation
The binding force of nitride layer is low, and the problem of be easy to fall off tungsten nitride layer 13, to ensure that product quality.Simultaneously as removal
Oxide, therefore so that the resistance in copper interconnection structure is reduced significantly.Can also by based on physical reactions etc.
Ion processing step removes the oxidation film.By taking the reaction of Ar as an example, Ar ion is generated in plasma treatment step, and make to produce
Raw Ar ion bombardment covers surface to remove oxide.Due to cvd nitride tungsten layer 13 after removal copper oxide, can keep away
The problem of exempting from because tungsten nitride layer 13 is low with the binding force of oxide skin(coating), and being easy to fall off tungsten nitride layer 13, to ensure that production
Quality.Simultaneously as eliminating oxide, therefore the resistance in copper interconnection structure can be made to reduce significantly.
In the present embodiment, the oxidation film for being formed in hole or groove bottom of removal is copper oxide, but not
It is confined to this, the oxidation film of removal may be aluminium oxide etc..Due to removal copper oxide after cvd nitride tungsten layer 13,
The problem of can be avoided because tungsten nitride layer 13 is low with the binding force of copper oxide, and being easy to fall off tungsten nitride layer 13, to protect
Product quality is demonstrate,proved.Simultaneously as eliminating copper oxide, therefore the resistance in copper interconnection structure can be made to reduce significantly.
Another embodiment of the utility model provides a kind of semiconductor structure, comprising:
Substrate 2 has hole or groove；
Tungsten nitride layer 13, the tungsten nitride layer 13 cover described hole or trenched side-wall and bottom, described hole or groove
Side wall upper part, the thickness of lower sidewall and the tungsten nitride on bottom it is all the same；
Metal layer 14, the metal layer 14 cover the tungsten nitride layer 13 and fill up described hole or groove.
As shown in figure 3, the semiconductor structure of the utility model has substrate 2 and hole or groove, hole or groove has
Side wall and bottom.It is formed with tungsten nitride layer 13 in the bottom and side wall of the described hole or groove, and in described hole or ditch
Slot is completely filled with metal layer 14.
It, can due to the tungsten nitride layer 13 for using pulsed nucleation layer tungsten nitride depositing operation to be formed in present embodiment
It brings the advantage that
Tungsten nitride step coverage is excellent, metal layer 14 is adequately filled up hole or groove, therefore avoid
Generate hole；Simultaneously 13 depositing homogeneous of tungsten nitride layer and densification and have excellent barrier property and good adhesive force, make
Obtaining tungsten nitride can effectively be combined with substrate 2, and contact resistance is reduced；Relative to double-layer structure simple process, therefore improve
Production efficiency, to reduce cost of investment.
As an example, the pulsed nucleation layer tungsten nitride depositing operation is thermal atomic layer depositing operation, the pulse nucleation
Layer tungsten nitride depositing operation includes lamination circulation, when temperature is 200 to 400 DEG C, makes have the hole in the lamination circulation
The substrate 2 of hole or groove is successively exposed to B2H6、WF6、NH3Gas, and pass through thickness needed for repeating the cyclic deposition.
As an example, B described in single loop2H6Gas flow and the time be respectively 16sccm~26scmm and 0.2S
~3S, preferably 20sccm and 1.5S；The WF6Gas flow and the time be respectively 26sccm~36scmm and 0.2S~
3S, preferably 30sccm and 1.5S；The NH3Gas flow and the time be respectively 30sccm~40scmm and 0.2S~5S,
Preferably 35sccm and 4S.
Optionally, it further includes purging (purge) step that the substrate 2, which is exposed between B2H6, WF6, NH3 gas, described
Purging (purge) gas is the carrier gas.
Optionally, carrier gas can also be injected in the pulsed nucleation layer tungsten nitride depositing operation.
Argon (Ar), helium (He) or other inert gases can be used in the carrier gas.Optionally, the depth of described hole or groove
It is wide that than being 2 or more, in one example, depth-to-width ratio 10, depth-to-width ratio is 70 in another example, preferably 50.
Optionally, the tungsten nitride layer 13 with a thickness of 110 angstroms hereinafter, in one example, tungsten nitride with a thickness of 50 angstroms,
In another example tungsten nitride with a thickness of 110 angstroms.
Optionally, the metal layer 14 is tungsten layer 5.
Since tungsten has the characteristic of relatively low resistance, relatively good conformality and relatively good filling hole or groove,
Therefore it is preferable to use tungsten layers 5 for metal layer 14.
Optionally, the substrate 2 could be formed with multiple hole or grooves.
Optionally, the substrate 2 further includes metal connecting line layer 1, and described hole or groove are located on the metal connecting line layer 1
Side, and expose the metal connecting line layer 1 at least partly.In one example, the metal connecting line layer 1 is copper connecting lines layer.
After considering utility model disclosed in specification and attached drawing, those skilled in the art will be readily appreciated practical
Novel undocumented other embodiments.The objective of the application is, in the case where not departing from the objective of the utility model, contains
Cover that any change disclosed by the utility model, perhaps these changes of adaptive change, purposes or adaptive changes follow purposes
The general principle of the disclosure and including generally known common sense and conventional technological means in the art, which is not disclosed in this disclosure.It answers
The understanding, this specification and embodiment are merely exemplary, rather than are used to limit the utility model.The utility model
Real protection scope and spirit are limited only by the accompanying claims.
Claims (4)
1. a kind of semiconductor structure characterized by comprising
Substrate；
Hole or groove is located on the substrate, and described hole or groove have side wall upper part, lower sidewall and bottom；
Tungsten nitride layer is covered on the side wall upper part, lower sidewall and bottom of described hole or groove, the side of described hole or groove
The thickness of tungsten nitride on wall top, lower sidewall and bottom is all the same；
Metal layer covers the tungsten nitride layer and fills up described hole or groove.
2. semiconductor structure according to claim 1, which is characterized in that
The depth-to-width ratio of described hole or groove be 2 or more, the tungsten nitride layer with a thickness of 110 angstroms or less.
3. semiconductor structure according to claim 1 characterized by comprising
Metal connecting line layer in the substrate and described hole or lower trench and reveals the metal connecting line layer at least partly
Out.
4. semiconductor structure according to claim 3, which is characterized in that
The metal connecting line layer is copper connecting lines layer, and the metal layer is tungsten layer.
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| CN201821916113.6U CN209216958U (en) | 2018-11-19 | 2018-11-19 | A kind of semiconductor structure |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110797300A (en) * | 2019-10-21 | 2020-02-14 | 长江存储科技有限责任公司 | Filling method of metal tungsten |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110797300A (en) * | 2019-10-21 | 2020-02-14 | 长江存储科技有限责任公司 | Filling method of metal tungsten |
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