CN209170530U - A kind of received high-frequency tuner of support ultra high-definition signal of PLL technology single-chip - Google Patents
A kind of received high-frequency tuner of support ultra high-definition signal of PLL technology single-chip Download PDFInfo
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- CN209170530U CN209170530U CN201821614791.7U CN201821614791U CN209170530U CN 209170530 U CN209170530 U CN 209170530U CN 201821614791 U CN201821614791 U CN 201821614791U CN 209170530 U CN209170530 U CN 209170530U
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Abstract
The utility model discloses a kind of received high-frequency tuners of support ultra high-definition signal of PLL technology single-chip, belong to high-frequency tuner field, a kind of received high-frequency tuner of support ultra high-definition signal of PLL technology single-chip, including signal receiving antenna, signal receiving antenna includes two signal output ends, the side of signal receiving antenna is equipped with the low-noise amplifier with two branches, two branches of low-noise amplifier are connect with two signal output ends respectively, the side of low-noise amplifier is equipped with Low-Power CMOS integrated circuit, it is connect with Low-Power CMOS integrated circuit on the branch output end of two-way low-noise amplifier, bandpass filter is respectively connected between two branches of low-noise amplifier and Low-Power CMOS integrated circuit, it is stronger that anti-interference ability may be implemented, optimize configuration, it is easy to Occupied space and ease of assembly are saved, is easy to make frequency stabilization.
Description
Technical field
The utility model relates to high-frequency tuner field, the support more specifically to a kind of PLL technology single-chip is super
The received high-frequency tuner of high-definition signal.
Background technique
High-frequency tuner is made of High Amplifier Circuit, local oscillation and frequency mixer, is encapsulated in one with a metal shielding box
It rises, constitutes an independent device.Its effect be exactly the high-frequency TV signal that receives antenna selected, amplified,
Frequency conversion, the TV signal for exporting fixed intermediate frequency, wherein vision intermediate frequency is 38MHz, sound frequency 31.5MHz.
High-frequency tuner can be divided into mechanical tuning and electronic tuning two major classes, present TV according to the difference of tuning manner
Machine is all made of electronic tuning mode.Electronic tuning unit uses variod tuning, and switching diode carries out frequency range conversion, has
The features such as tuning is convenient, without mechanical contact, integration, miniaturization, performance is substantially better than mechanical tuner.
Most of two, four output high-frequency tuners are using dual chip or harmonic oscillator frequency modulation scheme, PCB plate suqare at present
Greatly, it is routed cumbersome；Product poor anti jamming capability receives jitter.This product uses single-chip PLLIC, improves integrated
Degree improves production efficiency and production first-pass yield, simplifies the assembling flow path of product.
Utility model content
1. technical problems to be solved
Aiming at the problems existing in the prior art, the purpose of this utility model is to provide a kind of PLL technology single-chips
Support the received high-frequency tuner of ultra high-definition signal, it is stronger that it may be implemented anti-interference ability, optimizes configuration, is easy to save
Occupied space and ease of assembly are saved, is easy to make frequency stabilization.
2. technical solution
To solve the above problems, the utility model adopts the following technical scheme.
A kind of received high-frequency tuner of support ultra high-definition signal of PLL technology single-chip, including signal receiving antenna, institute
Stating signal receiving antenna includes two signal output ends, and the side of the signal receiving antenna is equipped with the low noise with two branches
Two branches of acoustic amplifier, the low-noise amplifier are connect with two signal output ends respectively, the low-noise amplifier
Side be equipped with Low-Power CMOS integrated circuit, two branches of the low-noise amplifier with Low-Power CMOS integrated circuit
Two branch road of connection, the low-noise amplifier is respectively connected with the bandpass filtering to match with Low-Power CMOS integrated circuit
Device, the Low-Power CMOS integrated circuit include two radio frequency connecting respectively with two branches of low-noise amplifier amplifications
Device, the output end of two radio frequency amplifiers are in series with mixer, are connected with voltage controlled oscillation between two mixers
Device is connected with phase-locked loop chip on the voltage controlled oscillator, and the output end of the mixer is connected with four output translators, described
It is respectively connected with intermediate frequency amplifier on each output end of four output translators, optimizes configuration, is easy to save occupied space
And ease of assembly, it is easy to make frequency stabilization.
Further, there are two field effect transistors for two branch road series connection of the low-noise amplifier, are easy to put
The signal received greatly.
Further, it is respectively connected with signal receiver on four output ends of four output translator, the signal connects
It receives and is connected with TV on the output end of device, the signal for being easy to receive is transferred on four TVs, and user is made to can be used four kinds
Input signal is without interfering with each other.
Further, mounting shell, the low-noise amplifier and Low-Power CMOS are connected on the signal receiving antenna
Integrated circuit is mounted in mounting shell, is easy to combine all parts, is saved space, is easy to protect all parts.
3. beneficial effect
Compared with the prior art, utility model has the advantages that
(1) this programme anti-interference ability is stronger, optimizes configuration, is easy to save occupied space and ease of assembly, easily
In making frequency stabilization.
(2) two branch road series connection of low-noise amplifier is easy to what amplification received there are two field effect transistor
Signal.
Signal receiver is respectively connected on four output ends of (3) four output translators, on the output end of signal receiver
Be connected with TV, the signal for being easy to receive is transferred on four TVs, make user can be used four kinds of input signals without
It interferes with each other.
(4) mounting shell is connected on signal receiving antenna, low-noise amplifier and Low-Power CMOS integrated circuit are mounted on
In mounting shell, it is easy to combine all parts, saves space, be easy to protect all parts.
Detailed description of the invention
Fig. 1 is the circuit diagram of the utility model；
Fig. 2 is the entity apparatus connection figure of the utility model；
Fig. 3 is the circuit connection diagram of the Low-Power CMOS integrated circuit of the utility model；
The structural schematic diagram of second output branch in Fig. 4 Fig. 3.
Figure label explanation:
1 signal receiving antenna, 2 low-noise amplifiers, 3 bandpass filters, 4 Low-Power CMOS integrated circuits, 401 voltage-controlled vibrations
Swing device, 402 radio frequency amplifiers, 403 phase-locked loop chips, 404 mixers, 405 intermediate frequency amplifiers, 406 4 output translators, 5 letters
Number receiver, 6 TVs, 7 mounting shells.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe；Obviously, the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment, based on the embodiments of the present invention, those of ordinary skill in the art are without making creative work
Every other embodiment obtained, fall within the protection scope of the utility model.
In the description of the present invention, it should be noted that term " on ", "lower", "inner", "outside", " top/bottom end " etc.
The orientation or positional relationship of instruction is to be based on the orientation or positional relationship shown in the drawings, and is merely for convenience of description the utility model
It is described with simplifying, rather than the device or element of indication or suggestion meaning must have a particular orientation, with specific orientation structure
It makes and operates, therefore should not be understood as limiting the present invention.In addition, term " first ", " second " are only used for description mesh
, it is not understood to indicate or imply relative importance.
In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, term " is pacified
Dress ", " being provided with ", " be arranged/connect ", " connection " etc., shall be understood in a broad sense, such as " connection ", may be a fixed connection, can also be with
It is to be detachably connected, or be integrally connected；It can be mechanical connection, be also possible to be electrically connected；It can be directly connected, it can also be with
Indirectly connected through an intermediary, it can be the connection inside two elements.For the ordinary skill in the art, may be used
The concrete meaning of above-mentioned term in the present invention is understood with concrete condition.
Embodiment 1:
Please refer to Fig. 1-4, a kind of received high-frequency tuner of support ultra high-definition signal of PLL technology single-chip, including letter
Number receiving antenna 1, signal receiving antenna 1 include two signal output ends, and the side of signal receiving antenna 1, which is equipped with, has two
The low-noise amplifier 2 of branch, there are two field effect transistor, low noises for two branch road series connection of low-noise amplifier 2
Amplifier 2 is used for amplified signal, and there is low-noise amplifier 2 itself very low noise coefficient putting received signal
It is not easy to be disturbed when big, two branches of low-noise amplifier 2 are connect with two signal output ends respectively, low-noise amplifier 2
Side be equipped with Low-Power CMOS integrated circuit 4, Low-Power CMOS integrated circuit 4 include two respectively with low-noise amplifier 2
The connection of two branches radio frequency amplifier 402, the output end of two radio frequency amplifiers 402 is in series with mixer 404, mixes
Device 404 is used to for the signal of multi-frequency being mixed to form the radiofrequency signal in broadband all the way, is connected with pressure between two mixers 404
Oscillator 401 is controlled, voltage controlled oscillator 401 is used for frequency tuning, and voltage controlled oscillator 401 is compared with common local oscillator, in resonant tank
In had more automatically controlled device, such as varactor, to guarantee the stability of circuit operating point and Q value, on voltage controlled oscillator 401
It is connected with phase-locked loop chip 403, the output end of mixer 404 is connected with four output translators 406, four output translators 406
It is respectively connected with intermediate frequency amplifier 405 on each output end, is easy to make the local frequency of the present apparatus more stable, different function element
It combines, keeps wiring simple, be easy to save space, be respectively connected with signal on four output ends of four output translators 406
Receiver 5 please refers to Fig. 1 and Fig. 3, and four output ends of four output translators 406 are respectively IFout1, IFout2, IFout3
And IFout4, TV 6 is connected on the output end of signal receiver 5, and the signal for being easy to receive is transferred to four TVs 5
On, make user can be used four kinds of input signals without interfering with each other, two branch output ends of low-noise amplifier 2 with it is low
Power consumption CMOS integrated circuit 4 connects, and 2 two branch roads of low-noise amplifier are respectively connected with and 4 phase of Low-Power CMOS integrated circuit
Matched bandpass filter 3, bandpass filter 3 are that the wave of a permission special frequency channel passes through while shielding setting for other frequency ranges
Standby, for bandpass filter 3 for removing interference signal, anti-interference ability is stronger, integrates IC using single-chip PLL, improves integrated
Degree, is easy to save occupied space and ease of assembly, is easy to make frequency stabilization, mounting shell 7 is connected on signal receiving antenna 1, low
Noise amplifier 2 and Low-Power CMOS integrated circuit 4 are mounted in mounting shell 7, are easy to combine all parts, are saved
Space is easy to protect all parts.
In use, signal receiving antenna 1 passes to low-noise amplifier 2 after receiving signal, low-noise amplifier 2 will be believed
Bandpass filter 3 is passed to after number amplification, and bandpass filter 3 will pass to low after the filtering of the interference signal in the signal received
Power consumption CMOS integrated circuit 4, Low-Power CMOS integrated circuit 4 are sent after handling signal by four output translators 406
To different signal receivers 5, signal receiver 5 passes to corresponding TV 6 after receiving signal.
The preferable specific embodiment of the above, only the utility model；But the protection scope of the utility model is not
It is confined to this.Anyone skilled in the art is within the technical scope disclosed by the utility model, practical according to this
Novel technical solution and its improvement design is subject to equivalent substitution or change, should all cover in the protection scope of the utility model
It is interior.
Claims (4)
1. a kind of received high-frequency tuner of support ultra high-definition signal of PLL technology single-chip, including signal receiving antenna (1),
It is characterized by: the signal receiving antenna (1) includes two signal output ends, the side of the signal receiving antenna (1) is set
There is the low-noise amplifier (2) with two branches, two branches of the low-noise amplifier (2) are defeated with two signals respectively
The side of outlet connection, the low-noise amplifier (2) is equipped with Low-Power CMOS integrated circuit (4), the low-noise amplifier
(2) two branches are connect with Low-Power CMOS integrated circuit (4), and two branch road of the low-noise amplifier (2) is equal
It is connected with the bandpass filter (3) to match with Low-Power CMOS integrated circuit (4), the Low-Power CMOS integrated circuit (4)
The radio frequency amplifier (402) being connect respectively with two branches of low-noise amplifier (2) including two, two radio frequency amplifications
The output end of device (402) is in series with mixer (404), is connected with voltage controlled oscillator between two mixers (404)
(401), it is connected with phase-locked loop chip (403) on the voltage controlled oscillator (401), the output end connection of the mixer (404)
Have four output translators (406), is respectively connected with intermediate frequency amplifier on each output end of four output translator (406)
(405)。
2. a kind of received high-frequency tuner of support ultra high-definition signal of PLL technology single-chip according to claim 1,
Be characterized in that: there are two field effect transistors for two branch road series connection of the low-noise amplifier (2).
3. a kind of received high-frequency tuner of support ultra high-definition signal of PLL technology single-chip according to claim 1,
It is characterized in that: being respectively connected with signal receiver (5) on four output ends of four output translator (406), the signal connects
It receives and is connected with TV (6) on the output end of device (5).
4. a kind of received high-frequency tuner of support ultra high-definition signal of PLL technology single-chip according to claim 1,
It is characterized in that: being connected with mounting shell (7) on the signal receiving antenna (1), the low-noise amplifier (2) and Low-Power CMOS
Integrated circuit (4) is installed in mounting shell (7).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821614791.7U CN209170530U (en) | 2018-09-30 | 2018-09-30 | A kind of received high-frequency tuner of support ultra high-definition signal of PLL technology single-chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821614791.7U CN209170530U (en) | 2018-09-30 | 2018-09-30 | A kind of received high-frequency tuner of support ultra high-definition signal of PLL technology single-chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209170530U true CN209170530U (en) | 2019-07-26 |
Family
ID=67332880
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821614791.7U Expired - Fee Related CN209170530U (en) | 2018-09-30 | 2018-09-30 | A kind of received high-frequency tuner of support ultra high-definition signal of PLL technology single-chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209170530U (en) |
-
2018
- 2018-09-30 CN CN201821614791.7U patent/CN209170530U/en not_active Expired - Fee Related
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| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20190726 |
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| CF01 | Termination of patent right due to non-payment of annual fee |