CN106656227B

CN106656227B - 3-18 GHz microwave receiving front end

Info

Publication number: CN106656227B
Application number: CN201510710619.6A
Authority: CN
Inventors: 方涌; 李希密; 韦炜
Original assignee: Yangzhou Haike Electronic Technology Co ltd
Current assignee: Yangzhou Haike Electronic Technology Co ltd
Priority date: 2015-10-28
Filing date: 2015-10-28
Publication date: 2020-04-28
Anticipated expiration: 2035-10-28
Also published as: CN106656227A

Abstract

The invention provides a microwave receiving front end, which comprises an amplitude limiter, a sensitivity selector, a preselection filter, a mixing circuit, an intermediate frequency circuit and a local oscillator; the input signal is received by the antenna and enters the amplitude limiter, and the amplitude limiter limits the amplitude of the large signal to prevent the receiver from being burnt; the signal is input to a sensitivity selector after passing through an amplitude limiter, the sensitivity selector performs gain selection according to the signal intensity, and selects an amplification or direct connection state to improve the dynamic range of the receiver; the signal is input to a preselection filter after being selected by the sensitivity, and the preselection filter filters the image frequency signal; the signal is sent into a frequency mixing circuit after passing through a preselection filter, and is subjected to down-conversion with a local oscillator signal to be converted into an intermediate frequency signal; the intermediate frequency circuit amplifies the intermediate frequency signal, filters out radio frequency and local oscillation signals, and provides required intermediate frequency bandwidth. The invention has small volume, light weight and low power consumption.

Description

3-18 GHz microwave receiving front end

Technical Field

The invention belongs to the technical field of electronic warfare and wireless spectrum monitoring, and particularly relates to a handheld subminiature low-power-consumption 3-18 GHz microwave receiving front end.

Background

A handheld 3-18 GHz microwave receiving front end is an electronic component mainly used in electronic system equipment such as electronic countermeasure and wireless spectrum monitoring. At present, a scheme of converting frequency to intermediate frequency is adopted at the front end of 3-18 GHz microwave receiving. 3-18 GHz microwave receiving front end needs a preselection filter to carry out image frequency suppression; in order to meet the index requirement of image frequency suppression of 60dBc, the existing preselection filter adopts a cavity filter, and the cavity filter is large in size and heavy in weight. A superheterodyne receiver is adopted for frequency conversion of a 3-18 GHz microwave receiving front end, the local oscillation bandwidth is required to be consistent with the signal bandwidth, and a local oscillation circuit is complex, high in power consumption and large in size.

Disclosure of Invention

The invention aims to provide a handheld 3-18 GHz microwave receiving front end which is small in size, light in weight and low in power consumption, a frequency conversion circuit is optimized, a pre-selection filter can adopt an MEMS filter, and the size and the weight are effectively reduced; the frequency conversion local oscillator adopts high and low local oscillators, and a local oscillator circuit is simplified to the utmost extent, so that the power consumption and the volume are greatly reduced.

In order to solve the technical problem, the invention provides a 3-18 GHz microwave receiving front end, which comprises an amplitude limiter, a sensitivity selector, a preselection filter, a mixing circuit, an intermediate frequency circuit and a local oscillator; the input signal is received by the antenna and enters the amplitude limiter, and the amplitude limiter limits the amplitude of the large signal to prevent the receiver from being burnt; the signal is input to a sensitivity selector after passing through an amplitude limiter, the sensitivity selector performs gain selection according to the signal intensity, and selects an amplification or direct connection state to improve the dynamic range of the receiver; the signal is input to a preselection filter after being selected by the sensitivity, and the preselection filter filters the image frequency signal; the signal is sent into a frequency mixing circuit after passing through a preselection filter, and is subjected to down-conversion with a local oscillator signal to be converted into an intermediate frequency signal; the intermediate frequency circuit amplifies the intermediate frequency signal, filters out radio frequency and local oscillation signals, and provides required intermediate frequency bandwidth.

Further, the limiter uses a crop single sheet.

Further, the preselection filter employs a MEMS filter.

Furthermore, the mixing circuit consists of an amplifier, an equalizer and a mixer; the amplifier amplifies the signal to a required level, and the equalizer compensates the amplitude-frequency characteristic of the signal; the equalizer is made of a matching type equalizing circuit and a ceramic substrate, so that the size is effectively reduced, the circuit matching is improved, and equalized signals are sent into the frequency mixer to be subjected to down-conversion with local oscillation signals to be converted into intermediate-frequency signals.

Further, the equalizer is manufactured on the ceramic substrate by adopting a thin film circuit process.

Further, a high-low local oscillator circuit is adopted for providing signals required by down-conversion to an intermediate frequency, a fractional frequency division single-ring phase-locked circuit is adopted for directly generating 10-20 GHz signals, and a frequency division circuit is adopted for expansion below 10G.

Compared with the prior art, the invention has the obvious advantages that (1) the preselection filter adopts an MEMS filter, thereby greatly reducing the volume and the weight; (2) the local oscillator adopts high and low local oscillators, the circuit design is simple, and only a decimal frequency division phase-locked loop of 10-20 GHz is required to be designed, so that the power consumption and the weight are effectively reduced; (3) the equalizing circuit is a matched equalizing circuit and is made of a ceramic substrate, so that the input and output standing waves are good, and the size is small.

Drawings

FIG. 1 is a block diagram of a circuit structure of a 3-18 GHz microwave receiving front end of the invention.

Fig. 2 is a circuit block diagram of the local oscillator of the present invention.

Fig. 3 is a circuit block diagram of the sensitivity selector of the present invention.

Fig. 4 is a block diagram of an intermediate frequency circuit of the present invention.

Detailed Description

It is easily understood that, according to the technical solution of the present invention, a person skilled in the art can imagine various embodiments of the 3-18 GHz microwave receiving front end of the present invention without changing the spirit of the present invention. Therefore, the following detailed description and the accompanying drawings are merely illustrative of the technical aspects of the present invention, and should not be construed as all of the present invention or as limitations or limitations on the technical aspects of the present invention.

With reference to fig. 1 and 2, the 3-18 GHz microwave receiving front end of the invention comprises an amplitude limiter, a sensitivity selector, a preselection filter, a mixing circuit, an intermediate frequency circuit and a local oscillator. The intermediate frequency output frequency is 2.37GHz, and the bandwidth is 22 MHz. The main technical indicators are as follows: 1. minimum frequency resolution of less than 10 MHz; 2. the noise coefficient is less than or equal to 9 dB; 3. inputting a third-order intercept point IIP3 which is more than or equal to-10 dBm; 4. inputting a second-order intercept point which is more than or equal to 40 dBm; 5. the intermediate frequency suppression is more than or equal to 60 dB; 6. the image frequency inhibition is more than or equal to 60 dB; 7. phase noise (typical value) is less than or equal to-75 dBc/Hz @1kHz, less than or equal to-75 dBc/Hz @10kHz, and less than or equal to-75 dBc/Hz @100 kHz; 8. the frequency conversion time is less than or equal to 1 ms; 9. the gain is 20 +/-3 dB; 10. a 31dB attenuator is arranged in the device, and the stepping is 1 dB; 11. using an external standard frequency: 57.344MHz, 0 dBm; 12. maximum burnout resistance: 1W; 13. the power supply mode comprises the following steps: DC: +24.5V, +5.5V and-5.5V; 14. power consumption: less than or equal to 6.0W; 15. the external dimension is as follows: length 150mm x (width) 100mm x (height) 25 mm; 16. weight: less than or equal to 0.55 kg;

referring to fig. 2, the local oscillator frequency is 5.37-16.62GHz, the step is 7.168M, the typical value of phase noise is 75dBc/Hz @1kHz, the spur is less than 55dBc, the output power is greater than 13dBm, and the frequency hopping time is less than 1 mS. The reference frequency is the external input 57.344M and the Phase Locked Loop (PLL) chip is the ADI serial bus fractional-n PLL ADF 4156. Phase noise, frequency stepping and frequency hopping time are well considered. The VCO uses a 10-20 GHz monolithic MMIC, a microstrip power divider directly integrated on a microwave board divides the VCO into two paths, one path is divided by four-frequency division ADF5001 and phase-discriminated to ADF4156, the ADF4156 outputs phase-discriminated current, a third-order active filter composed of a rail-to-rail operational amplifier OP284 is converted into error voltage, and the VCO is locked within the frequency of 10-20 GHz. The other path of output is selected two states by a single-pole double-throw switch HMC547LP3, one state is that the two states pass through the frequency-halving ADF5000 to generate a local frequency of 5-10 GHz, and the other path of output is that the local frequency of 10-20 GHz passes through. Then amplified to the required local oscillator power by a1, a2 gallium arsenide (GaAS) monolithic HMC 462. And by adopting a reflow soldering and micro-assembly mixed process, the volume is effectively reduced. The size of the whole local oscillator is 100X21mm, and the power consumption is only 1.4 watts.

The amplitude limiter adopts a crop single sheet with small volume. As shown in FIG. 3, the sensitivity selector is divided into three paths by a single chip switch MASW-003102 and 13590, and one path is amplified by a two-stage low-noise amplifier HMC462 to improve the receiving sensitivity. One path is straight-through, and the other path is connected with a 14-18 GHz band-pass filter in order to meet the IP2 index due to the poor linearity of a frequency high-end device.

The preselection filter uses a monolithic MMIC eight-way switch, and the filter uses an MEMS filter. For better shielding, the preselection filter is assembled in a box body by a micro-assembly process, the size is 73X73.5X11.5mm, and the power consumption is 1.265 watts. The image frequency suppression reaches 60dBc, and the frequency division and suppression requirements of the filter are shown in the following table:

the equalizer is designed to be matched and balanced and consists of three resistors and three resonant loops, so that input and output standing waves are good, and interstage matching is improved. The whole circuit unit is manufactured on the ceramic substrate by adopting a thin film circuit process. The circuit size is effectively reduced.

Referring to fig. 4, the if circuit is first filtered by a low pass (U1) to suppress the rf and lo signals; after amplification by the amplifier A1, the intermediate frequency bandwidth is selected by a band-pass filter (U2); ATT1 is attenuator with 31dB attenuation and 1dB step, and low-pass filtering (U3) filters the parasitic passband of the band-pass filter; amplified to the required gain by a2, and a band-pass filter (U4) filters out harmonics and meets the required out-of-band rejection criteria for the receiver. The size of the intermediate frequency circuit is 46X37mm, and the power consumption is only 0.726 watt.

Claims

1. A3-18 GHz microwave receiving front end is characterized by comprising an amplitude limiter, a sensitivity selector, a preselection filter, a mixing circuit, an intermediate frequency circuit and a local oscillator;

the input signal is received by an antenna and enters an amplitude limiter, and the amplitude limiter limits the amplitude of a large signal;

the signal is input to a sensitivity selector after passing through an amplitude limiter, and the sensitivity selector performs gain selection according to the signal intensity and selects an amplification or direct-connection state;

the signal is input to a preselection filter after being selected by the sensitivity, and the preselection filter filters the image frequency signal;

the signal is sent into a frequency mixing circuit after passing through a preselection filter, and is subjected to down-conversion with a local oscillator signal to be converted into an intermediate frequency signal;

the intermediate frequency circuit amplifies the intermediate frequency signal, filters out radio frequency and local oscillation signals, and provides the required intermediate frequency bandwidth;

the amplitude limiter adopts single gallium arsenide sheets;

the preselection filter adopts an MEMS filter;

the mixing circuit consists of an amplifier, an equalizer and a mixer; the amplifier amplifies the signal to a required level, and the equalizer compensates the amplitude-frequency characteristic of the signal; sending the equalized signal into a frequency mixer to perform down-conversion with a local oscillator signal;

the equalizer is made of a ceramic substrate by adopting a matching type equalizing circuit;

the equalizer is manufactured on the ceramic substrate by adopting a thin film circuit process;

the local oscillator adopts a high and low local oscillator circuit to provide signals required by down-conversion to an intermediate frequency, a single-ring phase-locked circuit with fractional frequency division is adopted to directly generate 10-20 GHz signals, and a frequency division circuit is adopted to expand below 10 GHz.