CN209120520U - A kind of acousto-optic controlled circuit - Google Patents
A kind of acousto-optic controlled circuit Download PDFInfo
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- CN209120520U CN209120520U CN201821422929.3U CN201821422929U CN209120520U CN 209120520 U CN209120520 U CN 209120520U CN 201821422929 U CN201821422929 U CN 201821422929U CN 209120520 U CN209120520 U CN 209120520U
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Abstract
The utility model relates to control technology field, specially a kind of acousto-optic controlled circuit, including sound detection circuit, optical detection circuit, logic unit, oscillator, timer, driving circuit, reference circuit；Sound detection circuit is for detecting voice signal, the output end of the sound detection circuit and the first input end of logic unit and the connection of the second input terminal；Optical detection circuit is connected for detecting optical signal, the output end of the optical detection circuit and the third input terminal of logic unit；The output end of oscillator and the input terminal of timer connect；The output end of timer and the 4th input terminal of logic unit connect；The output end of logic unit and the input terminal of driving circuit connect；Driving circuit is connect with by control device；Reference circuit provides reference voltage and internal electric source for system；Acousto-optic controlled circuit described in the utility model, peripheral circuit structure is simple, has many advantages, such as that at low cost, stand-by power consumption is small.
Description
Technical field
The utility model relates to control technology field, specially a kind of acousto-optic controlled circuit.
Background technique
Other components are built existing acousto-optic controlled circuit generally with 4 tunnel, 2 input nand gate logic chip,
Structure is complicated for peripheral circuit, and circuit cost is high, and stand-by power consumption is big, is unfavorable for promoting and applying.
Utility model content
For the problems of the prior art, the utility model provides the simple acousto-optic controlled circuit of structure.
To realize the above technical purpose, the technical solution of the utility model is:
A kind of acousto-optic controlled circuit, including sound detection circuit, optical detection circuit, logic unit, oscillator, timer, drive
Dynamic circuit, reference circuit；
The sound detection circuit for detecting voice signal, the output end of the sound detection circuit and logic unit
First input end and the connection of the second input terminal；
For the optical detection circuit for detecting optical signal, the output end of the optical detection circuit and the third of logic unit are defeated
Enter end connection；
The output end of the oscillator and the input terminal of timer connect；
The output end of the timer and the 4th input terminal of logic unit connect；
The output end of the logic unit and the input terminal of driving circuit connect；
The driving circuit is connect with by control device；
The reference circuit provides reference voltage and internal electric source for system.
Preferably, the reference circuit includes BGP circuit and operational amplifier, the BGP circuit is for generating benchmark
Voltage, including the first output end, second output terminal, third output end, the 4th output end, the 5th output end, five output ends point
Five kinds of reference voltages are indescribably supplied, the first output end of the BGP circuit and the positive input terminal of operational amplifier connect, the operation
The output end of amplifier connect with the negative input end of its own and as VDDAUX signal end.
Preferably, the sound detection circuit includes pickup circuit, band-pass filter amplifier, first comparator and second
Comparator, the output end of the pickup circuit and the input terminal of band-pass filter amplifier connect, the band-pass filter amplifier
Output end is connect with the inverting input terminal of first comparator respectively, the non-inverting input terminal of the second comparator connects, first ratio
It being connected compared with the non-inverting input terminal of device and the second output terminal of reference circuit, the first input end of output end and logic unit connects,
The second of the inverting input terminal of second comparator and the 4th output end connection of reference circuit, output end and logic unit is defeated
Enter end connection.
Preferably, the pickup circuit includes sound transducer, resistance R9, capacitor C5, one end of the resistance R9 with
The connection of VDDAUX signal end, the other end connect with one end of the positive input terminal of sound transducer, capacitor C5 respectively and as pickups
The output end of circuit, the other end of the capacitor C5 and the negative input end of sound transducer are grounded；The bandpass filtering amplification
Device include resistance R0, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8, capacitor C0,
It is filtered as band logical one end of capacitor C1, capacitor C2, capacitor C3, capacitor C4, the first amplifier and the second amplifier, the resistance R0
The input terminal of twt amplifier is connect with the output end of pickup circuit, other end one end with one end of resistance R1, capacitor CO respectively
Connection, the other end of the resistance R1 are connect with one end of one end of capacitor C1, capacitor C2 respectively, the other end of the capacitor C2
Connect respectively with the positive input terminal of one end of resistance R2, the first amplifier, the negative input end of first amplifier respectively with electricity
One end of R5, one end connection of resistance R6 are hindered, output end is connect with one end of the other end of resistance R5, capacitor C3 respectively, described
The other end of capacitor C3 is connect with the positive input terminal of one end of resistance R3, the second amplifier respectively, and second amplifier is born
Input terminal is connect with one end of one end of resistance R7, resistance R8 respectively, output end respectively with the other end of resistance R7, capacitor C4
One end connection, the other end of the capacitor C4 is connect with one end of resistance R4 and the output end as band-pass filter amplifier,
The third output end of the other end of the resistance R4 and reference circuit connects, the other end of the capacitor C0, capacitor C1 it is another
End, the other end of resistance R2, the other end of resistance R6, the other end of resistance R3, resistance R8 the other end be grounded.
Preferably, the optical detection circuit includes photo resistance, photo resistance detection circuit and third comparator, it is described
The output end of photo resistance is connect with the input terminal of photo resistance detection circuit, the output end of the photo resistance detection circuit with
The inverting input terminal of third comparator connects, and the non-inverting input terminal of the third comparator and the 5th output end of reference circuit connect
It connects, the third input terminal connection of output end and logic unit.
Preferably, one end of the photo resistance is grounded, output end of the other end as photo resistance；The photosensitive electricity
Resistance detection circuit includes current source, resistance R10, resistance R11, capacitor C6 and capacitor C7, one end of the current source and external electricity
The vdd terminal in source connects, the other end with connect respectively with one end of the output end of photo resistance, capacitor R10, the resistance R10's
The other end is connect with one end of one end of capacitor C6, resistance R11 respectively, the other end of the resistance R11 and one end of capacitor C7
Connection and the output end as photo resistance detection circuit.
Preferably, the logic unit includes first and door, second and door, third and door, the first rest-set flip-flop, first
NOT gate and the second NOT gate, the described first first input end with the first input end of door as logic unit, the second input terminal work
For the second input terminal of logic unit, output end is connect with second with the first input end of door, and described second is defeated with the second of door
Enter third input terminal of the end as logic unit, output end is connect with the first input end of third and door, the third and door
Second input terminal as logic unit the 4th input terminal and connect with the output end of the end CLR of the first rest-set flip-flop, timer,
Output end is connect with the end CP of the first rest-set flip-flop, and the S input terminal of first rest-set flip-flop sets high level, Q output and
The input terminal of one NOT gate connects, and the output end of first NOT gate is connect with the input terminal of the second NOT gate, second NOT gate
Output end of the output end as logic unit.
Preferably, the oscillator includes resistance R12, resistance R13, resistance R14, resistance R15, capacitor C8, PMOS tube
P1, NMOS tube N1, third amplifier, the 4th amplifier, the second rest-set flip-flop and third NOT gate, one end of the resistance R12 with
The vdd terminal of external power supply connects, and the other end is connect with the negative input end of one end of resistance R13, third amplifier respectively, described
The other end of resistance R13 is connect with the positive input terminal of one end of resistance R14, the 4th amplifier respectively, the third amplifier
Positive input terminal is connect with one end of the negative input end of the 4th amplifier, one end of capacitor C8, capacitor R15 respectively, output end and
The S input terminal of two rest-set flip-flops connects, and the output end of the 4th amplifier is connect with the R input of the second rest-set flip-flop, institute
The other end for stating resistance R15 is connect with the drain electrode of PMOS tube P1, the drain electrode of NMOS tube N1 respectively, the source electrode of the PMOS tube P1
Connect with the vdd terminal of external power supply, grid respectively with the grid of NMOS tube N1, second rest-set flip-flopOutput end connection, institute
The Q output for stating the second rest-set flip-flop is connect with the input terminal of third NOT gate, and the output end of the third NOT gate is as oscillator
Output end, the other end of the resistance R14, the other end of capacitor C8, NMOS tube N1 source grounding.
Preferably, the timer includes 22 two-dividers and 22 two-dividers successively cascade, first two points
Input terminal of the input terminal of frequency device as timer, output end of the output end of the last one two-divider as timer.
Preferably, the driving circuit include the 4th with door, the 5th with door, the 4th NOT gate, the 5th NOT gate, the 6th non-
Door, the 7th NOT gate, the 8th NOT gate, the 9th NOT gate, the tenth NOT gate, the 11st NOT gate, the 12nd NOT gate, PMOS tube P2 and NMOS tube
N2, the described 4th connect with the first input end of door with the input terminal of the 4th NOT gate and the input terminal as driving circuit, and second
Input terminal is connect with the input terminal of the output end of the tenth NOT gate, the 11st NOT gate respectively, the input terminal of output end and the 5th NOT gate
Connection, the output end of the 4th NOT gate connect with the 5th with the second input terminal of door, the described 5th and door first input end
It is connect respectively with the input terminal of the output end of the 6th NOT gate, the 7th NOT gate, output end is connect with the input terminal of the 9th NOT gate, described
The output end of 5th NOT gate is connect with the input terminal of the 6th NOT gate, the output end of the 7th NOT gate and the input terminal of the 8th NOT gate
Connection, the output end of the 9th NOT gate are connect with the input terminal of the tenth NOT gate, the output end and the tenth of the 11st NOT gate
The input terminals of two NOT gates connects, and the grid of the PMOS tube P2 is connect with the output end of the 8th NOT gate, source electrode and external power supply
Vdd terminal connection, drain electrode connection of the drain electrode with NMOS tube N2 and the signal output end as driving circuit, the grid of the NMOS tube N2
Pole is connect with the output end of the 12nd NOT gate, source electrode ground connection.
From the above, it can be seen that the utility model has following advantages: acousto-optic controlled circuit described in the utility model,
Its peripheral circuit structure is simple, has many advantages, such as that at low cost, stand-by power consumption is small.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the utility model；
Fig. 2 is the structural schematic diagram of the utility model reference circuit；
Fig. 3 is the structural schematic diagram of BGP circuit in the utility model reference circuit；
Fig. 4 is the structural schematic diagram of the utility model sound detection circuit；
Fig. 5 is the structural schematic diagram of the utility model optical detection circuit；
Fig. 6 is the structural schematic diagram of the utility model logic unit；
Fig. 7 is the structural schematic diagram of the utility model oscillator；
Fig. 8 is the structural schematic diagram of the utility model timer；
Fig. 9 is the structural schematic diagram of the utility model driving circuit.
Specific embodiment
In conjunction with Fig. 1, a specific embodiment of the utility model is described in detail, but not to the claim of the utility model
Do any restriction.
As shown in Figure 1, a kind of acousto-optic controlled circuit, including sound detection circuit, optical detection circuit, logic unit, oscillator,
Timer, driving circuit, reference circuit；Sound detection circuit is for detecting voice signal, the output of the sound detection circuit
End is connect with the first input end of logic unit and the second input terminal；Optical detection circuit is for detecting optical signal, the light detection
The output end of circuit and the third input terminal of logic unit connect；The output end of oscillator and the input terminal of timer connect；Meter
When device output end and logic unit the 4th input terminal connect；The output end of logic unit and the input terminal of driving circuit connect
It connects；Driving circuit with by control device (such as silicon-controlled, triode)；Reference circuit provides reference voltage and inside electricity for system
Source.
Refinement is carried out to above-mentioned technical proposal, specific as follows:
As shown in Fig. 2, reference circuit includes BGP circuit (i.e. band-gap reference circuit) and operational amplifier, BGP circuit is used
In generating reference voltage, including the first output end, second output terminal, third output end, the 4th output end, the 5th output end, five
A output end provides five kinds of reference voltages respectively, and the first output end of BGP circuit and the positive input terminal of operational amplifier connect, fortune
The output end for calculating amplifier is connect and as VDDAUX signal end with the negative input end of its own.Wherein BGP circuit is common electricity
Road, details are not described herein for structure design, may refer to structure as shown in Figure 3, left side circuit is start-up circuit in Fig. 3, right
Lateral circuit is band-gap reference voltage circuit.
As shown in figure 4, sound detection circuit includes pickup circuit, band-pass filter amplifier, first comparator and the second ratio
Compared with device, the output end of pickup circuit and the input terminal of band-pass filter amplifier are connected, the output end difference of band-pass filter amplifier
It is connect with the inverting input terminal of first comparator, the connection of the non-inverting input terminal of the second comparator, the homophase input of first comparator
End is connect with the second output terminal of reference circuit, and the first input end of output end and logic unit connects, the second comparator it is anti-
Second input terminal of the connection of the 4th output end of phase input terminal and reference circuit, output end and logic unit connects, in which:
(1) pickup circuit includes sound transducer MIC, resistance R9, capacitor C5, one end and the VDDAUX signal of resistance R9
End connection, the other end connect with one end of the positive input terminal of sound transducer MIC, capacitor C5 respectively and as the defeated of pickup circuit
Outlet, the other end of capacitor C5 and the negative input end of sound transducer are grounded；
(2) band-pass filter amplifier includes resistance R0, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance
R6, resistance R7, resistance R8, capacitor C0, capacitor C1, capacitor C2, capacitor C3, capacitor C4, the first amplifier U1 and the second amplifier
One end of U2, resistance R0 are connect as the input terminal MICIN of band-pass filter amplifier with the output end of pickup circuit, the other end point
Do not connect with one end of one end of resistance R1, capacitor CO, the other end of resistance R1 respectively with one end of capacitor C1, capacitor C2
One end connection, the other end of the capacitor C2 are connect with the positive input terminal of one end of resistance R2, the first amplifier U1 respectively, and first
The negative input end of amplifier U1 is connect with one end of one end of resistance R5, resistance R6 respectively, and output end is another with resistance R5 respectively
One end connection of one end, capacitor C3, the other end of the capacitor C3 positive input with one end of resistance R3, the second amplifier U2 respectively
End connection, the negative input end of the second amplifier U2 connect with one end of one end of resistance R7, resistance R8 respectively, output end respectively with
One end connection of the other end, capacitor C4 of resistance R7, the other end of capacitor C4 connect with one end of resistance R4 and filter as band logical
The output end of twt amplifier, the other end of resistance R4 and the third output end of reference circuit connect, the other end, the capacitor of capacitor C0
The other end of C1, the other end of resistance R2, the other end of resistance R6, the other end of resistance R3, resistance R8 the other end be grounded.
As shown in figure 5, optical detection circuit includes photo resistance RL, photo resistance detection circuit and third comparator, it is photosensitive
The output end of resistance RL is connect with the input terminal of photo resistance detection circuit, the output end and third ratio of photo resistance detection circuit
Inverting input terminal compared with device connects, and the non-inverting input terminal of third comparator and the 5th output end of reference circuit connect, output end
It is connect with the third input terminal of logic unit, in which:
(1) one end ground connection of photo resistance RL, output end of the other end as photo resistance RL；
(2) photo resistance detection circuit includes current source I1, resistance R10, resistance R11, capacitor C6 and capacitor C7, current source
The vdd terminal of one end of I1 and external power supply connects, the other end as photo resistance detection circuit input terminal CDSIN respectively with light
One end connection of the output end of quick resistance RL, capacitor R10, the other end of resistance R10 respectively with one end of capacitor C6, resistance R11
One end connection, the other end of resistance R11 is connect with one end of capacitor C7 and the output end as photo resistance detection circuit.
As shown in fig. 6, logic unit includes first and door AND1, second and door AND2, third and door AND3, the first RS touching
Send out device, the first NOT gate NOT1 and the second NOT gate NOT2, first with the first input end of door AND1 as the first defeated of logic unit
Entering end, second input terminal of second input terminal as logic unit, output end is connect with second with the first input end of door AND2,
The second third input terminal with the second input terminal of door AND2 as logic unit, the first of output end and third and door AND3 are defeated
Enter end connection, the second input terminal of third and door AND3 as logic unit the 4th input terminal and with the first rest-set flip-flop
The output end connection at the end CLR, timer, output end are connect with the end CP of the first rest-set flip-flop, the S input terminal of the first rest-set flip-flop
High level is set, Q output is connect with the input terminal of the first NOT gate NOT1, the output end of the first NOT gate NOT1 and the second NOT gate NOT2
Input terminal connection, output end of the output end of the second NOT gate NOT2 as logic unit.
As shown in fig. 7, oscillator include resistance R12, resistance R13, resistance R14, resistance R15, capacitor C8, PMOS tube P1,
NMOS tube N1, third amplifier U3, the 4th amplifier U4, the second rest-set flip-flop and third NOT gate NOT3, one end of resistance R12 with
The vdd terminal of external power supply connects, and the other end is connect with the negative input end of one end of resistance R13, third amplifier U3 respectively, electricity
The other end of resistance R13 is connect with the positive input terminal of one end of resistance R14, the 4th amplifier U4 respectively, and third amplifier U3 is just
Input terminal is connect with one end of the negative input end of the 4th amplifier U4, one end of capacitor C8, capacitor R15 respectively, output end and
The S input terminal of two rest-set flip-flops connects, and the output end of the 4th amplifier U4 is connect with the R input of the second rest-set flip-flop, resistance
The other end of R15 is connect with the drain electrode of PMOS tube P1, the drain electrode of NMOS tube N1 respectively, the source electrode and external power supply of PMOS tube P1
Vdd terminal connection, grid connect with the Q output of the grid of NMOS tube N1, the second rest-set flip-flop respectively, the second rest-set flip-flop
Q output is connect with the input terminal of third NOT gate NOT3, output end OSC of the output end of third NOT gate NOT3 as oscillator,
The other end of resistance R14, the other end of capacitor C8, NMOS tube N1 source grounding.
As shown in figure 8, timer includes 22 two-dividers and 22 two-dividers successively cascade, first two-divider
Input terminal of the input terminal as timer, output end Timer_ of the output end of the last one two-divider as timer
OUT。
As shown in figure 9, driving circuit includes the 4th and door AND4, the 5th and door AND5, the 4th NOT gate NOT4, the 5th NOT gate
NOT5, the 6th NOT gate NOT6, the 7th NOT gate NOT7, the 8th NOT gate NOT8, the 9th NOT gate NOT9, the tenth NOT gate NOT10, the 11st
NOT gate NOT11, the 12nd NOT gate NOT12, PMOS tube P2 and NMOS tube N2, the first input end and the 4th of the 4th and door AND4
The input terminal of NOT gate NOT4 connects and the input terminal as driving circuit, the second input terminal are defeated with the tenth NOT gate NOT10 respectively
The input terminal connection of outlet, the 11st NOT gate NOT11, output end are connect with the input terminal of the 5th NOT gate NOT5, the 4th NOT gate
The output end of NOT4 is connect with the 5th with the second input terminal of door AND5, the 5th with the first input end of door AND5 respectively with the 6th
The input terminal connection of the output end of NOT gate NOT6, the 7th NOT gate NOT7, output end are connect with the input terminal of the 9th NOT gate NOT9,
The output end of 5th NOT gate NOT5 is connect with the input terminal of the 6th NOT gate NOT6, the output end of the 7th NOT gate NOT7 and the 8th non-
The input terminal connection of door NOT8, the output end of the 9th NOT gate NOT9 are connect with the input terminal of the tenth NOT gate NOT10, and the 11st is non-
The output end of door NOT11 is connect with the input terminal of the 12nd NOT gate NOT12, and the grid of PMOS tube P2 is defeated with the 8th NOT gate NOT8's
The end VDD of outlet connection, source electrode and external power supply connects, and drain electrode and the drain electrode of NMOS tube N2 connect and as driving circuit
Signal output end SCRCTRL, the grid of NMOS tube N2 are connect with the output end of the 12nd NOT gate NOT12, source electrode ground connection.
The ground on the ground and external power supply mentioned in above-mentioned technical proposal connects.
The working principle of the utility model are as follows:
The sound transducer of pickup circuit, which picks up voice signal and converts electric signal for voice signal, is output to band logical filter
Twt amplifier, band-pass filter amplifier are filtered to the signal received and are output to after amplifying first comparator and the second ratio
Compared with device, first comparator and the second comparator are compared signal, and comparison result is output to logic unit；
The photo resistance of optical detection circuit receives optical signal and is output to photo resistance electrical measurement after being translated into electric signal
Circuit, resistance R10, resistance R11, capacitor C6 and capacitor C7 constitute second-order low-pass filter, filter to the electric signal received
Third comparator is output to after wave, third comparator is compared signal, and comparison result is output to logic unit；
Oscillator is generated by RC charge and discharge, and the Q output output of second rest-set flip-flop is low when capacitor C8 voltage is relatively low
Level, R15 are connected to VDD, C8 charging, when the reference level that C8 voltage is more than amplifier U3 overturns U3, the second rest-set flip-flop
Overturning, R15 are connected to GND, and capacitor C8 starts to discharge, when C8 voltage is lower than the reference level of amplifier U4, U4 overturning, the 2nd RS
Trigger overturning, oscillator complete a cycle；
The output end OSC of oscillator is input to timer, and timer is made of 22 two-divider cascades；
Logic unit receives the ratio of the comparison result of first comparator, the comparison result of the second comparator, third comparator
Compared with the output signal of result and timer, when timer at the end of output be low level, be usually high level.Work as external environment
When becoming unglazed and having sound first and the output of door and the output of third comparator be all high level, rest-set flip-flop overturning is defeated
Become high out, DRV becomes high, and timer starts timing, and sound detection circuit and optical detection circuit are closed.
Acousto-optic controlled circuit described in the utility model can be applied to the lighting lamp control of public arena, can also be used as out
It closes to use.
In conclusion the utility model has the advantage that acousto-optic controlled circuit described in the utility model, peripheral circuit
Structure is simple, has many advantages, such as that at low cost, stand-by power consumption is small.
It is understood that being merely to illustrate the utility model above with respect to the specific descriptions of the utility model and not being
It is limited to technical solution described in the utility model embodiment.Those skilled in the art should understand that still can be with
It modifies to the utility model or equivalent replacement, to reach identical technical effect；Needs are used as long as meeting, all in this reality
Within novel protection scope.
Claims (10)
1. a kind of acousto-optic controlled circuit, it is characterised in that: including sound detection circuit, optical detection circuit, logic unit, oscillator,
Timer, driving circuit, reference circuit；
The sound detection circuit is for detecting voice signal, and the first of the output end of the sound detection circuit and logic unit
Input terminal and the connection of the second input terminal；
The optical detection circuit is for detecting optical signal, the output end of the optical detection circuit and the third input terminal of logic unit
Connection；
The output end of the oscillator and the input terminal of timer connect；
The output end of the timer and the 4th input terminal of logic unit connect；
The output end of the logic unit and the input terminal of driving circuit connect；
The driving circuit is connect with by control device；
The reference circuit provides reference voltage and internal electric source for system.
2. acousto-optic controlled circuit according to claim 1, it is characterised in that: the reference circuit includes BGP circuit and operation
Amplifier, the BGP circuit is for generating reference voltage, including the first output end, second output terminal, third output end, the 4th
Output end, the 5th output end, five output ends provide five kinds of reference voltages, the first output end and fortune of the BGP circuit respectively
The positive input terminal connection of amplifier is calculated, the output end of the operational amplifier is connect with the negative input end of its own and conduct
VDDAUX signal end.
3. acousto-optic controlled circuit according to claim 2, it is characterised in that: the sound detection circuit include pickup circuit,
Band-pass filter amplifier, first comparator and the second comparator, the output end of the pickup circuit and band-pass filter amplifier
Input terminal connection, the output end of the band-pass filter amplifier is connect with the inverting input terminal of first comparator respectively, second compares
Non-inverting input terminal compared with device connects, and the non-inverting input terminal of the first comparator and the second output terminal of reference circuit connect, defeated
The connection of the first input end of outlet and logic unit, the inverting input terminal of second comparator and the 4th output of reference circuit
Second input terminal of end connection, output end and logic unit connects.
4. acousto-optic controlled circuit according to claim 3, it is characterised in that: the pickup circuit includes sound transducer, electricity
Hinder R9, capacitor C5, one end of the resistance R9 connect with VDDAUX signal end, the other end respectively with the positive input of sound transducer
End, one end connection of capacitor C5 and the output end as pickup circuit, the other end of the capacitor C5 and bearing for sound transducer
Input terminal is grounded；
The band-pass filter amplifier includes resistance R0, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, electricity
Hinder R7, resistance R8, capacitor C0, capacitor C1, capacitor C2, capacitor C3, capacitor C4, the first amplifier and the second amplifier, the electricity
Resistance R0 one end connect as the input terminal of band-pass filter amplifier with the output end of pickup circuit, the other end respectively with resistance R1
One end, capacitor CO one end connection, the other end of the resistance R1 respectively with one end of one end of capacitor C1, capacitor C2 connect
It connects, the other end of the capacitor C2 is connect with the positive input terminal of one end of resistance R2, the first amplifier respectively, first amplification
The negative input end of device is connect with one end of one end of resistance R5, resistance R6 respectively, output end respectively with the other end of resistance R5, electricity
Holding one end connection of C3, the other end of the capacitor C3 is connect with the positive input terminal of one end of resistance R3, the second amplifier respectively,
The negative input end of second amplifier is connect with one end of one end of resistance R7, resistance R8 respectively, output end respectively with resistance
One end connection of the other end, capacitor C4 of R7, the other end of the capacitor C4 connect with one end of resistance R4 and filter as band logical
The output end of twt amplifier, the other end of the resistance R4 and the third output end of reference circuit connect, and the capacitor C0's is another
One end, the other end of capacitor C1, the other end of resistance R2, the other end of resistance R6, the other end of resistance R3, resistance R8 it is another
End is grounded.
5. acousto-optic controlled circuit according to claim 2, it is characterised in that: the optical detection circuit includes photo resistance, light
Quick resistance detecting circuit and third comparator, the output end of the photo resistance and the input terminal of photo resistance detection circuit connect
It connects, the output end of the photo resistance detection circuit is connect with the inverting input terminal of third comparator, the third comparator
The third input terminal of the connection of 5th output end of non-inverting input terminal and reference circuit, output end and logic unit connects.
6. acousto-optic controlled circuit according to claim 5, it is characterised in that: one end of the photo resistance is grounded, the other end
Output end as photo resistance；
The photo resistance detection circuit includes current source, resistance R10, resistance R11, capacitor C6 and capacitor C7, the current source
One end and external power supply vdd terminal connect, the other end with connect respectively with one end of the output end of photo resistance, capacitor R10,
The other end of the resistance R10 is connect with one end of one end of capacitor C6, resistance R11 respectively, the other end of the resistance R11 with
One end of capacitor C7 connects and the output end as photo resistance detection circuit.
7. acousto-optic controlled circuit according to claim 2, it is characterised in that: the logic unit includes first and door, second
With door, third and door, the first rest-set flip-flop, the first NOT gate and the second NOT gate, described first with the first input end of door as patrolling
Collect the first input end of unit, second input terminal of second input terminal as logic unit, output end and second and the first of door
Input terminal connection, the described second third input terminal with the second input terminal of door as logic unit, output end and third and door
First input end connection, the second input terminal of the third and door as logic unit the 4th input terminal and with the first RS touching
The end CLR of device, the output end connection of timer are sent out, output end is connect with the end CP of the first rest-set flip-flop, the first RS triggering
The S input terminal of device sets high level, and Q output is connect with the input terminal of the first NOT gate, the output end and second of first NOT gate
The input terminal of NOT gate connects, output end of the output end of second NOT gate as logic unit.
8. acousto-optic controlled circuit according to claim 2, it is characterised in that: the oscillator include resistance R12, resistance R13,
Resistance R14, resistance R15, capacitor C8, PMOS tube P1, NMOS tube N1, third amplifier, the 4th amplifier, the second rest-set flip-flop and
The vdd terminal of third NOT gate, one end of the resistance R12 and external power supply connects, the other end respectively with one end of resistance R13, the
The negative input ends of three amplifiers connects, the other end of the resistance R13 respectively with one end of resistance R14, the 4th amplifier just
Input terminal connection, the positive input terminal of the third amplifier respectively with the negative input end of the 4th amplifier, one end of capacitor C8, electricity
Hold one end connection of R15, output end connect with the S input terminal of the second rest-set flip-flop, the output end of the 4th amplifier and the
The R inputs of two rest-set flip-flops connects, the other end of the resistance R15 respectively with the drain electrode of PMOS tube P1, the leakage of NMOS tube N1
The vdd terminal of pole connection, the source electrode of the PMOS tube P1 and external power supply connects, grid respectively with the grid of NMOS tube N1, second
The Q output of rest-set flip-flop connects, and the Q output of second rest-set flip-flop is connect with the input terminal of third NOT gate, and described the
Output end of the output end of three NOT gates as oscillator, the other end of the resistance R14, the other end of capacitor C8, NMOS tube N1
Source grounding.
9. acousto-optic controlled circuit according to claim 2, it is characterised in that: the timer includes 22 two-dividers and 22
A two-divider successively cascades, input terminal of the input terminal of first two-divider as timer, the last one two-divider
Output end of the output end as timer.
10. acousto-optic controlled circuit according to claim 2, it is characterised in that: the driving circuit includes the 4th and door, the 5th
With door, the 4th NOT gate, the 5th NOT gate, the 6th NOT gate, the 7th NOT gate, the 8th NOT gate, the 9th NOT gate, the tenth NOT gate, the 11st non-
Door, the 12nd NOT gate, PMOS tube P2 and NMOS tube N2, the described 4th connects with the first input end of door and the input terminal of the 4th NOT gate
It connects and the input terminal as driving circuit, the second input terminal input terminal with the output end of the tenth NOT gate, the 11st NOT gate respectively
Connection, output end connect with the input terminal of the 5th NOT gate, the output end of the 4th NOT gate and the 5th and door the second input terminal
Connection, the described 5th connect with the input terminal of the output end of the 6th NOT gate, the 7th NOT gate respectively with the first input end of door, output
End is connect with the input terminal of the 9th NOT gate, and the output end of the 5th NOT gate is connect with the input terminal of the 6th NOT gate, and the described 7th
The output end of NOT gate is connect with the input terminal of the 8th NOT gate, and the output end of the 9th NOT gate and the input terminal of the tenth NOT gate connect
It connects, the output end of the 11st NOT gate is connect with the input terminal of the 12nd NOT gate, the grid of the PMOS tube P2 and the 8th non-
The vdd terminal of the output end connection of door, source electrode and external power supply connects, and drain electrode connect with the drain electrode of NMOS tube N2 and as driving electricity
The grid of the signal output end on road, the NMOS tube N2 is connect with the output end of the 12nd NOT gate, source electrode ground connection.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201821422929.3U CN209120520U (en) | 2018-08-31 | 2018-08-31 | A kind of acousto-optic controlled circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821422929.3U CN209120520U (en) | 2018-08-31 | 2018-08-31 | A kind of acousto-optic controlled circuit |
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| CN209120520U true CN209120520U (en) | 2019-07-16 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108990238A (en) * | 2018-08-31 | 2018-12-11 | 无锡麟力科技有限公司 | A kind of acousto-optic controlled circuit |
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2018
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108990238A (en) * | 2018-08-31 | 2018-12-11 | 无锡麟力科技有限公司 | A kind of acousto-optic controlled circuit |
| CN108990238B (en) * | 2018-08-31 | 2024-01-12 | 无锡麟力科技有限公司 | Sound-light control circuit |
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