CN209119092U - Semiconductor structure and semiconductor devices - Google Patents
Semiconductor structure and semiconductor devices Download PDFInfo
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- CN209119092U CN209119092U CN201821863305.5U CN201821863305U CN209119092U CN 209119092 U CN209119092 U CN 209119092U CN 201821863305 U CN201821863305 U CN 201821863305U CN 209119092 U CN209119092 U CN 209119092U
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Abstract
The disclosure proposes a kind of semiconductor structure and semiconductor devices.Semiconductor structure includes silicon base layer, the first oxide skin(coating) and the second oxide skin(coating), protective layer, silicon perforation and electrode.First oxide skin(coating) and the second oxide skin(coating) are sequentially disposed on silicon base layer from the bottom to top, and the upper surface of the second oxide skin(coating) offers holding tank.Protective layer is set between the first oxide skin(coating) and the second oxide skin(coating), and the material hardness of protective layer is greater than the material hardness of the second oxide skin(coating).Silicon perforation perforation is opened in silicon base layer, the first oxide skin(coating), protective layer and the second oxide skin(coating) and filled with conductive material, and the upper end of silicon perforation is revealed in the slot bottom of holding tank.Electrode is set in holding tank.
Description
Technical field
This disclosure relates to the silicon perforation design field of semiconductor devices more particularly to a kind of semiconductor structure and half
Conductor device.
Background technique
The backside through vias device for exposing of existing silicon perforation (Through Silicon Via, abridge TSV, also known as through silicon via)
Electrode is easy to happen by being led to copper extrusion (Cu extrusion), copper when hybrid bonded (hybrid bonding) by high pressure
Silicon base layer can be entered after extrusion, so as to cause short-circuit between silicon perforation.
Utility model content
One main purpose of the disclosure is to overcome at least one defect of the above-mentioned prior art, provides a kind of solution copper
Squeeze out undesirable semiconductor structure.
Another main purpose of the disclosure is to overcome at least one defect of the above-mentioned prior art, and providing one kind has
The semiconductor devices of above-mentioned semiconductor structure.
To achieve the above object, the disclosure adopts the following technical scheme that
According to one aspect of the disclosure, a kind of semiconductor structure is provided.Wherein, the semiconductor structure includes silicon substrate
Layer, the first oxide skin(coating) and the second oxide skin(coating), protective layer, silicon perforation and electrode.First oxide skin(coating) and described
Dioxide layer is sequentially disposed at from the bottom to top on the silicon base layer, and the upper surface of second oxide skin(coating) offers holding tank.
The protective layer is set between first oxide skin(coating) and second oxide skin(coating), and the material hardness of the protective layer is greater than
The material hardness of second oxide skin(coating).The silicon perforation is opened in the silicon base layer, first oxide skin(coating), the guarantor
Sheath and second oxide skin(coating) are simultaneously filled with conductive material, and the upper end of the silicon perforation is revealed in the slot of the holding tank
Bottom.The electrode is set in the holding tank.
According to one of embodiment of the disclosure, the conductive material includes copper or tungsten.
According to one of embodiment of the disclosure, the upper end of the silicon perforation stretch out in the slot bottom of the holding tank and
Lower than the notch of the holding tank.
According to one of embodiment of the disclosure, the silicon perforation hole wall is equipped with insulating layer, by the silicon perforation
With the silicon base layer, first oxide skin(coating), the protective layer and the second oxide skin(coating) dielectric separation.
According to one of embodiment of the disclosure, the material of the insulating layer includes silicon oxide or silicon nitride.
According to one of embodiment of the disclosure, the material of first oxide skin(coating) includes silica.And/or
The material of second oxide skin(coating) includes silica.
According to one of embodiment of the disclosure, the material of the protective layer includes silicon oxynitride, silicon carbide or silicon
Carbon nitrogen.
According to one of embodiment of the disclosure, the protective layer has bending part, and the bending part is surrounded on institute
State silicon perforation be located at second oxide skin(coating) in part outer wall, the bending part by the part of the silicon perforation with
Second oxide skin(coating) separates.
According to one of embodiment of the disclosure, the upper table of the upper surface of the electrode second oxide skin(coating)
Face is close to the silicon base layer.
According to one of embodiment of the disclosure, the upper table of the upper surface of the electrode and second oxide skin(coating)
Height difference between face is 1 nanometer to 5 nanometers.
According to one of embodiment of the disclosure, the material of the electrode includes copper.
According to one of embodiment of the disclosure, the semiconductor structure further includes barrier layer, and the barrier layer is set
In the upper surface of second oxide skin(coating), and the material hardness on the barrier layer is hard greater than the material of second oxide skin(coating)
Degree.
According to one of embodiment of the disclosure, the material on the barrier layer includes silicon-carbon nitrogen.
According to another aspect of the disclosure, a kind of semiconductor devices is provided.Wherein, the semiconductor devices includes this public affairs
Open proposition the and described in the above-described embodiment semiconductor structure.
As shown from the above technical solution, the advantages of disclosure proposes semiconductor structure and semiconductor devices and actively effect
Fruit is:
The semiconductor structure that the disclosure proposes, including the first oxide skin(coating), the second oxide skin(coating) and protective layer.Second oxidation
The upper surface of nitride layer offers holding tank.Protective layer is set between the first oxide skin(coating) and the second oxide skin(coating), the material of protective layer
Matter hardness is greater than the material hardness of the second oxide skin(coating).Silicon perforation perforation be opened in silicon base layer, the first oxide skin(coating), protective layer and
Second oxide skin(coating), silicon perforation one end are revealed in the lower surface of silicon base layer, and the other end is revealed in the slot bottom of holding tank.By above-mentioned
Design, the copper that the disclosure can stop the electrode on the second oxide skin(coating) to generate using protective layer extrude into silicon base layer, avoid
It is short-circuit between silicon perforation.In addition, since protective layer is folded between two layers of oxide skin(coating), while optimizing the stress shape of protective layer
State.
Detailed description of the invention
The detailed description of the following preferred embodiment to the disclosure, the various mesh of the disclosure are considered in conjunction with the accompanying drawings
Mark, feature and advantage will become apparent.Attached drawing is only the exemplary diagram of the disclosure, is not necessarily to draw in proportion
System.In the accompanying drawings, same appended drawing reference always shows same or similar component.Wherein:
Fig. 1 is a kind of stepped construction schematic diagram of semiconductor structure shown according to an illustrative embodiments；
Fig. 2 is a kind of stepped construction schematic diagram of semiconductor structure shown according to another exemplary embodiment；
Fig. 3 is one of process of the preparation process of semiconductor structure shown according to an illustrative embodiments a kind of
Stepped construction schematic diagram；
Fig. 4 is one of process of the preparation process of semiconductor structure shown according to an illustrative embodiments a kind of
Stepped construction schematic diagram；
Fig. 5 is one of process of the preparation process of semiconductor structure shown according to an illustrative embodiments a kind of
Stepped construction schematic diagram；
Fig. 6 is one of process of the preparation process of semiconductor structure shown according to an illustrative embodiments a kind of
Stepped construction schematic diagram；
Fig. 7 is one of process of the preparation process of semiconductor structure shown according to an illustrative embodiments a kind of
Stepped construction schematic diagram；
Fig. 8 is one of process of the preparation process of semiconductor structure shown according to an illustrative embodiments a kind of
Stepped construction schematic diagram；
Fig. 9 is one of process of the preparation process of semiconductor structure shown according to an illustrative embodiments a kind of
Stepped construction schematic diagram；
Figure 10 is one of work of the preparation process of semiconductor structure shown according to an illustrative embodiments a kind of
The stepped construction schematic diagram of sequence；
Figure 11 is the stepped construction schematic diagram according to a kind of semiconductor structure shown in another exemplary embodiment.
The reference numerals are as follows:
100. silicon base layer；
200. silicon perforation；
210. insulating layer；
310. first oxide skin(coating)s；
320. second oxide skin(coating)s；
321. holding tank；
400. protective layer；
410. bending part；
500. electrode；
510. seed layer；
600. barrier layer；
H. height difference.
Specific embodiment
The exemplary embodiments for embodying disclosure features and advantages will describe in detail in the following description.It should be understood that this
Open can have various variations in different embodiments, all not depart from the scope of the present disclosure, and it is therein illustrate and
Attached drawing is inherently illustrative, rather than to limit the disclosure.
It in being described below the different illustrative embodiments to the disclosure, is carried out referring to attached drawing, the attached drawing is formed
A part of this disclosure, and the exemplary knot of difference of many aspects of the achievable disclosure is wherein shown by way of example
Structure, system and step.It should be understood that other certain parties of component, structure, exemplary means, system and step can be used
Case, and structural and functional modification can be carried out without departing from disclosure range.Although moreover, can in this specification
Using term " on ", " between ", " within " etc. the different example features and element of the disclosure are described, but these terms
With in this article merely for convenient, for example, with reference to the accompanying drawings described in exemplary direction.Any content in this specification is not
The specific three dimensional direction for being interpreted as Structure of need is just fallen within the scope of the disclosure.
Semiconductor structure embodiment one
Refering to fig. 1, the stepped construction schematic diagram of the semiconductor structure of disclosure proposition is representatively illustrated.Show at this
Example property embodiment in, the disclosure propose semiconductor structure be by be applied to semiconductor display silicon perforation structure for into
Row explanation.It will be readily appreciated by those skilled in the art that for the relevant design of the disclosure is partly led applied to other kinds of
In body device or other techniques, and a variety of remodeling, addition, substitution, deletion or other changes are made to following specific embodiments
Change, these variations are still in the range of the principle of the semiconductor structure of disclosure proposition.
As shown in Figure 1, in the present embodiment, the semiconductor structure that the disclosure proposes includes that silicon base layer 100, first aoxidizes
Nitride layer 310 and the second oxide skin(coating) 320, protective layer 400, silicon perforation 200 and electrode 500.Specifically, the first oxide skin(coating)
310 and second oxide skin(coating) 320 be sequentially arranged on silicon base layer 100 from the bottom to top.Protective layer 400 is arranged in the first oxide skin(coating)
310 and second between oxide skin(coating) 320, the first oxide skin(coating) 310 and the second oxide skin(coating) 320 are separated, and protective layer 400
Material hardness be greater than the second oxide skin(coating) 320 material hardness.The upper surface of second oxide skin(coating) 320 offers holding tank
321.Silicon perforation 200 is provided in above-mentioned stepped construction, and sequentially penetrates through silicon base layer 100, the first oxide skin(coating) 310, protective layer
400 and the second oxide skin(coating) of part 320, conductive material is filled in silicon perforation 200.Wherein, one end of silicon perforation 200 is revealed in
The lower surface of silicon base layer 100, the other end of silicon perforation 200 are revealed in the slot bottom of holding tank 321.Electrode 500 is arranged in the second oxygen
The slot bottom of the holding tank 321 of compound layer 320 simultaneously fills the holding tank 321.By above-mentioned design, due to the material of protective layer 400
Hardness is greater than the material hardness of the second oxide skin(coating) 320, and the disclosure can stop the second oxide skin(coating) 320 using protective layer 400
On the copper that generates of electrode 500 extrude into silicon base layer 100, avoid short circuit between silicon perforation 200.In addition, since protective layer 400 presss from both sides
It is located between two layers of oxide skin(coating), while optimizing the stress state of protective layer 400.
Further, in the present embodiment, the material of protective layer can preferably include silicon oxynitride (SiON), carbonization
Silicon (SiN) or silicon-carbon nitrogen (SiCN).In other embodiments, the material of protective layer also may be selected other materials hardness and be greater than the
The other materials of the material hardness of dioxide layer 320, are not limited with present embodiment.
It further, should as shown in Figure 1, in the present embodiment, protective layer 400 can preferably have bending part 410
Bending part 410 is surrounded on the outer wall for the part of silicon perforation 200 being located in the second oxide skin(coating) 320, and bending part 410 is by silicon perforation
200 part and the second oxide skin(coating) 320 separate.
Further, in the present embodiment, the conductive material filled in silicon perforation 200 can preferably include copper (Cu)
Or tungsten (W).In other embodiments, other relevant integrated circuit conductive materials can also be filled in silicon perforation 200, not
It is limited with present embodiment.
Further, as shown in Figure 1, in the present embodiment, insulation can be preferably provided at 200 hole wall of silicon perforation
Layer 210, silicon perforation 200 and silicon base layer 100, the first oxide skin(coating) 310, protective layer 400 and the second oxide skin(coating) 320 are insulated
Separate.
Further, based on the design for being provided with insulating layer 210 at 200 hole wall of silicon perforation, in the present embodiment, absolutely
The material of edge layer 210 can be preferably silica (SiO2) or silicon nitride (Si3N4).In other embodiments, insulating layer 210
Material be also an option that other relevant integrated circuit isolation materials, be not limited with present embodiment.
Further, in the present embodiment, the material of the first oxide skin(coating) 310 can preferably include silica
(SiO2).In other embodiments, the material of the first oxide skin(coating) 310 is also an option that the oxygen of other relevant integrated circuits
Compound material, is not limited with present embodiment.
Further, in the present embodiment, the material of the second oxide skin(coating) 320 can preferably include silica
(SiO2).In other embodiments, the material of the second oxide skin(coating) 320 is also an option that the oxygen of other relevant integrated circuits
Compound material, is not limited with present embodiment.
Further, as shown in Figure 1, in the present embodiment, the upper surface of electrode 500 is compared with the second oxide skin(coating) 320
Upper surface can be preferably closer to silicon base layer 100, i.e., the upper surface of electrode 500 is relative to the upper of the second oxide skin(coating) 320
Surface Subsidence, then there are height difference H between the upper surface of electrode 500 and the upper surface of the second oxide skin(coating) 320.Accordingly, it is mixing
In bonding technology to electrode 500 carry out high temperature bonding during, can give electrode 500 conductive metal material expanded by heating
Reserved space avoids conductive metal material from overflowing.
Further, upper surface based on electrode 500 compared with the second oxide skin(coating) 320 upper surface closer to silicon base layer
100 design, in the present embodiment, the height difference H between the upper surface of electrode 500 and the upper surface of the second oxide skin(coating) 320
It can be more preferably 1 nanometer to 5 nanometers (i.e. 1nm, 1nm=1 × 10-9m).In other embodiments, electrode 500 is upper
Other sizes also may be selected in height difference H between surface and the upper surface of the second oxide skin(coating) 320, are not with present embodiment
Limit.
In addition, as shown in Figure 1, the upper surface based on electrode 500 compared with the second oxide skin(coating) 320 upper surface closer to silicon
The design of base 100, in the present embodiment, the upper surface of electrode 500 are a flat surface, therefore the upper surface of electrode 500 is opposite
The upper surface of second oxide skin(coating) 320 is to form a sinking platform structure after sinking.In other embodiments, the pass of the disclosure
In " upper surface of electrode 500 compared with the second oxide skin(coating) 320 upper surface closer to silicon base layer 100 " design it also can be used
He implements mode.
For example, as shown in Fig. 2, representatively illustrating another embodiment party of the semiconductor structure of disclosure proposition in Fig. 2
The stepped construction schematic diagram of formula.In this embodiment, the upper surface of electrode 500 and the upper surface of the second oxide skin(coating) 320 are real
The curved-surface structure of smooth sinking has been collectively constituted on border.Further, which can be the circular arc camber to sink, sink
Oval arc surface or it is any whole be in sinking form Irregular Boundary Surface, be not limited with present embodiment.
It should be noted that in the present embodiment, be illustrated so that the material of electrode 500 includes copper as an example, therefore this
The effect of open semiconductor structure proposed be include stop the copper of the generation of electrode 500 on the second oxide skin(coating) 320 squeeze out into
Enter silicon base layer 100.In other embodiments, the formation electricity of other relevant integrated circuits also may be selected in the material of electrode 500
The effect of conductive metal material needed for extremely, the then semiconductor structure that the disclosure proposes may include stopping the second oxide skin(coating)
Any metal that electrode 500 on 320 generates extrudes into silicon base layer 100.
It should also be noted that "upper", "lower" in relation to each stepped construction are only needles in the foregoing description of present embodiment
For direction shown in the accompanying drawings.It is not intended to limit sky of the semiconductor structure of disclosure proposition in a variety of concrete application scenes
Between position.It is by the second oxygen of two semiconductor structures for example, being carried out in hybrid bonded technique by two semiconductor structures
So-called " upper surface " of compound layer 320 is oppositely arranged.
Semiconductor structure embodiment two
Refering to fig. 11, representatively illustrate the stacking knot of another embodiment of the semiconductor structure of disclosure proposition
Structure schematic diagram.Design base in the illustrative embodiments, in the semiconductor structure and first embodiment of disclosure proposition
This is identical, will be illustrated below to the main distinction of the two.
As shown in figure 11, in the present embodiment, the semiconductor structure that the disclosure proposes further includes setting in the second oxidation
The barrier layer 600 of the upper surface of nitride layer 320.Wherein, the material hardness on barrier layer is greater than the material hardness of the second oxide skin(coating).It is logical
Above-mentioned design is crossed, the disclosure can utilize barrier layer 600, in the mistake polished to the conductive metal material for forming electrode 500
It avoids leading to the problem of control stability in journey.In addition, the setting on barrier layer 600 can also optimize semiconductor structure hybrid bonded
Binding ability in technique.
For example, the material based on the second oxide skin(coating) 320 includes the design of silica, in the present embodiment, resistance
The material of barrier 600 can preferably include silicon-carbon nitrogen (SiCN).Wherein, the hardness of silicon-carbon nitrogen is greater than silica, therefore can
It avoids leading to the problem of control stability during polishing the conductive metal material for forming electrode 500.In addition, two
A semiconductor structure it is hybrid bonded during, be to be bonded so that the barrier layer 600 of respective silicon-carbon nitrogen material is opposite, silicon-carbon nitrogen
Density is greater than silica, therefore can optimize binding ability of the semiconductor structure in hybrid bonded technique.
Further, as shown in figure 11, in the present embodiment, the upper end of silicon perforation 200 can be preferably extended through in appearance
Receive slot 321 slot bottom and be lower than holding tank 321 notch.Accordingly, the conductive material of silicon perforation 200 can be with formation electrode 500
Conductive metal material have bigger contact area, further decrease resistance value.In other embodiments, silicon perforation 200
Upper end also can be concordant on earth (as shown in Figure 1) with holding tank 321, is not limited with present embodiment.
It should be noted here that shown in attached drawing and the semiconductor structure that describes in the present specification be only can be using this
Several examples in many kinds of semiconductor structures of open principle.It should be clearly understood that the principle of the disclosure is only limitted to absolutely not
It is shown in attached drawing or any part of any details of semiconductor structure described in this specification or semiconductor structure.
Semiconductor devices embodiment
Based on the exemplary illustration of the above-mentioned semiconductor structure proposed to the disclosure, partly led what is proposed to the disclosure below
The illustrative embodiments of body device are illustrated.In the present embodiment, the semiconductor devices that the disclosure proposes is to have
It is illustrated for the semiconductor devices of silicon perforation structure.It will be readily appreciated by those skilled in the art that being by the disclosure
Relevant design is applied in other kinds of electronic device or other techniques, and makes a variety of change to following specific embodiments
Type, addition, substitution, deletion or other variations, these variations are still in the range of the principle of the semiconductor devices of disclosure proposition.
In the present embodiment, the semiconductor devices that the disclosure proposes includes that the disclosure proposes and in above embodiment
The semiconductor structure of middle detailed description.
It should be noted here that shown in attached drawing and the semiconductor devices that describes in the present specification be only can be using this
Several examples in many kinds of semiconductor devices of open principle.It should be clearly understood that the principle of the disclosure is only limitted to absolutely not
It is shown in attached drawing or any part of any details of semiconductor devices described in this specification or semiconductor devices.
The preparation process embodiment of semiconductor structure
Refering to Fig. 3 to Figure 10, the preparation work of the semiconductor structure of disclosure proposition is shown to each respectively representing property of attached drawing
Stepped construction schematic diagram in several main techniques of skill.In the illustrative embodiments, the semiconductor junction of disclosure proposition
The preparation process of structure is illustrated for being applied to the silicon perforation structure of semiconductor devices.Those skilled in the art are easy
Understand, for the relevant design of the disclosure to be applied in other kinds of semiconductor devices or other techniques, and to following
Specific embodiment make it is a variety of remodeling, addition, substitution, delete or other variation, these variation still the disclosure propose
In the range of the principle of the preparation process of semiconductor structure.
As shown in Figures 3 to 10, in the present embodiment, the preparation process for the semiconductor structure that the disclosure proposes mainly wraps
Include following steps:
Silicon base layer 100 is set, opens up silicon perforation 200 in the lower surface of silicon base layer 100, is filled in silicon perforation 200 conductive
Material.The lower end of silicon perforation 200 is revealed in the lower surface of silicon base layer 100, and upper end is coated among silicon base layer 100.
The top for removing silicon base layer 100, makes the upper end of silicon perforation 200 stretch out in the upper surface of silicon base layer 100；
First oxide skin(coating) 310 is set in the upper surface of silicon base layer 100, the upper end of silicon perforation 200 is coated on the first oxidation
Among nitride layer 310, then the upper surface of the first oxide skin(coating) 310 is ground, the upper end of silicon perforation 200 is made to stretch out in the first oxide skin(coating)
310 upper surface；
It is greater than the material of the material hardness of the second oxide skin(coating) 320 using material hardness, in the upper of the first oxide skin(coating) 310
Protective layer 400 is arranged in surface, and the upper end protected seam 400 of silicon perforation 200 covers；
In the upper surface of protective layer 400, the second oxide skin(coating) 320 is set；
The second oxide skin(coating) 320 is patterned, the upper surface of the second oxide skin(coating) 320 is made to form holding tank 321, and silicon perforation
200 upper end is revealed in the slot bottom of holding tank 321；And
In the upper surface of the second oxide skin(coating) 320, conductive metal material is set, holding tank 321 also by conductive metal material,
Then abrasive metal conductive material, removal are set to the conductive metal material of the upper surface of the second oxide skin(coating) 320, and retain filling
In the conductive metal material in holding tank 321 not to form electrode 500.
In conjunction with Fig. 3 to Figure 10, below by above-mentioned each main step of the preparation process of the semiconductor structure proposed to the disclosure
Suddenly it is specifically described.
Preferably, as shown in figure 3, in the present embodiment, the step of for setting silicon perforation 200 and silicon base layer 100 and
Speech, is to open up silicon perforation 200 on 100 1 surface of silicon base layer, and one end of silicon perforation 200 is revealed in a table of silicon base layer 100
Face, wherein the end of silicon perforation 200 is lower end, and the surface of silicon base layer 100 is lower surface.In addition, silicon perforation 200
Setting further includes filling conductive material and setting insulating layer 210, and it will not be described here.Then, as shown in figure 4, again by silicon base layer
100 top removal, so that the other end of silicon perforation 200 stretches out in another surface of silicon base layer 100, wherein silicon perforation 200
The other end is upper end, and another surface of silicon base layer 100 is upper surface.
Further, in the present embodiment, the conductive material filled in silicon perforation 200 can preferably include copper (Cu)
Or tungsten (W).In other embodiments, other relevant integrated circuit conductive materials can also be filled in silicon perforation 200, not
It is limited with present embodiment.
Further, in the present embodiment, the material of insulating layer 210 can be preferably silica (SiO2) or silicon nitride
(Si3N4).In other embodiments, the material of insulating layer 210 is also an option that other relevant integrated circuit isolation materials,
It is not limited with present embodiment.
Further, in the present embodiment, the technique of the part removal of silicon base layer 100 can be preferably using removing
(grinding) technique.
Preferably, first for the step of the first oxide skin(coating) 310 are set as shown in figure 5, in the present embodiment
First oxide skin(coating) 310 was set in the upper surface of silicon base layer 100 before this, the upper end of silicon perforation 200 is coated on the first oxidation at this time
Among nitride layer 310.Then, as shown in fig. 6, again removing the top of the first oxide skin(coating) 310, stretch the upper end of silicon perforation 200
For the upper surface of the first oxide skin(coating) 310.
Further, in the present embodiment, the material of the first oxide skin(coating) 310 can preferably include silica
(SiO2).In other embodiments, the material of the first oxide skin(coating) 310 is also an option that the oxygen of other relevant integrated circuits
Compound material, is not limited with present embodiment.
Further, in the present embodiment, setting technique of first oxide skin(coating) 310 in the upper surface of silicon base layer 100
It can be preferably using the technique of deposition (deposit).
Further, in the present embodiment, the technique of the part removal of the first oxide skin(coating) 310 can be used preferably
The technique for chemically-mechanicapolish polishing (Chemical Mechanical Polishing, CMP).
Preferably, as shown in fig. 7, being that will protect for the step of protective layer 400 are arranged in the present embodiment
The upper surface of the first oxide skin(coating) 310 is arranged in layer 400, so that the upper table of the upper end of silicon perforation 200 and the first oxide skin(coating) 310
The complete protected seam 400 in face covers.Also, the material hardness of protective layer 400 is greater than the material hardness of the second oxide skin(coating) 320.
Further, in the present embodiment, the material of protective layer 400 can preferably include silicon oxynitride (SiON),
Silicon carbide (SiN) or silicon-carbon nitrogen (SiCN).In other embodiments, it is big that other materials hardness also may be selected in the material of protective layer
In the other materials of the material hardness of the second oxide skin(coating) 320, it is not limited with present embodiment.
Further, in the present embodiment, setting work of the protective layer 400 on the upper surface of the first oxide skin(coating) 310
Skill can be preferably using the technique of deposition.
Preferably, first for the step of the second oxide skin(coating) 320 are set as shown in figure 8, in the present embodiment
Second oxide skin(coating) 320 was set in the upper surface of protective layer 400 before this.Then, as shown in figure 9, again in the second oxide skin(coating) 320
Upper surface open up holding tank 321, so that the upper end of silicon perforation 200 is revealed in the slot bottom of holding tank 321.
Further, in the present embodiment, the material of the second oxide skin(coating) 320 can preferably include silica
(SiO2).In other embodiments, the material of the second oxide skin(coating) 320 is also an option that the oxygen of other relevant integrated circuits
Compound material, is not limited with present embodiment.
Further, in the present embodiment, setting technique of second oxide skin(coating) 320 in the upper surface of protective layer 400
It can be preferably using the technique of deposition.
Further, in the present embodiment, the second technique that surface opens up holding tank 321 on it of oxide skin(coating) 320
The technique that photoetching (lithography) can preferably be used or etch (etch).
Further, as shown in Fig. 1 and Fig. 9, in the present embodiment, since protective layer 400 is to be completely covered on silicon to wear
The upper end for stretching out in the first oxide skin(coating) 310 in hole 200, therefore after holding tank 321 opens up, it is looped around the position of silicon perforation 200
Protective layer 400 on the outer wall of part in the second oxide skin(coating) 320 forms bending part 410, and the bending part 410 is by silicon perforation
200 part and the second oxide skin(coating) 320 separate.
In addition, in other embodiments, holding tank 321 can open up that the upper end of silicon perforation 200 is made to stretch out in receiving
The structure of the slot bottom of slot 321 and the notch lower than holding tank 321.
Preferably, as shown in Figure 10, in the present embodiment, for the step of electrode 500 are arranged, being first will be golden
Belong to the upper surface that the second oxide skin(coating) 320 is arranged in conductive material (such as copper), while utilizing conductive metal material by holding tank
321 fillings.Then, as shown in Figure 1, the conductive metal material in holding tank 321 will be not filled by, that is, it is located at the second oxide skin(coating)
The part metals conductive material of 320 upper surface removes, to form the electrode 500 for being filled in holding tank 321.
Further, in the present embodiment, the upper surface for the second oxide skin(coating) 320 conductive metal material being arranged in
And the technique of holding tank 321 is filled, it can preferably use electroplating technique.
Further, in the present embodiment, the technique of the part removal of conductive metal material can be preferably using change
The technique for learning mechanical polishing.
Further, as shown in Figure 10, in the present embodiment, in the step of electrode 500 are set, can preferably exist
Seed layer 510 is arranged in the upper surface (slot bottom and each cell wall including holding tank 321) of second oxide skin(coating) 320, is then planting again
Above-mentioned conductive metal material is set in sublayer 510 and forms electrode 500.Wherein, the setting technique of seed layer 510 can be preferably
Using the technique of sputtering.
Further, as shown in Figure 1, in the present embodiment, after forming electrode 500, preferably can also partially go
Except the top (or the top that the second oxide skin(coating) 320 is adjacent to electrode 500 being removed simultaneously, with reference to Fig. 2) of electrode 500, so that electric
The upper surface of pole 500 compared with the second oxide skin(coating) 320 upper surface closer to silicon base layer 100.
As shown in figure 11, in another embodiment, the preparation process for the semiconductor structure that the disclosure proposes can also wrap
It includes the step of barrier layer 600 are arranged in the upper surface of the second oxide skin(coating) 320.Specifically, the step of for setting barrier layer
For, it is after the second oxide skin(coating) 320 is arranged, and before patterning the second oxide skin(coating) 320, in the second oxide skin(coating)
Barrier layer 600 is arranged in 320 upper surface, and the material hardness on barrier layer 600 is greater than the material hardness of the second oxide skin(coating) 320.
Further, in another embodiment, the material based on the second oxide skin(coating) 320 includes setting for silica
Meter, the material on barrier layer 600 can preferably include silicon-carbon nitrogen (SiCN).
Further, in another embodiment, the setting technique on barrier layer 600 can be preferably using the work of deposition
Skill.
It further, is to barrier layer 600 and the second oxygen after barrier layer 600 is set in another embodiment
Compound layer 320 carries out patterned process, makes barrier layer 600 and the second oxide skin(coating) 320 that holding tank 321 be collectively formed.Then, right
It is the upper surface that conductive metal material (such as copper) is arranged in barrier layer 600 first for the step of electrode 500 are set,
Holding tank 321 is filled using conductive metal material simultaneously.Then the metallic conduction material that will be not filled by holding tank 321 then,
Material, i.e., the part metals conductive material positioned at the upper surface on barrier layer 600 removes, to form the electricity for being filled in holding tank 321
Pole 500.
It should be noted here that the preparation process for the semiconductor structure for showing in attached drawing and describing in the present specification is only
It can be using several examples in the preparation process of many kinds of semiconductor structures of disclosure principle.It should be clearly understood that this
Principle disclosed be only limitted to show in attached drawing absolutely not or the preparation process of semiconductor structure described in this specification it is any thin
Section or any step.
In conclusion the semiconductor structure that the disclosure proposes, including the first oxide skin(coating), the second oxide skin(coating) and protection
Layer.The upper surface of second oxide skin(coating) offers holding tank.Protective layer is set between the first oxide skin(coating) and the second oxide skin(coating),
The material hardness of protective layer is greater than the material hardness of the second oxide skin(coating).Silicon perforation perforation is opened in silicon base layer, the first oxide
Layer, protective layer and the second oxide skin(coating), silicon perforation one end are revealed in the lower surface of silicon base layer, and the other end is revealed in the slot of holding tank
Bottom.By above-mentioned design, the copper that the disclosure can stop the electrode on the second oxide skin(coating) to generate using protective layer extrudes into
Silicon base layer avoids short circuit between silicon perforation.In addition, since protective layer is folded between two layers of oxide skin(coating), while optimizing protection
The stress state of layer.
It is described in detail above and/or illustrates a kind of semiconductor structure of disclosure proposition and showing for semiconductor devices
Example property embodiment.But embodiment of the present disclosure is not limited to particular implementation as described herein, on the contrary, each embodiment party
The component part and/or step of formula can be independent with other component parts as described herein and/or step and be used separately.One
Each component part of embodiment and/or each step can also be with the other component parts and/or step of other embodiment
It is used in combination.Introduce it is described here and/or diagram element/component part/wait whens, term "one", " one " and " on
State " etc. to indicate there are one or more elements/component part/etc..Term "comprising", " comprising " and " having " are to indicate
The open meaning being included and refer to that other want also may be present in the element/component part/in addition to listing other than waiting
Element/component part/etc..In addition, the term " first " and " second " etc. in claims and specification are only used as label,
It is not the numerical limit to its object.
Although a kind of semiconductor structure and semiconductor devices that have been proposed according to different specific embodiments to the disclosure
It is described, but it will be recognized by those skilled in the art can be in the spirit and scope of the claims to the implementation of the disclosure
It is modified.
Claims (14)
1. a kind of semiconductor structure, which is characterized in that the semiconductor structure includes:
Silicon base layer；
First oxide skin(coating) and the second oxide skin(coating), are sequentially disposed at from the bottom to top on the silicon base layer, second oxide skin(coating)
Upper surface offer holding tank；
Protective layer is set between first oxide skin(coating) and second oxide skin(coating), and the material hardness of the protective layer is big
In the material hardness of second oxide skin(coating)；
Silicon perforation is opened in the silicon base layer, first oxide skin(coating), the protective layer and second oxide skin(coating) and fills out
Filled with conductive material, the upper end of the silicon perforation is revealed in the slot bottom of the holding tank；And
Electrode is set in the holding tank.
2. semiconductor structure according to claim 1, which is characterized in that the conductive material includes copper or tungsten.
3. semiconductor structure according to claim 1, which is characterized in that the upper end of the silicon perforation stretches out in the receiving
The slot bottom of slot and the notch for being lower than the holding tank.
4. semiconductor structure according to claim 1, which is characterized in that the silicon perforation hole wall is equipped with insulating layer, will
The silicon perforation and the silicon base layer, first oxide skin(coating), the protective layer and the second oxide skin(coating) dielectric separation.
5. semiconductor structure according to claim 4, which is characterized in that the material of the insulating layer includes silica or nitrogen
SiClx.
6. semiconductor structure according to claim 1, which is characterized in that the material of first oxide skin(coating) includes oxidation
Silicon；And/or the material of second oxide skin(coating) includes silica.
7. semiconductor structure according to claim 1, which is characterized in that the material of the protective layer include silicon oxynitride,
Silicon carbide or silicon-carbon nitrogen.
8. semiconductor structure according to claim 1, which is characterized in that the protective layer has bending part, the bending
Portion is surrounded on the outer wall for the part of the silicon perforation being located in second oxide skin(coating), and the bending part is by the silicon perforation
The part and second oxide skin(coating) separate.
9. semiconductor structure according to claim 1, which is characterized in that second oxidation of the upper surface of the electrode
The upper surface of nitride layer is close to the silicon base layer.
10. semiconductor structure according to claim 9, which is characterized in that the upper surface of the electrode and second oxygen
Height difference between the upper surface of compound layer is 1 nanometer to 5 nanometers.
11. semiconductor structure according to claim 1, which is characterized in that the material of the electrode includes copper.
12. described in any item semiconductor structures according to claim 1~11, which is characterized in that the semiconductor structure also wraps
It includes:
Barrier layer, set on the upper surface of second oxide skin(coating), and the material hardness on the barrier layer is greater than second oxygen
The material hardness of compound layer.
13. semiconductor structure according to claim 12, which is characterized in that the material on the barrier layer includes silicon-carbon nitrogen.
14. a kind of semiconductor devices, which is characterized in that the semiconductor devices includes that claim 1~13 is described in any item
Semiconductor structure.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2021208831A1 (en) * | 2020-04-16 | 2021-10-21 | 长鑫存储技术有限公司 | Semiconductor structure and method for forming same, and semiconductor device |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2021208831A1 (en) * | 2020-04-16 | 2021-10-21 | 长鑫存储技术有限公司 | Semiconductor structure and method for forming same, and semiconductor device |
| CN113539944A (en) * | 2020-04-16 | 2021-10-22 | 长鑫存储技术有限公司 | Semiconductor structure, forming method thereof and semiconductor device |
| CN113539944B (en) * | 2020-04-16 | 2023-09-12 | 长鑫存储技术有限公司 | Semiconductor structure, forming method thereof and semiconductor device |
| US11854885B2 (en) | 2020-04-16 | 2023-12-26 | Changxin Memory Technologies, Inc. | Semiconductor structure, forming method thereof, and semiconductor device |
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