CN209105123U - A kind of pierce circuit - Google Patents
A kind of pierce circuit Download PDFInfo
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- CN209105123U CN209105123U CN201821090521.0U CN201821090521U CN209105123U CN 209105123 U CN209105123 U CN 209105123U CN 201821090521 U CN201821090521 U CN 201821090521U CN 209105123 U CN209105123 U CN 209105123U
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Abstract
The application provides a kind of pierce circuit, comprising: a current generating module and multiple delay units；The design rule of the grid length of switching tube meets condition in each delay unit: the temperature coefficient to the pierce circuit is target temperature coefficient.So that the output frequency of oscillator does not change with varying with temperature, to solve the problems, such as that the frequency of oscillator in the prior art varies with temperature and changes.
Description
Technical field
The utility model relates to semiconductor integrated circuit technology fields, and in particular to a kind of pierce circuit.
Background technique
Sequence circuit and substructure system are one of commonly used circuit structures in existing IC design, when
It is required to a clock in sequence circuit or substructure system and provides clock driving for whole system work.Clock driving is logical
It is often provided by ring oscillator, ring oscillator has mechanism simply and advantage at low cost, is often integrated in one
In a little chips and then omit some external devices.
Applicant it has been investigated that, the output of the ring oscillator is affected by temperature larger, and output frequency is with temperature
Degree variation and change, output frequency deviation is larger, such as when the temperature is changed, the frequency of output change can with deviation 50% with
On, for some to the higher occasion of frequency requirement, such deviation cannot receive.
Therefore, how a kind of oscillator that output frequency is not affected by temperature is provided, becomes those skilled in the art urgently
One of the technical issues of solution.
Utility model content
In view of this, the utility model embodiment provides a kind of delay cell parameter selection method, device and oscillator electricity
Road solves the problems, such as that the output frequency of oscillator in the prior art changes with varying with temperature to realize.
To achieve the above object, the utility model embodiment provides the following technical solutions:
A kind of delay cell parameter selection method, the design for calculating switching tube in delay cell in oscillating circuit are joined
Number, method include:
Temperature simulation is carried out to the oscillating circuit, obtains the temperature coefficient of the oscillating circuit；
When the temperature coefficient is not target temperature coefficient, according to the temperature coefficient and the target temperature coefficient
Comparison result adjusts the grid length of switching tube in the delay cell, continues to carry out temperature simulation to oscillating circuit adjusted, directly
Reach the target temperature coefficient to the temperature coefficient；
When the temperature coefficient reaches the target temperature coefficient, the design parameter of the oscillating circuit is exported.
Preferably, in above-mentioned delay cell parameter selection method, according to the temperature coefficient and the target temperature coefficient
Comparison result adjust the grid length of the switching tube, comprising:
Obtain predetermined gradient；
When the temperature coefficient is greater than target temperature coefficient, increases the grid length of the switching tube according to preset degree, work as institute
When stating temperature coefficient less than target temperature coefficient, reduce the grid length of the switching tube according to the preset degree.
Preferably, in above-mentioned delay cell parameter selection method, the acquisition predetermined gradient, comprising:
The difference of the temperature coefficient Yu target temperature coefficient is calculated, is matched according to mapping table acquisition with the difference
Predetermined gradient, wherein the value of the predetermined gradient got in the mapping table reduces as the difference reduces.
Preferably, in above-mentioned delay cell parameter selection method, the target temperature coefficient is 0.
Preferably, in above-mentioned delay cell parameter selection method, match according to mapping table acquisition with the difference pre-
If before gradient, further includes:
Obtain the design technology of the switching tube；
Obtain the mapping table to match with the design technology.
Preferably, in above-mentioned delay cell parameter selection method, when the grid length of switching tube in the delay cell is identical,
Before oscillating circuit progress temperature simulation, further includes: preset the maximum grid length and minimum grid length of the switching tube；
The grid length of switching tube in the adjustment delay cell, comprising:
Prolong according to the grid length of switching tube, maximum grid length and minimum grid length in the delay cell using described in dichotomy adjustment
The grid length of switching tube in slow unit.
Preferably, it in above-mentioned delay cell parameter selection method, when the temperature coefficient is target temperature coefficient, also wraps
It includes:
Obtain target frequency；
Obtain and export the grid width of switching tube corresponding with the target frequency；
Obtain the grid width of second switch corresponding with the target frequency.
A kind of delay cell parameter selection apparatus, the design for calculating switching tube in delay cell in oscillating circuit are joined
Number, device include:
Parameter setting unit, for setting the grid length of each switching tube in the oscillating circuit and the oscillating circuit,
When getting the trigger signal of the judging unit output, according to the temperature coefficient compared with the target temperature coefficient
As a result the grid length of switching tube in the delay cell is adjusted；
Simulation unit, the oscillating circuit for setting to the parameter setting unit carry out temperature simulation, obtain the vibration
Swing the temperature coefficient of circuit；It is also used to, when the grid of the switching tube in the oscillating circuit for detecting the parameter setting unit setting
When long adjustment, temperature simulation is carried out to oscillating circuit adjusted；
Judging unit, for obtaining the simulation result of the simulation unit, when the temperature coefficient is not target temperature system
When number, Xiang Suoshu parameter setting unit exports trigger signal, when the temperature coefficient is target temperature coefficient, to the output
Unit exports trigger signal；
Output unit exports setting for the oscillating circuit when for getting the trigger signal of the judging unit output
Count parameter.
Preferably, in above-mentioned delay cell parameter selection apparatus, the parameter setting unit is adjusting the delay cell
When the grid length of middle switching tube, it is specifically used for:
Obtain predetermined gradient；
When the temperature coefficient is greater than target temperature coefficient, increases the grid length of the switching tube according to preset degree, work as institute
When stating temperature coefficient less than target temperature coefficient, reduce the grid length of the switching tube according to the preset degree.
Preferably, in above-mentioned delay cell parameter selection apparatus, further includes:
Gradient acquisition unit, is used for: calculating the difference of the temperature coefficient Yu target temperature coefficient, obtains according to mapping table
The predetermined gradient to match with the difference, wherein the value of the predetermined gradient got in the mapping table is with the difference
Reduce and reduces.
Preferably, in above-mentioned delay cell parameter selection apparatus, further includes:
Mapping table extraction unit, is used for:
Obtain the design technology of the switching tube；
Obtain the mapping table to match with the design technology.
Preferably, in above-mentioned delay cell parameter selection apparatus, when in the delay cell of parameter setting unit setting
When the grid length of switching tube is identical, parameter setting unit knot compared with the target temperature coefficient according to the temperature coefficient
When fruit adjusts the grid length of switching tube in the delay cell, it is specifically used for:
Prolong according to the grid length of switching tube, maximum grid length and minimum grid length in the delay cell using described in dichotomy adjustment
The grid length of switching tube in slow unit, the maximum grid length and a length of preset permitted maximum grid length of the switching tube of minimum gate
With minimum grid length.
A kind of pierce circuit a, comprising: current generating module and multiple delay units；
The design rule of the grid length of switching tube meets condition in each delay unit: to the temperature of the pierce circuit
Degree coefficient is target temperature coefficient.
Preferably, in above-mentioned pierce circuit, the target temperature coefficient is 0.
Preferably, in above-mentioned pierce circuit, the grid length of switching tube is identical in each delay unit.
Preferably, in above-mentioned pierce circuit, the grid length of switching tube in the delay unit, by using above-mentioned any one
The method obtains.
Preferably, in above-mentioned pierce circuit, the switching tube in the delay unit is metal-oxide-semiconductor；
A metal-oxide-semiconductor group is included at least in each delay unit, the metal-oxide-semiconductor group includes that a grid is connected with each other
The first kind metal-oxide-semiconductor and Second Type metal-oxide-semiconductor.
Preferably, in above-mentioned pierce circuit, the pierce circuit includes the identical delay unit of 5 structures, each
Delay unit includes:
One PMOS tube and a NMOS tube, the grid of the PMOS tube are connected with the grid of NMOS tube, the PMOS tube
Drain electrode be connected with the drain electrode of NMOS tube, the source electrode for stating PMOS tube is connected with current generating module；
The grid of the PMOS tube of next stage delay unit is connected with the drain electrode of the PMOS tube of upper level delay unit；
The drain electrode of the PMOS tube of afterbody delay unit is connected with the grid of the PMOS tube of first order delay unit.
Preferably, in above-mentioned pierce circuit, the current generating module includes:
The non-inverting input terminal of comparator, the comparator is used for input reference voltage；
One end be connected with the inverting input terminal of the comparator other end ground connection resistance；
The first NMOS switch pipe that gate terminal is connected with the output end of the comparator, the first NMOS switch pipe
Output end is connected with the inverting input terminal of the comparator；
The first PMOS tube and the 2nd PMOS pipe that grid is connected with the drain electrode of the first NMOS switch pipe, described first
PMOS tube grid is connected with drain electrode, and the source electrode of first PMOS tube and the second PMOS tube is connected with external power supply, and described second
Output end of the drain electrode of PMOS tube as the current generating module.
Based on the above-mentioned technical proposal, scheme provided by the embodiment of the utility model, by carrying out temperature simulation to oscillator,
According to simulation result, obtain the temperature coefficient of the oscillator, according to the temperature coefficient compared with target temperature coefficient knot
Fruit adjusts the grid length of switching tube in the delay cell of the oscillator, then emulates to oscillator adjusted, until
Emulate until obtained temperature coefficient is the target temperature coefficient so that the output frequency of oscillator not with varying with temperature and
Variation, to solve the problems, such as that the frequency of oscillator in the prior art varies with temperature and changes.
Detailed description of the invention
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, the accompanying drawings in the following description is only
It is the embodiments of the present invention, for those of ordinary skill in the art, without creative efforts, also
Other attached drawings can be obtained according to the attached drawing of offer.
Fig. 1 is the basic block diagram of oscillator；
Fig. 2 is the schematic illustration of oscillator；
Fig. 3 is the basic schematic diagram of delay cell B；
Fig. 4 is the output frequency variation with temperature schematic diagram of oscillator at different temperatures；
Fig. 5 is a kind of flow diagram of delay cell parameter selection method disclosed in the embodiment of the present application；
Fig. 6 is a kind of structural schematic diagram of delay cell parameter selection apparatus provided by the embodiments of the present application；
Fig. 7 is a kind of electrical block diagram of oscillator disclosed in the embodiment of the present application.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without making creative work
Every other embodiment obtained, fall within the protection scope of the utility model.
Scheme the principle on which disclosed in the present application is understood in order to facilitate reader, disclosed in introducing the embodiment of the present application
Before delay cell parameter selection method and device, first the principle of the delay cell in oscillator is analyzed, wherein this Shen
Please be in technical solution disclosed in embodiment, the oscillator can be ring oscillator or other kinds of oscillator.
Fig. 1 is the basic block diagram of oscillator, and referring to Fig. 1, ring oscillator specifically includes that current generating module and several
The delay cell B of identical parameters.The current generating module is responsible for generation, and accurately electric current, certain electric current can also be given by the external world
It is fixed, it is exported after being adjusted by the current generating module to the given electric current in the external world, the delay cell B is determined finally
The frequency of oscillation.
Fig. 2 is the schematic illustration of oscillator, and referring to fig. 2, oscillator is made of multilevel delay unit B, general every level-one
Delay time it is equal, final feedback constitutes oscillatory system repeatedly to first delay cell.
The case where analyzing single delay cell B according to Fig. 3, Fig. 3 are the basic schematic diagram of delay cell B, in Fig. 3, often
A delay cell B is equivalent to grid NMOS and PMOS interconnected, and the electric current of current generating module output is applied to
Pmos source, the breadth length ratio that wherein breadth length ratio of NMOS is (W/L) N, PMOS is (W/L) P, and the two produces a voltage and is denoted as
V, intermediate node produce voltage Vg；
When oscillation, V is remained unchanged oscillator.Every grade of gate capacitance is W*L*Cox, and wherein Cox is unit area
Grid capacitance；
Known to calculating:
Wherein, Vtn is NMOS threshold
Value, un are electron mobility, and I is the current value that current generating module generates；
Wherein,
Up is hole mobility, and Vtp is PMOS threshold value；
After the grid of previous stage PMOS are V, NMOS is in zone of saturation, and saturation current is denoted as IoN；
After the grid of the PMOS of previous stage are 0, PMOS is in zone of saturation, and saturated circuit is denoted as IoP；
Each cycle of oscillation, the quantity of electric charge that single delay cell B passes through are Q；
Wherein, K is a harmonic constant.TD is denoted as by the sum of PMOS and NMOS delay time generated
Namely:
So, final clock frequency freq are as follows:
When the temperature of oscillator changes, the output frequency of the oscillator changes with temperature, needs at this time
It is corrected using output frequency of the temperature coefficient to oscillator, referring to fig. 4, Fig. 4 is the output of oscillator at different temperatures
Frequency variation with temperature schematic diagram, L is that the grid length of switching tube in delay unit B, analysis chart 4, such as gate length L are shorter in figure
When, temperature coefficient is positive, and when grid length L longer, temperature coefficient is negative.Can so there are a specific gate length, temperature
Coefficient is almost 0, at this time without being corrected according to temperature coefficient to the output frequency of oscillator, here, applicant grows this
Degree is defined as Ho`s BandGap (He Shi band gap).
In order to how determine the He Shi band gap of each switching tube in oscillating circuit, applicant discloses a kind of delay cell ginsengs
Number selection method and device.Fig. 5 is a kind of flow diagram of delay cell parameter selection method disclosed in the embodiment of the present application,
Its design parameter for being used to calculate switching tube in delay cell in oscillating circuit, referring to Fig. 5, method includes:
Step S101: temperature simulation is carried out to the oscillating circuit, obtains the temperature coefficient of the oscillating circuit；
In this step, when most starting, user can preset an oscillating circuit, and set each member in oscillating circuit
The parameter of part, when most starting, imitates oscillating circuit initially set including the grid length of switching tube in delay cell
Very；After the grid length for detecting switching tube adjusts, oscillating circuit adjusted is emulated again；
Step S102: the size of the temperature coefficient and target temperature coefficient, when the temperature coefficient is not target
When temperature coefficient, step S103 is executed, when the temperature coefficient reaches the target temperature coefficient, executes step S104；
Disclosed in execute the embodiment of the present application before method, it can be pre-designed a target temperature coefficient, can be
0 or its preset range value being also possible to be not more than preset threshold with 0 difference, such as the preset threshold can be for not
Greater than 0.1, at this point, the preset range value can be [- 0.1,0.1].
Step S103: the delay cell is adjusted according to the comparison result of the temperature coefficient and the target temperature coefficient
The grid length of middle switching tube executes step S101；
In this step, the switching tube refers to PMOS tube, NMOS tube or triode in the delay cell etc., when
The temperature coefficient is more than or less than target temperature coefficient, is required to adjust the grid length of switching tube in the delay cell
It is whole.
Step S104: the design parameter of the oscillating circuit is exported；
In this step, when the temperature coefficient reaches the target temperature coefficient, show design rationally, at this time without adopting
It is corrected with the frequency of oscillation that temperature coefficient exports oscillator, exportable design result.
Disclosed in the embodiment of the present application in above scheme, by carrying out temperature simulation to oscillator, according to simulation result,
The temperature coefficient of the oscillator is obtained, adjusts the oscillation according to the comparison result of the temperature coefficient and target temperature coefficient
The grid length of switching tube in the delay cell of device, then emulates to oscillator adjusted, until the temperature that emulation obtains
Until coefficient is the target temperature coefficient, so that the output frequency of oscillator does not change with varying with temperature, to improve
The precision of the output frequency of oscillator.
Further, the switching tube is adjusted in the comparison result according to the temperature coefficient and the target temperature coefficient
Grid length when, the direction of switching tube grid length that comparison result difference is adjusted is different, for example, if temperature coefficient is greater than target temperature
It when spending coefficient, needs to increase the grid length of switching tube, if temperature coefficient is less than target temperature coefficient, needs to reduce switching tube
Grid length, the gradient increased or reduced can be the preset gradient of user；
Therefore, in the above method, according to described in the adjustment of the comparison result of the temperature coefficient and the target temperature coefficient
The grid length of switching tube, can specifically include:
Obtain predetermined gradient；
When the temperature coefficient is greater than target temperature coefficient, increases the grid length of the switching tube according to preset degree, work as institute
When stating temperature coefficient less than target temperature coefficient, the grid length of the switching tube is reduced according to the preset degree；
Specifically, in the embodiment of the present application, increase the grid length of switching tube and reduce the grid length of switching tube, it is unified to delay
The grid length of all switching tubes is increased or reduced in unit.
Disclosed in the embodiment of the present application in technical solution, if the difference of the temperature coefficient and target temperature coefficient compared with
When big, the grid length value of required increase or reduceds switching tube is larger, and the difference of the temperature coefficient and target temperature coefficient compared with
Hour, the grid length value of required increase or reduced switching tube is smaller, if be difficult to using fixed preset degree drop so that the temperature
Degree coefficient is rapidly achieved the target temperature coefficient, in view of this, can preparatory needle in technical solution disclosed in the embodiment of the present application
Different predetermined gradients are arranged from the difference of target temperature coefficient to temperature coefficient, it will be between the difference and each predetermined gradient
Corresponding relationship be stored in mapping table, the value of the predetermined gradient got in the mapping table subtracts as the difference reduces
It is small, when needing to adjust the grid length of switching tube, corresponding predetermined gradient is first obtained, then according to predetermined gradient switch tube
Grid length is adjusted, and therefore, in the above method, the acquisition predetermined gradient may include:
The difference of the temperature coefficient Yu target temperature coefficient is calculated, is matched according to mapping table acquisition with the difference
Predetermined gradient.
Disclosed in the embodiment of the present application in technical solution, the size of the predetermined gradient in addition to the difference in relation to it
Outside, also related to the design technology for opening hanging tube, the technique of switching tube is different, selected predetermined gradient under identical difference
Value is also just different.In circuit design, switching tube in same circuit design technology it is usually identical, therefore, the application is real
It applies in technical solution disclosed in example, different mapping tables, therefore, the above method can be pre-configured with for different design technologies
In, before the predetermined gradient that mapping table obtains and the difference matches, further includes: obtain the design work of the switching tube
Skill；The mapping table to match with the design technology is obtained, the default ladder to match with the difference is obtained according to the mapping table
Degree.
When adjusting the grid length of the switching tube in delay cell, in addition to searching predetermined gradient according to mapping table, according to default
Gradient is adjusted except the mode of the grid length of the switching tube in delay cell, can also use the grid length of dichotomy regulating switch pipe,
The target grid length of the switching tube can be quickly determined using dichotomy method, still, this will require to need to know the delay
The initial grid length of switching tube in unit, and, the initial grid length of each switching tube requires consistent.If each switch in delay cell
When the initial grid length of pipe is inconsistent, the grid length of switching tube when can not determine the original state, therefore, it is impossible to using dichotomy into
Row is adjusted, and when switching tube each in the delay cell uses same grid length, it will be able to using dichotomy to the switch
The grid length of pipe is quickly adjusted, specifically, in above scheme, it is right when the grid length of switching tube in the delay cell is identical
The oscillating circuit carries out before temperature simulation further include: presets the maximum grid length and minimum grid length of the switching tube；
The grid length of switching tube in the adjustment delay cell, comprising:
Prolong according to the grid length of switching tube, maximum grid length and minimum grid length in the delay cell using described in dichotomy adjustment
The grid length of switching tube in slow unit.
Specifically, in dichotomy scheme different maximum grid lengths can be designed for the switching tube of different process type
With minimum grid length, the grid length of switching tube, maximum grid length and minimum grid length are adjusted using dichotomy according to the delay cell
In the delay cell before the grid length of switching tube, it is also necessary to according to the switching tube the corresponding maximum grid length of grid length selection and
Minimum grid length.
If since the frequency of the oscillating circuit has determined, due to there is one-to-one close between grid width and frequency
System, then the grid width of the switching tube in oscillating circuit delay cell also determines that, therefore, the skill disclosed in the embodiment of the present application
In art scheme, in addition to can export can also be exported in the delay cell other than the grid length of switching tube the grid width of switching tube with
And the output current value of designed current generating module A, therefore, in the above method, when the temperature coefficient is target temperature
When coefficient, further includes:
Obtain target frequency；
Obtain and export the grid width of switching tube corresponding with the target frequency；
Obtain the grid width of second switch corresponding with the target frequency.
Corresponding to the above method disclosed herein as well is a kind of delay cell parameter selection apparatus, the embodiment of the present application is disclosed
Method and apparatus conceive for same utility model, the technical characteristic in the device can be with the technical characteristic in the method
Description is mutually used for reference, and since utility model design being described in detail in the above method, is introduced to device
When, description is relatively simple, and detail section is described referring to method.
Fig. 6 is a kind of structural schematic diagram of delay cell parameter selection apparatus provided by the embodiments of the present application, the delay
Cell parameters selection device is used to calculate the design parameter of switching tube in delay cell in oscillating circuit, referring to Fig. 6, device packet
It includes:
Parameter setting unit 100, Partial Feature is corresponding with step S103 in the above method, for setting the oscillation
The grid length of each switching tube in circuit and the oscillating circuit, when getting the trigger signal of the judging unit output,
Comparison result according to the temperature coefficient and the target temperature coefficient adjusts the grid length of switching tube in the delay cell；
Simulation unit 200, it is corresponding with step S101 in the above method, for what is set to the parameter setting unit
Oscillating circuit carries out temperature simulation, obtains the temperature coefficient of the oscillating circuit；It is also used to, when detecting the parameter setting list
When the grid length adjustment of the switching tube in the oscillating circuit of member setting, temperature simulation is carried out to oscillating circuit adjusted；
Judging unit 300, it is corresponding with step S102 in the above method, for obtaining the emulation knot of the simulation unit
Fruit, when the temperature coefficient is not target temperature coefficient, Xiang Suoshu parameter setting unit exports trigger signal, when the temperature
When coefficient is target temperature coefficient, Xiang Suoshu output unit exports trigger signal；
Output unit 400, it is corresponding with step S104 in the above method, for getting the judging unit output
When trigger signal, the design parameter of the oscillating circuit is exported.
Disclosed in the embodiment of the present application in above scheme, parameter setting unit 100 sets the design parameter of oscillator, so
Temperature simulation is carried out to oscillator by simulation unit 200 afterwards, the temperature coefficient and target temperature that judging unit 300 obtains emulation
Degree coefficient is compared, according to comparison result trigger parameter setup unit 100 or output unit, when 100 quilt of parameter setting unit
When triggering, the comparison result according to the temperature coefficient and the target temperature coefficient adjusts switching tube in the delay cell
Then grid length works in triggering simulation unit 200, the temperature coefficient for obtaining emulation is identical as target temperature coefficient,
So that the output frequency of oscillator does not change with varying with temperature, to improve the precision of the output frequency of oscillator.
Corresponding to the above method, the parameter setting unit 100 in adjusting the delay cell when grid length of switching tube,
It is specifically used for:
Obtain predetermined gradient；
When the temperature coefficient is greater than target temperature coefficient, increases the grid length of the switching tube according to preset degree, work as institute
When stating temperature coefficient less than target temperature coefficient, reduce the grid length of the switching tube according to the preset degree.
Corresponding to the above method, in above-mentioned apparatus, can also include:
Gradient acquisition unit, is used for: calculating the difference of the temperature coefficient Yu target temperature coefficient, obtains according to mapping table
The predetermined gradient to match with the difference, wherein the value of the predetermined gradient got in the mapping table is with the difference
Reduce and reduces.
Corresponding to the above method, can also include: in above-mentioned apparatus
Mapping table extraction unit, is used for:
Obtain the design technology of the switching tube；
Obtain the mapping table to match with the design technology.
Corresponding to the above method, in above-mentioned apparatus, when switching tube in the delay cell of parameter setting unit setting
When grid length is identical, the parameter setting unit adjusts institute according to the comparison result of the temperature coefficient and the target temperature coefficient
When stating the grid length of switching tube in delay cell, it is specifically used for:
Prolong according to the grid length of switching tube, maximum grid length and minimum grid length in the delay cell using described in dichotomy adjustment
The grid length of switching tube in slow unit, the maximum grid length and a length of preset permitted maximum grid length of the switching tube of minimum gate
With minimum grid length.
Corresponding to the above method and device, disclosed herein as well is a kind of pierce circuits, comprising: an electric current generates mould
Block A and multiple delay unit B；
The design rule of the grid length of switching tube meets condition in each delay unit B: to the pierce circuit
Temperature coefficient is target temperature coefficient, i.e., by the way that suitable grid length is arranged to the switching tube in the delay unit B, so that described
Oscillator temperature coefficient is target temperature coefficient, and herein, the target temperature coefficient can be 0, at this time the oscillator
Output frequency does not change with oscillator temperature and is changed, wherein the grid length of the switching tube in the delay unit B can be use
The grid length for the switching tube that method or apparatus disclosed in the above-mentioned any one embodiment of the application is analyzed.
In order to facilitate design, disclosed in the embodiment of the present application in technical solution, switched in each delay unit B
The grid length of pipe is identical, design technology is identical, its certain grid width can also be identical.
It further, is a kind of electrical block diagram of oscillator disclosed in the embodiment of the present application referring to Fig. 7, Fig. 7, this
Apply in technical solution disclosed in embodiment, the switching tube in the delay unit B is MOS pipe, each delay unit B
In include at least a metal-oxide-semiconductor group, the metal-oxide-semiconductor group includes the metal-oxide-semiconductor and second of a grid first kind interconnected
The metal-oxide-semiconductor of type.That is, any increase or reduce MOS by attempting on the basis of metal-oxide-semiconductor group in delay cell
The connection of pipe, belongs to the scope of this patent.
Optionally, disclosed in the embodiment of the present application in technical solution, the pierce circuit includes that 2n+1 delay is single
First B, for example, with reference to Fig. 7, the pierce circuit may include the identical delay unit B of 5 structures, referring to Fig. 7, Mei Geyan
Shi DanyuanB includes:
One PMOS tube and a NMOS tube, the grid of the PMOS tube are connected with the grid of NMOS tube, the PMOS tube
Drain electrode be connected with the drain electrode of NMOS tube, the source electrode for stating PMOS tube is connected with current generating module A；
The grid of the PMOS tube of next stage delay unit B is connected with the drain electrode of the PMOS tube of upper level delay unit B；
The drain electrode of PMOS tube is connected with the grid of the PMOS tube of first order delay unit B in afterbody delay unit B.
In addition, disclosed herein as well is a kind of specific structure of pierce circuit, referring to Fig. 7, the current generating module A
Include:
The non-inverting input terminal of comparator OP, the comparator OP are used for input reference voltage；
One end be connected with the inverting input terminal of the comparator OP other end ground connection resistance R；
The first NMOS switch pipe M1 that gate terminal is connected with the output end of the comparator, the first NMOS switch pipe
The output end of M1 is connected with the inverting input terminal of the comparator OP；
The first PMOS tube M2 that grid is connected with the drain electrode of the first NMOS switch pipe M1 and the second PMOS tube M3, it is described
First PMOS tube grid M2 is connected with drain electrode, the source electrode and external power supply phase of the first PMOS pipe M2 and the second PMOS tube M3
Even, output end of the drain electrode of the second PMOS tube M3 as the current generating module A.
It further, can also include filter capacitor C, the first end of the filter capacitor C in foregoing circuit referring to Fig. 7
It is connected with the output end of the current generating module A, second end ground connection.
For convenience of description, it is divided into various modules when description system above with function to describe respectively.Certainly, implementing this
The function of each module can be realized in the same or multiple software and or hardware when application.
All the embodiments in this specification are described in a progressive manner, same and similar portion between each embodiment
Dividing may refer to each other, and each embodiment focuses on the differences from other embodiments.Especially for system or
For system embodiment, since it is substantially similar to the method embodiment, so describing fairly simple, related place is referring to method
The part of embodiment illustrates.System and system embodiment described above is only schematical, wherein the conduct
The unit of separate part description may or may not be physically separated, component shown as a unit can be or
Person may not be physical unit, it can and it is in one place, or may be distributed over multiple network units.It can root
According to actual need that some or all of the modules therein is selected to achieve the purpose of the solution of this embodiment.Ordinary skill
Personnel can understand and implement without creative efforts.
Professional further appreciates that, unit described in conjunction with the examples disclosed in the embodiments of the present disclosure
And algorithm steps, can be realized with electronic hardware, computer software, or a combination of the two, in order to clearly demonstrate hardware and
The interchangeability of software generally describes each exemplary composition and step according to function in the above description.These
Function is implemented in hardware or software actually, the specific application and design constraint depending on technical solution.Profession
Technical staff can use different methods to achieve the described function each specific application, but this realization is not answered
Think beyond the scope of the utility model.
The step of method described in conjunction with the examples disclosed in this document or algorithm, can directly be held with hardware, processor
The combination of capable software module or the two is implemented.Software module can be placed in random access memory (RAM), memory, read-only deposit
Reservoir (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technology
In any other form of storage medium well known in field.
It should also be noted that, herein, relational terms such as first and second and the like are used merely to one
Entity or operation are distinguished with another entity or operation, without necessarily requiring or implying between these entities or operation
There are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant are intended to contain
Lid non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those
Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or equipment
Intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that
There is also other identical elements in process, method, article or equipment including the element.
The foregoing description of the disclosed embodiments can be realized professional and technical personnel in the field or using originally practical new
Type.Various modifications to these embodiments will be readily apparent to those skilled in the art, and determine herein
The General Principle of justice can be realized in other embodiments without departing from the spirit or scope of the present utility model.Cause
This, the present invention will not be limited to the embodiments shown herein, and is to fit to and principles disclosed herein
The widest scope consistent with features of novelty.
Claims (5)
1. a kind of pierce circuit characterized by comprising a current generating module and multiple delay units；
The grid length of switching tube in the delay unit be so that the oscillator temperature coefficient is the grid length of target temperature coefficient,
The target temperature coefficient is 0.
2. pierce circuit according to claim 1, which is characterized in that the grid length of switching tube in each delay unit
It is identical.
3. pierce circuit according to claim 1, which is characterized in that the switching tube in the delay unit is metal-oxide-semiconductor；
A metal-oxide-semiconductor group is included at least in each delay unit, the metal-oxide-semiconductor group includes a grid interconnected the
The metal-oxide-semiconductor of one type and the metal-oxide-semiconductor of Second Type.
4. pierce circuit according to claim 1, which is characterized in that the pierce circuit includes that 5 structures are identical
Delay unit, each delay unit includes:
One PMOS tube and a NMOS tube, the grid of the PMOS tube are connected with the grid of NMOS tube, the leakage of the PMOS tube
Pole is connected with the drain electrode of NMOS tube, and the source electrode for stating PMOS tube is connected with current generating module；
The grid of the PMOS tube of next stage delay unit is connected with the drain electrode of the PMOS tube of upper level delay unit；
The drain electrode of the PMOS tube of afterbody delay unit is connected with the grid of the PMOS tube of first order delay unit.
5. pierce circuit according to claim 1, which is characterized in that the current generating module includes:
The non-inverting input terminal of comparator, the comparator is used for input reference voltage；
One end be connected with the inverting input terminal of the comparator other end ground connection resistance；
The first NMOS switch pipe that gate terminal is connected with the output end of the comparator, the output end of the first NMOS switch pipe
It is connected with the inverting input terminal of the comparator；
The first PMOS tube and the second PMOS tube that grid is connected with the drain electrode of the first NMOS switch pipe, first PMOS tube
Grid is connected with drain electrode, and the source electrode of first PMOS tube and the second PMOS tube is connected with external power supply, second PMOS tube
Output end of the drain electrode as the current generating module.
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|---|---|---|---|
| CN201821090521.0U CN209105123U (en) | 2018-07-10 | 2018-07-10 | A kind of pierce circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201821090521.0U CN209105123U (en) | 2018-07-10 | 2018-07-10 | A kind of pierce circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108988789A (en) * | 2018-07-10 | 2018-12-11 | 上海艾为电子技术股份有限公司 | A kind of delay cell parameter selection method, device and pierce circuit |
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2018
- 2018-07-10 CN CN201821090521.0U patent/CN209105123U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108988789A (en) * | 2018-07-10 | 2018-12-11 | 上海艾为电子技术股份有限公司 | A kind of delay cell parameter selection method, device and pierce circuit |
| CN108988789B (en) * | 2018-07-10 | 2023-11-07 | 上海艾为电子技术股份有限公司 | Delay unit parameter selection method and device and oscillator circuit |
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