CN209103795U - Array substrate and display panel - Google Patents
Array substrate and display panel Download PDFInfo
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- CN209103795U CN209103795U CN201822114682.5U CN201822114682U CN209103795U CN 209103795 U CN209103795 U CN 209103795U CN 201822114682 U CN201822114682 U CN 201822114682U CN 209103795 U CN209103795 U CN 209103795U
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- cabling
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- 239000000758 substrate Substances 0.000 title claims abstract description 32
- 210000000746 body region Anatomy 0.000 claims abstract description 19
- 238000009413 insulation Methods 0.000 claims description 8
- 230000005540 biological transmission Effects 0.000 claims description 7
- 238000003032 molecular docking Methods 0.000 claims description 6
- 239000011800 void material Substances 0.000 claims description 3
- 230000007547 defect Effects 0.000 abstract 1
- 230000008878 coupling Effects 0.000 description 5
- 238000010168 coupling process Methods 0.000 description 5
- 238000005859 coupling reaction Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 239000010408 film Substances 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
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Abstract
The application relates to an array substrate and a display panel. The array substrate includes: a driving region for outputting an electrical signal; a body region for receiving an electrical signal; the wiring area is provided with at least two wiring units, and each wiring unit comprises a signal wiring and a dummy wiring which are arranged in an insulated and opposite mode; the signal routing is connected with the driving area and the main body area and used for transmitting electric signals; the direction from the main body area to the driving area is a first direction, the direction perpendicular to the first direction is a second direction, and the dummy lines of the same wiring unit are divided into a plurality of sections arranged at intervals in the first direction; at least two routing units are arranged at intervals in the second direction, and the virtual lines of at least two adjacent routing units are arranged in a staggered mode. The display defect problem caused by short circuit of the dummy line can be effectively improved.
Description
Technical field
This application involves field of display technology, more particularly to a kind of array substrate and display panel.
Background technique
Here statement only provides background information related with the application, without the inevitable composition prior art.
With the development of science and technology, display technology is more and more mature, the quality of display panel is also being stepped up.Display panel
Generally include outside lead combined area (the out leadbonding of viewing area (active area, AA) and non-display area
Area, OLB).Each sub-pixel in the area AA is electrical connected by signal wire (scan line/data line) and the driving chip in the area OLB.
Driving chip and signal wire are connected with each other by the signal lead in the area OLB.
The sub-pixel in the area AA includes pixel electrode.Pixel electrode includes one layer of indium tin oxide transparent conductive semiconductor film layer
(ito thin film layer).It is graphically formed in the technical process of ito thin film layer of each sub-pixel, in order to reduce the fringe region in the area AA
With the wet etching difference of middle section, it is illusory generally a floor to be done on the signal lead at a certain distance from distance area AA
ITO (dummy ITO) line.Dummy ITO line and the insulation of corresponding signal cabling are opposite, therefore therebetween with the coupling of electric signal
Cooperation is used.Adjacent two dummy ITO line is shorted meeting so that the mutual shadow of voltage signal on adjacent two bars cabling accordingly
It rings, and then seriously affects the quality of display screen.
Utility model content
Based on this, it is necessary in view of the above technical problems, provide one kind can improve dummy line be shorted caused by show not
The array substrate and display panel of good problem.
A kind of array substrate, comprising:
Area is driven, for exporting electric signal；
Body region, for receiving the electric signal；
Cabling area, is equipped at least two wiring units, the wiring unit include the signal lead that is oppositely arranged of insulation with
And dummy line；The signal lead connects the driving area and the body region, is used for transmission the electric signal；
The body region to the driving area direction is first direction, and the direction vertical with the first direction is second party
To the dummy line of the same wiring unit is divided into spaced multistage in a first direction；
At least two wiring unit is alternatively arranged in this second direction, at least two adjacent wiring units
The dummy line is arranged in a staggered manner.
At least two wiring units form a cabling group in one of the embodiments, and the cabling area is equipped with
At least two cabling groups, at least two cablings group are alternatively arranged in this second direction；
The dummy line of each wiring unit in the same cabling group is aligned setting, two adjacent cabling groups
The dummy line be arranged in a staggered manner.
The number of the wiring unit in each cabling group is identical in one of the embodiments,.
The length of each section of dummy line is less than or equal to 500 μm in one of the embodiments,.
A face vertical with the second direction is reference planes in one of the embodiments, and adjacent two are walked
Orthographic projection of the dummy line of line unit in the reference planes is separated from each other.
A face vertical with the second direction is reference planes in one of the embodiments, and adjacent two are walked
Orthographic projection docking of the dummy line of line unit in the reference planes.
The total length of the signal lead in each wiring unit is identical in one of the embodiments,.
The total length of the dummy line in each wiring unit is identical in one of the embodiments,.
A kind of array substrate, comprising:
Area is driven, for exporting electric signal；
Body region, for receiving the electric signal；
Cabling area, is equipped with multiple wiring units, and the wiring unit includes the signal lead and void that insulation is oppositely arranged
If line；The signal lead connects the driving area and the body region, is used for transmission the electric signal；
The body region to the driving area direction is first direction, and the direction vertical with the first direction is second party
To the multiple wiring unit is alternatively arranged in this second direction, and the dummy line of the same wiring unit is
It is divided into spaced multistage on one direction, the length of each section of dummy line is less than or equal to 500 μm,
A face vertical with the second direction be reference planes, two wiring units of arbitrary neighborhood it is described illusory
Orthographic projection docking of the line in the reference planes.
A kind of display panel, including array substrate described in any of the above embodiments.
Above-mentioned array substrate, the dummy line of same wiring unit are divided into spaced multistage in a first direction.Therefore,
The dummy line of same wiring unit is discontinuous in a first direction, has gap between each section of dummy line.At least two is adjacent
The dummy line of wiring unit is arranged in a staggered manner.So the distance between the adjacent dummy line of wiring unit of distance recently is drawn
It is not easy to be shorted greatly.And non-adjacent wiring unit distance is farther out, dummy line thereon is also not easy to be shorted.Therefore, different
The dummy line of wiring unit is not easy to be shorted.Therefore, the application can be effectively improved the bad problem of display caused by dummy line is shorted.
Detailed description of the invention
Fig. 1 is display panel schematic diagram in one embodiment；
Fig. 2 is array substrate schematic diagram in one embodiment；
Fig. 3 is the area array substrate A schematic diagram shown in Fig. 2；
Fig. 4 is cabling area diagrammatic cross-section in one embodiment；
Fig. 5 is the area array substrate A schematic diagram in another embodiment；
Fig. 6 is the area array substrate A schematic diagram in another embodiment.
Specific embodiment
It is with reference to the accompanying drawings and embodiments, right in order to which the objects, technical solutions and advantages of the application are more clearly understood
The application is further elaborated.It should be appreciated that specific embodiment described herein is only used to explain the application, not
For limiting the application.
Array substrate provided by the present application, can be applied to various types of display panels, for example, liquid crystal display panel or
Organic light emitting display panel etc..
Display panel generally includes the outside lead combined area of viewing area (active area, AA) and non-display area
(out leadbonding area, OLB).In the area AA with multiple sub-pixels and be each sub-pixel power supply signal wire.OLB
Area includes cabling area and driving area.There is signal lead, driving has driving chip in area in cabling area.Each sub- picture in the area AA
Element is electrical connected by signal wire (scan line/data line) and the driving chip in the area OLB.Driving chip and signal wire pass through OLB
The signal lead in area is connected with each other.Signal lead is usually to be formed with signal wire same layer, connect with signal wire and then realizes letter
Number transmission.The usual area AA size is greater than driving area's size, therefore cabling area between the two is usually fan-out structure.
Meanwhile the sub-pixel in the area AA includes pixel electrode.Pixel electrode, which includes that one layer of indium tin oxide semiconductor is transparent, leads
Electrolemma layer (ito thin film layer).Among technical process, in order to form the pixel electrode of each sub-pixel, one layer of ITO is usually first deposited
Then film carries out wet etching and forms patterned pixel electrode.Wet etching usually there will be AA area edge and center is carved
Lose irregular phenomenon.Fringe region etching degree will overweight middle section, be easy quarter.
It, generally can be at a certain distance from the distance area AA in order to reduce the fringe region in the area AA and the etching difference of middle section
Signal lead on make one layer of illusory ITO (dummy ITO) line.Dummy ITO line and signal lead insulation it is opposite but not
Receive any signal, i.e., is transmitted without signal.But dummy ITO line is in the surface of signal lead.So dummy
For ITO when having signal voltage in signal lead corresponding thereto, meeting inductive coupling goes out certain charge, and then has certain electricity
Position.
ITO layer is normally at the top layer of the array substrate of display panel, and inventor's research discovery has been easy to conductive miscellaneous
Matter is fallen on dummy ITO line, and adjacent dummy ITO line is shorted.Alternatively, being also easy if ITO etching is not clean
Adjacent dummy ITO line is caused to be shorted.Adjacent two dummy ITO line can be either way made to be shorted.Dummy ITO line
On signal signal lead corresponding thereto on voltage signal influence each other.Adjacent two dummy ITO line be shorted meeting so that
Voltage signal on corresponding adjacent two bars cabling is pullled mutually, and then seriously affects the quality of display screen.For example, signal
When line is data line, the voltage signal on adjacent two bars cabling is pullled mutually, will lead to corresponding adjacent two column data line
The sub-pixel of upper connection show it is partially dark, cause on display panel generate concealed wire phenomenon.
In view of the above technical problems, this application provides a kind of array substrate and display panels.
In one embodiment, with reference to Fig. 1 and Fig. 2, provide a kind of display panel, including multiple sub-pixels 100 and
Array substrate 200.Multiple sub-pixels can be respectively the sub-pixel with multiple and different colors, such as red sub-pixel R, green
Sub-pixel G and blue subpixels B etc..Array substrate 200 is that each sub-pixel 100 is powered.
In one embodiment, with reference to Fig. 2, array substrate 200 includes driving area 210, body region 220 and cabling area
230.Drive in area 210 and be equipped with driving chip (not shown), driving chip can export electric signal, and then based on area 220 supply
Electricity.Specifically, driving area 210 can refer to the region equipped with turntable driving, also can refer to the region equipped with data-driven, or simultaneously
Refer to the region for being equipped with turntable driving with being equipped with data-driven.With reference to Fig. 1, body region 220 can be equipped with for receiving electric signal
It is electrically connected the scan line 221 and data line 222 of each sub-pixel.Scan line 221 is that each sub-pixel 100 provides scanning signal, in turn
Open each sub-pixel.222 son of data line charges when scan line 221 opens sub-pixel for sub-pixel.
With reference to Fig. 2, cabling area 230 can be the fan-out structure for including rectangle region and fan section.With reference to Fig. 3, cabling area 230
Inside it is equipped at least two wiring unit 230a.Each wiring unit 230a includes the signal lead 231 and void that insulation is oppositely arranged
If line 232, with reference to Fig. 3 and Fig. 4, there is insulating layer 233 between signal lead 231 and dummy line 232.Set body region
220 to driving area 230 direction be first direction (vertical direction i.e. in figure), the direction vertical with first direction be second party
To (horizontal direction i.e. in figure).At least two wiring unit 230a are alternatively arranged in a second direction, so that each cabling
The signal lead 231 of unit 230a can be supplied respectively to the data line (or the scan line that do not go together) positioned at different lines
Electricity, so that each sub-pixel of display panel can normally be shown.
With reference to Fig. 3, the dummy line 232 of same wiring unit 230a is divided into spaced multistage in a first direction.Cause
This, the dummy line 232 of same wiring unit 230a is discontinuous in a first direction, has gap between each section of dummy line 232.Extremely
The dummy line 232 of few two adjacent wiring unit 230a is arranged in a staggered manner.So the adjacent wiring unit 230a that distance is nearest
The distance between dummy line 232 widened and be not easy to be shorted.And non-adjacent wiring unit 230a distance is farther out, thereon
Dummy line 232 is also not easy to be shorted.
Therefore, the dummy line 232 of the different wiring unit 230a in the embodiment of the present application is not easy to be shorted.Even if also,
The part dummy line 232 of different wiring unit 230a is shorted, but due to each section of dummy line 232 in same wiring unit 230a
And it is not connected to, therefore the coupling influence of adjacent signals cabling 231 can be also effectively reduced in short circuit.Therefore, the embodiment of the present application had been both
Can be by the protection of dummy line 232 so that the area the AA etching of display panel is relatively uniform, but it is short to be effectively improved dummy line
The bad problem of display caused by connecing.
Here " dummy line of adjacent wiring unit is arranged in a staggered manner ", can be " the dummy line of adjacent wiring unit
Be staggered (such as being to be staggered in Fig. 3 completely) completely " it is also possible to " the dummy line part of adjacent wiring unit is staggered ".The application
In embodiment, the dummy line 232 that can be the wiring unit 230a of arbitrary neighborhood is arranged in a staggered manner, and it is adjacent to be also possible to part
The dummy line 232 of wiring unit 230a is arranged in a staggered manner, and the application is to this without limitation.
In one embodiment, a cabling group 230b is formed with reference to Fig. 5, at least two wiring unit 230a.Cabling area
230 are equipped at least two cabling group 230b, and at least two cabling group 230b are alternatively arranged in a second direction.Same cabling group
The dummy line 232 of each wiring unit in 230b is aligned setting, i.e., any dummy line 232 of any wiring unit 230a is first
Two endpoints of two endpoints to the corresponding dummy line 232 of wiring unit 230a adjacent thereto in a first direction on direction
Line be parallel to second direction.The dummy line 232 of two adjacent cabling group 230b is arranged in a staggered manner.At this point, i.e. adjacent two
The dummy line 232 of the adjacent traces unit 230a of a cabling group 230b is staggered, therefore dummy line 232 can be prevented to be shorted.Meanwhile
The present embodiment also enriches the design form of the wiring unit 230a in cabling area 230, can be according to specific feelings in practical application
Condition flexible design.
In one embodiment, with continued reference to Fig. 5, further, by the wiring unit 230a's in each cabling group 230b
Number setting is identical.Therefore, the design in entire cabling area 230 is more uniform, and then more uniformly prevents dummy line 232 short
It connects, so that performance is uniform everywhere for display panel.It certainly, can not also by the number of the wiring unit 230a in each cabling group 230b
Identical, the application is not limited in this respect.
In one embodiment, the length that each section of dummy line 232 is arranged is less than or equal to 500 μm.Even if at this point, a cabling list
The dummy line 232 of a certain section of dummy line 232 of first 230a and other wiring units 230a are shorted, but this section of dummy line 232 with
Other section of dummy line 232 in same wiring unit 230a is simultaneously not connected to, other section of dummy line in same wiring unit 230a
232 can't be in short circuit state.And the length very little (being less than or equal to 500 μm) for a dummy line 232 being shorted.So
Short circuit is very low between the coupling influence signal lead 231, and then can preferably improve display caused by dummy line 232 is shorted not
It is good.
In one embodiment, with reference to Fig. 6, a face vertical with second direction is reference planes, and adjacent two are walked
The orthographic projection of the dummy line 232 of line unit 230a on the reference plane is separated from each other.Therefore, two adjacent wiring unit 230a
The dummy line 232 that is staggered, and is staggered completely of dummy line 232 there is certain distance in a first direction, and then increase adjacent
The distance between the dummy line 232 of two wiring unit 230a, to be better protected from short circuit.
In one embodiment, with reference to Fig. 3, the different modes with above-described embodiment, a face vertical with second direction
For reference planes, the orthographic projection docking of the dummy line 232 of two adjacent wiring unit 230a on the reference plane.At this point, phase
The dummy line 232 that the dummy line 232 of two adjacent wiring unit 230a is also staggered completely, but is staggered in a first direction away from
From being 0.Therefore, the present embodiment can be equipped with the longer dummy line of length in a first direction in identical cabling area 230
232, and then be conducive to the protective action by dummy line 232, so that the area the AA etching of display panel is more uniform.
In one embodiment, the total length that the signal lead 231 of 230a in each wiring unit is arranged is identical.And technique mistake
The width and cross-sectional area of each signal lead 231 formed among journey are usually same or similar, and each signal lead 231
Material is identical.Therefore, the data-driven (or turntable driving) and (or each scan line of each data line 222 in area 210 are driven at this time
221) lead (i.e. each signal lead 231) resistance value between is same or similar.Each 231 resistance value of signal lead is same or similar, subtracts
Lacked resistance value difference between line and line, so effectively prevent display panel because between each signal lead 231 resistance value difference it is excessive
And there is luminance difference.Therefore, the present embodiment shows display panel more uniform, ensure that the picture of display panel is shown
Quality.
In one embodiment, be arranged the signal lead of 230a in each wiring unit total length it is identical while, setting
The total length of dummy line 232 in each wiring unit 230a is identical.Therefore, the dummy line 232 in each wiring unit 230a and letter
The coupling condition of number cabling 231 is identical, i.e., each signal lead 231 by dummy line 232 to be influenced situation identical.Therefore, may be used
And then further ensure that actual pressure drop of each signal lead 231 in signals transmission is identical, so that display panel is actually equal
Even display.
In one embodiment, array substrate includes driving area 210, body region 220, cabling area 230.Area 210 is driven to use
In output electric signal.Body region 220 is for receiving electric signal.Cabling area 230 is equipped with multiple wiring unit 230a.Wiring unit
230a includes the signal lead 231 and dummy line 232 that insulation is oppositely arranged.The connection of signal lead 231 driving area 210 and main body
Area 220, is used for transmission electric signal.
Body region 220 to driving 210 direction of area is first direction.The direction vertical with first direction is second direction.It is more
A wiring unit 230a is alternatively arranged in a second direction.The dummy line 232 of same wiring unit 230a divides in a first direction
For spaced multistage.The length of each section of dummy line 232 is less than or equal to 500 μm.A face vertical with second direction is ginseng
Examine plane, the orthographic projection docking of the dummy line 232 of two adjacent wiring unit 230a on the reference plane.
In conclusion array substrate provided by the present application, the dummy line of at least two adjacent wiring units is arranged in a staggered manner.
Therefore, the dummy line of different wiring units is not easy to be shorted.Therefore, the application can be effectively improved display caused by dummy line is shorted
Bad problem.
Each technical characteristic of above embodiments can be combined arbitrarily, for simplicity of description, not to above-described embodiment
In each technical characteristic it is all possible combination be all described, as long as however, the combination of these technical characteristics be not present lance
Shield all should be considered as described in this specification.
The several embodiments of the application above described embodiment only expresses, the description thereof is more specific and detailed, but simultaneously
The limitation to utility model patent range therefore cannot be interpreted as.It should be pointed out that for the ordinary skill people of this field
For member, without departing from the concept of this application, various modifications and improvements can be made, these belong to the application's
Protection scope.Therefore, the scope of protection shall be subject to the appended claims for the application patent.
Claims (10)
1. a kind of array substrate characterized by comprising
Area is driven, for exporting electric signal；
Body region, for receiving the electric signal；
Cabling area, is equipped at least two wiring units, and the wiring unit includes the signal lead and void that insulation is oppositely arranged
If line；The signal lead connects the driving area and the body region, is used for transmission the electric signal；
The body region to the driving area direction is first direction, and the direction vertical with the first direction is second direction,
The dummy line of the same wiring unit is divided into spaced multistage in a first direction；
At least two wiring unit is alternatively arranged in this second direction, at least two adjacent wiring units it is described
Dummy line is arranged in a staggered manner.
2. array substrate according to claim 1, which is characterized in that
At least two wiring units form a cabling groups, and the cabling area is equipped at least two cabling groups, it is described at least
Two cabling groups are alternatively arranged in this second direction；
The dummy line of each wiring unit in the same cabling group is aligned setting, the institute of two adjacent cabling groups
Dummy line is stated to be arranged in a staggered manner.
3. array substrate according to claim 2, which is characterized in that of the wiring unit in each cabling group
Number is identical.
4. array substrate according to claim 1-3, which is characterized in that the length of each section of dummy line is less than
Equal to 500 μm.
5. array substrate according to claim 1-3, which is characterized in that
A face vertical with the second direction is reference planes, and the dummy line of two adjacent wiring units is described
Orthographic projection in reference planes is separated from each other.
6. array substrate according to claim 1-3, which is characterized in that one vertical with the second direction
Face is reference planes, orthographic projection docking of the dummy line of two adjacent wiring units in the reference planes.
7. array substrate according to claim 1-3, which is characterized in that the letter in each wiring unit
The total length of number cabling is identical.
8. array substrate according to claim 7, which is characterized in that the dummy line in each wiring unit it is total
Length is identical.
9. a kind of array substrate characterized by comprising
Area is driven, for exporting electric signal；
Body region, for receiving the electric signal；
Cabling area, is equipped with multiple wiring units, and the wiring unit includes the signal lead and dummy line that insulation is oppositely arranged；
The signal lead connects the driving area and the body region, is used for transmission the electric signal；
The body region to the driving area direction is first direction, and the direction vertical with the first direction is second direction,
The multiple wiring unit is alternatively arranged in this second direction, and the dummy line of the same wiring unit is in first party
It is divided into spaced multistage upwards, the length of each section of dummy line is less than or equal to 500 μm,
A face vertical with the second direction is reference planes, and the dummy line of two wiring units of arbitrary neighborhood exists
Orthographic projection docking in the reference planes.
10. a kind of display panel, which is characterized in that including the described in any item array substrates of claim 1-9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201822114682.5U CN209103795U (en) | 2018-12-17 | 2018-12-17 | Array substrate and display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201822114682.5U CN209103795U (en) | 2018-12-17 | 2018-12-17 | Array substrate and display panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209103795U true CN209103795U (en) | 2019-07-12 |
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| CN201822114682.5U Active CN209103795U (en) | 2018-12-17 | 2018-12-17 | Array substrate and display panel |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110346994A (en) * | 2019-07-23 | 2019-10-18 | 昆山国显光电有限公司 | Array substrate and display panel |
| WO2023206675A1 (en) * | 2022-04-29 | 2023-11-02 | 武汉华星光电半导体显示技术有限公司 | Touch display panel and touch display device |
-
2018
- 2018-12-17 CN CN201822114682.5U patent/CN209103795U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110346994A (en) * | 2019-07-23 | 2019-10-18 | 昆山国显光电有限公司 | Array substrate and display panel |
| CN110346994B (en) * | 2019-07-23 | 2022-07-08 | 昆山国显光电有限公司 | Array substrate and display panel |
| WO2023206675A1 (en) * | 2022-04-29 | 2023-11-02 | 武汉华星光电半导体显示技术有限公司 | Touch display panel and touch display device |
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