CN209102856U - Test device - Google Patents

Test device Download PDF

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Publication number
CN209102856U
CN209102856U CN201821534965.9U CN201821534965U CN209102856U CN 209102856 U CN209102856 U CN 209102856U CN 201821534965 U CN201821534965 U CN 201821534965U CN 209102856 U CN209102856 U CN 209102856U
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China
Prior art keywords
test
chip device
circuit board
port
light emitting
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Application number
CN201821534965.9U
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Chinese (zh)
Inventor
孙景轩
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Shenzhen Xinxun Technology Co Ltd
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Shenzhen Xinxun Technology Co Ltd
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Priority to CN201821534965.9U priority Critical patent/CN209102856U/en
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Abstract

The utility model relates to a kind of test device, including test bench and test circuit board, the test bench is provided with several rows and arranges needle, the stitch of row's needle is connect with the test circuit board for connecting with a chip device on the test bench;The test circuit board is provided with the whether normal light emitting diode in the port I/O for judging the chip device for testing whether the chip device is non-defective unit on the test circuit board.The port of chip device is connect by the test device by row's needle on test bench with test circuit board, once chip device all of the port is tested using test circuit board, and it is whether normal by the port whether light emitting diode on test circuit board works normally to judge chip device, to judge chip device for non-defective unit or defective products;Circuit is tested using the test device, greatly reduces the workload of tester, improves test job efficiency.

Description

Test device
Technical field
The utility model relates to the circuit board technology fields of testing mobile phone, and in particular, to a kind of test device.
Background technique
Chip device on circuit board of mobile phone includes numerous I O port, and the function of each port is different, but has A general character is exactly that input terminal is at high-impedance state and is easy to by electrostatic breakdown, and chip device causes to scrap.Therefore chip device Part built-in diode between port and ground in production Shi Douhui, to protect the port of chip device not by static shock Wear, the device of existing test chip device be by measure this port over the ground between diode value (between port and ground Resistance value either port surveys numerical value over the ground and is called diode value) judge whether the port of chip device is damaged.
Circuit on existing circuit board of mobile phone is intensive, and the port of chip device is various, using existing diode value Test mode one by one tests chip device port, to judge whether chip device is non-defective unit, test job amount Greatly, testing efficiency is low.
Therefore, a kind of test device need to be provided, so as to solve the deficiencies in the prior art.
Utility model content
A kind of test device that in order to overcome the deficiencies of the prior art, the utility model provides, the test device is by circuit Port connect by row's needle with test circuit board, judge using whether the light emitting diode tested on circuit board works normally Whether circuit port is normal, test job efficiency.
The technical solution of the utility model is as follows:
A kind of test device, including test bench and test circuit board,
The test bench is provided with several rows and arranges needle, row's needle for connecting with a chip device on the test bench Stitch connect with the test circuit board;
The test circuit board is arranged useful for testing whether the chip device is non-defective unit on the test circuit board In the whether normal light emitting diode in the port I/O for judging the chip device.
Preferably, the test that several connect with the stitch of row's needle is provided on the test circuit board to connect Mouthful, the light emitting diode is in series in each test connecting interface.Wherein, row's needle and the test connect Interface connection connects the chip device and the test connecting interface.
Further, several described light emitting diodes are connected in parallel.
Further, power supply is additionally provided on the test circuit board, the power supply is used to supply to the light emitting diode Electricity.Wherein, the power supply is battery.
Further, the anode of the power supply is connect with one end of the test connecting interface, the test of the other end Connecting interface is connect with the anode of the light emitting diode, is grounded after cathode one resistance of series connection of the light emitting diode.
Preferably, the stitch of the chip device port is directly plugged on the chip on the line end interface of row's needle Device is connected on the test bench.
Preferably, the line end interface of row's needle is connect with the port of the chip device by a connecting line by the core Piece device is connected on the test bench.
The utility model has the following beneficial effects: compared with prior art, which will by row's needle on test bench The port of chip device is connect with test circuit board, is once tested chip device all of the port using test circuit board, And it is whether normal by the port whether light emitting diode on test circuit board works normally to judge chip device, to sentence Disconnected chip device is non-defective unit or defective products;Circuit is tested using the test device, greatly reduces the workload of tester, is improved Test job efficiency.
Detailed description of the invention:
Fig. 1 is the test board circuit schematic diagram of test device described in the utility model.
Fig. 2 is the test board structure of circuit schematic diagrames of test device described in the utility model.
Fig. 3 is the structural framing figure of test device described in the utility model.
Specific embodiment
In order to make the purpose of utility model of the utility model, technical solution and technical effect are more clearly understood, tie below Specific embodiment is closed to be described further the utility model.It should be understood that specific embodiment described herein, be only used for It explains the utility model, is not used to limit the utility model.
It should be noted that it can directly on the other element when element is referred to as " being fixed on " another element Or there may also be elements placed in the middle.When an element is considered as " connection " another element, it, which can be, is directly connected to To another element or it may be simultaneously present centering elements.Term as used herein " vertical ", " horizontal ", " left side ", " right side " and similar statement for illustrative purposes only, are not meant to be the only embodiment.
Unless otherwise defined, all technical and scientific terms used herein are led with the technology for belonging to the utility model The normally understood meaning of the technical staff in domain is identical.Terminology used in the description of the utility model herein only be The purpose of description specific embodiment, it is not intended that in limitation the utility model.Term " and or " used herein packet Include any and all combinations of one or more related listed items.
Referring to Fig.1, the test device of the utility model, including test bench 1 and test circuit board 2.
Test bench 1 is mainly used for connecting with chip device.Specifically, it is provided with several rows on test bench 1 and arranges needle 11, arranges needle 11 stitch is connect with test circuit board 2, and the line end interface of row's needle 11 is connect with chip device.
In one embodiment, by chip on the line end interface of the stitch of the chip device port directly row's of being plugged on needle 11 Device is connect with test bench 1.
In another embodiment, port of the line end interface of row's needle 11 by a connecting line (figure is not marked) with chip device Chip device is connect by connection with test bench 1.
Referring to Fig. 2, test circuit board 2 is mainly used for testing whether chip device is non-defective unit.Specifically, circuit board 2 is tested On be provided with several test connecting interfaces 21, be in series with light emitting diode 22, light-emitting diodes in each test connecting interface 21 Whether the port I/O that pipe 22 is used to judge to test chip device is normal;Row's needle 11 is connect with test connecting interface 21 by chip device Part is connected with test connecting interface 21.Wherein, it is connected in parallel between light emitting diode 22 two-by-two.In the present embodiment, it sends out Optical diode 22 is preferably that rated current is 20mA, the diode that voltage rating is 3V.
Referring to Fig.1, it tests on circuit board 2 and is additionally provided with power supply 23, power supply 23 is mainly used for powering to light emitting diode 22, Power supply 23 is preferably battery, and is the lithium manganese button cell of model 2023.Specifically, the anode of power supply connects with test One end connection of mouth 21, the test connecting interface 21 of the other end are connect with the anode of light emitting diode 22, light emitting diode 22 It is grounded after one resistance R1 of cathode series connection.
Referring to Figure 1 and Figure 3, the working principle of the test device of the utility model is: port and test when chip device Connecting interface 21 connects, and when the port of chip device is open-circuit condition, power supply 23 is disconnected with light emitting diode 22, test Power supply 23 is not powered to light emitting diode 22 in device, and it is that lamp does not work that light emitting diode 22, which does not work, then can pass through luminous two 22 lamp of pole pipe do not work judge the chip device port be it is breaking, the chip device be damage be defective products;When chip device When the port of part is short-circuit condition, power supply 23 is greater than luminous two by the electric current that the port of chip device flows into light emitting diode 22 The electric current (20mA) that pole pipe 22 works normally, then light emitting diode 22 works and the lamp brightness of light emitting diode 22 is obviously normal Brightness when work then can determine whether that the chip device port is short-circuit, the chip device by LED light lamp brightness extremely Part be damage be defective products;When chip device is non-defective unit, power supply 23 is connect with light emitting diode 22, power supply in test device 23 to light emitting diode 22 power, light emitting diode 22 work, be light emitting diode 22 lamp it is bright, then can pass through light-emitting diodes The bright port to judge chip device of 22 lamp of pipe be it is normal, the chip device be it is no it is impaired be non-defective unit.Specifically, All ports of chip device can be tested using the test device together, and test device by all ports of chip device Test connecting interface 21 connect, and the port of chip device is connected by test connecting interface 21 with light emitting diode 22 It connects, when the work of light emitting diode 22, and 22 light emission luminance of light emitting diode of each port connection of chip device is consistent, then The port of chip device is normal, can determine whether that the chip device is non-defective unit;Light emitting diode 22 works, and on chip device Port connection 22 light emission luminance of light emitting diode it is inconsistent, the light emission luminance of some light emitting diodes 22 it is especially bright or some The lamp of light emitting diode 22 does not work, then some ports on chip device have been damaged, and can determine whether that the chip device is defective products.
The test device of the utility model is connected the port of chip device and test circuit board by row's needle on test bench It connects, once chip device all of the port is tested using test circuit board, and pass through the light-emitting diodes on test circuit board Whether the port whether pipe works normally to judge chip device is normal, to judge chip device for non-defective unit or defective products;It adopts Circuit is tested with the test device, greatly reduces the workload of tester, improves test job efficiency.
It, cannot the above content is specific preferred embodiment further detailed description of the utility model is combined Assert that the specific implementation of the utility model is only limited to these instructions.For the ordinary skill of the utility model technical field For personnel, without departing from the concept of the premise utility, architectural form cans be flexible and changeable, and can be produced with subseries Product.Several simple deduction or replace are only made, it is true by the claims submitted all to shall be regarded as belonging to the utility model Fixed scope of patent protection.

Claims (8)

1. a kind of test device, including test bench and test circuit board, which is characterized in that
The test bench is provided with several rows and arranges needle, the needle of row's needle for connecting with a chip device on the test bench Foot is connect with the test circuit board;
The test circuit board is provided on the test circuit board for sentencing for testing whether the chip device is non-defective unit Break the whether normal light emitting diode in the port I/O of the chip device.
2. test device according to claim 1, which is characterized in that be provided with several and institute on the test circuit board The test connecting interface of the stitch connection of the row's of stating needle, is in series with the light-emitting diodes in each test connecting interface Pipe.
3. test device according to claim 1, which is characterized in that several described light emitting diodes are connected in parallel.
4. test device according to claim 2, which is characterized in that be additionally provided with power supply on the test circuit board, institute Power supply is stated for powering to the light emitting diode.
5. test device according to claim 4, which is characterized in that the power supply is battery.
6. test device according to claim 5, which is characterized in that anode and the test connecting interface of the power supply One end connection, the test connecting interface of the other end connect with the anode of the light emitting diode, the light emitting diode Cathode connect a resistance after be grounded.
7. test device according to claim 1, which is characterized in that the stitch of the chip device port is directly plugged on The chip device is connected on the test bench on the line end interface of row's needle.
8. test device according to claim 1, which is characterized in that the line end interface of row's needle by a connecting line with The chip device is connected on the test bench by the port connection of the chip device.
CN201821534965.9U 2018-09-18 2018-09-18 Test device Active CN209102856U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201821534965.9U CN209102856U (en) 2018-09-18 2018-09-18 Test device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201821534965.9U CN209102856U (en) 2018-09-18 2018-09-18 Test device

Publications (1)

Publication Number Publication Date
CN209102856U true CN209102856U (en) 2019-07-12

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201821534965.9U Active CN209102856U (en) 2018-09-18 2018-09-18 Test device

Country Status (1)

Country Link
CN (1) CN209102856U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112180242A (en) * 2020-10-15 2021-01-05 东莞飞思凌通信技术有限公司 Method and device for fault diagnosis of DDR (double data Rate) interface circuit of high-density chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112180242A (en) * 2020-10-15 2021-01-05 东莞飞思凌通信技术有限公司 Method and device for fault diagnosis of DDR (double data Rate) interface circuit of high-density chip
CN112180242B (en) * 2020-10-15 2024-06-21 东莞飞思凌通信技术有限公司 Method and device for diagnosing DDR interface circuit faults of high-density chip

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