CN209086780U - A kind of current source circuit - Google Patents
A kind of current source circuit Download PDFInfo
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- CN209086780U CN209086780U CN201822278513.5U CN201822278513U CN209086780U CN 209086780 U CN209086780 U CN 209086780U CN 201822278513 U CN201822278513 U CN 201822278513U CN 209086780 U CN209086780 U CN 209086780U
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- 238000012544 monitoring process Methods 0.000 claims 1
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- 230000003245 working effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
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Abstract
The utility model discloses a kind of current source circuits, including voltage signal source, adder Module, enhanced processing module, current output module, differential processing module, ADC conversion module, data recording equipment, the first power supply, circuit under test；The output end of the voltage signal source and the input terminal of adder Module are electrically connected, the output end of the adder Module and the input terminal of enhanced processing module are electrically connected, the output end of the enhanced processing module is electrically connected with the input terminal of the input terminal of current output module, differential processing module respectively, and the output end of the current output module provides required electric current for circuit under test；The output end of the differential processing module and the input terminal of ADC conversion module are electrically connected, and the output end of the ADC conversion module and the input terminal of data recording equipment are electrically connected；The utility model has the advantages that electric current output is stablized, a variety of electric currents are available, current data record.
Description
Technical field
The utility model belongs to electronic circuit technology field, and in particular to a kind of current source circuit.
Background technique
Current source is basic element circuit, is used widely in electric equipment products.The structure species of current source are various, electricity
The selection in stream source can generate important influence to the working effect of electric equipment products；The high current source of selection power will cause electric appliance production
The premature failure of product internal component, the current source for selecting power low can be such that the working effect of electric equipment products is not achieved；So needle
Different electric equipment products are selected with different current sources, to guarantee that electric equipment products reach good operational effect.For different
Electric equipment products, it is desirable to be able to different current sources be provided, it is tested, just will appreciate that kind of electric current is electric equipment products be suitble to
Source.
Utility model content
The utility model is directed to above-described deficiency, provide a kind of output of electric current stablize, a variety of electric currents it is available, electric
The current source circuit of flow data record.
To achieve the above object, the utility model provides the following technical solutions: a kind of current source circuit, including voltage signal
Source, adder Module, enhanced processing module, current output module, differential processing module, ADC conversion module, data record are set
Standby, the first power supply, circuit under test；The adder Module, enhanced processing module, differential processing module power end, respectively with
The output end of first power supply is electrically connected；The output end of the voltage signal source and the input terminal of adder Module are electrically connected,
The output end of the adder Module and the input terminal of enhanced processing module are electrically connected, the output end of the enhanced processing module
Respectively with the input terminal of the input terminal of current output module, differential processing module be electrically connected, the current output module it is defeated
Outlet provides required electric current for circuit under test；The output end of the differential processing module and the input terminal electricity of ADC conversion module
Property connection, the input terminal of the output end of the ADC conversion module and data recording equipment is electrically connected.
Preferably, the adder Module includes operation chip U1, resistance R1, resistance R2, capacitor C1；The operation chip
The model of U1 is set as LT1112S8, and the second pin of the operation chip U1 is respectively through resistance R1, resistance R2 and voltage signal source
Corresponding output end connection, the third of the operation chip U1 are drawn foot meridian capacitor C1 and are connect with the first pin of operation chip U1,
The first pin of the operation chip U1 is connect with the input terminal of enhanced processing module, the 4th pin of the operation chip U1,
The output end connection corresponding with the first power supply respectively of 8th pin.
Preferably, the enhanced processing module includes enhanced processing chip U2, resistance R3, resistance R4, resistance R5；It is described to put
The model of big processing chip U2 is set as OPA544T, and the first pin of the enhanced processing chip U2 is through resistance R3 and operation chip
The first pin of U1 connects, and the second pin of the enhanced processing chip U2 is grounded through resistance R4, and enhanced processing chip U2
Second pin is connect through resistance R5 with the 5th pin of enhanced processing chip U2, the 5th pin point of the enhanced processing chip U2
Not corresponding with the input terminal of current output module, differential processing module input terminal connection, the of the enhanced processing chip U2
The output end connection corresponding with the first power supply respectively of three pins, the 4th pin.
Preferably, the current output module mass key S1, key S2, key S3, key S4, key S5, key S6,
Resistance R6, resistance R7, resistance R8, resistance R9, resistance R10, resistance R11, resistance R12；The resistance R6, resistance R7, resistance R8,
Resistance R9, resistance R10, resistance R11, resistance R12 are sequentially connected in series, and one end after its series connection connects enhanced processing core
The 5th pin of piece U2, the output end of the other end connection current output module after being connected in series, the current output module
Output end be separately connected the corresponding input terminal of differential processing module, circuit under test；The common end of the resistance R6 and resistance R7,
The common end of resistance R7 and resistance R8, the common end of resistance R8 and resistance R9, resistance R9 and resistance R10 common end, resistance R10
And the common end of resistance R11, resistance R11 and the common end of resistance R12 respectively through corresponding key S1, key S2, key S3, press
After key S4, key S5, key S6, it is all connected with the output end of current output module.
Preferably, the differential processing module includes difference processing chip U3, resistance R13, resistance R14, resistance R15；Institute
The model for stating difference processing chip U3 is set as LT1167CS8, and the first pin of the difference processing chip U3 is connected through resistance R14
The 8th pin of difference processing chip U3, the second pin of the difference processing chip U3 is through the one of resistance R15 connection resistance R12
End, the third pin of the difference processing chip U3 is through the 5th pin of resistance R13 connection enhanced processing chip U2, the difference
The 4th pin, the 7th pin of processing chip U3 is separately connected the corresponding output end of the first power supply, the difference processing chip U3
The 5th pin ground connection, the difference processing chip U3 the 6th pin connection ADC conversion module input terminal.
Preferably, the ADC conversion module includes input amplification chip U4, ADC conversion chip U5；Core is amplified in the input
The model of piece U4 is set as LT1112S8, and the 6th of the 6th pin connection difference processing chip U3 of the input amplification chip U4 draws
Foot, the 5th pin of the input amplification chip U4 connect the 7th pin of the input amplification chip U4, the input amplification
The end Vin of the 7th pin connection ADC conversion chip U5 of chip U4, the output end connection data note of the ADC conversion chip U5
The input terminal of recording apparatus.
Preferably, first power supply is set as the power supply of offer+19V ,+15V, -15V, the end+19V of first power supply
It is connect respectively with the 7th pin of the 4th pin of enhanced processing chip U1, difference processing chip U3, first power supply+
8th pin at the end 15V and operation chip U1, the end -15V of first power supply respectively with the 4th pin of operation chip U1, put
The 4th pin connection of the third pin, difference processing chip U3 of big processing chip U1.
The utility model compared with prior art, has the advantages that
The method that the utility model uses integrated chip by adder Module, enhanced processing module, is effectively junior
Circuit provides stable electric current output；Current output module uses the cooperation of multiple keys and multiple resistance, realizes more
The selection output of kind electric current；Differential processing module, ADC conversion module realize the analog-to-digital conversion of output electric current, by the electricity of output
It flows size to record for data recording equipment, realizes electric equipment products in the data record of different conditions.Therefore, the utility model
With electric current output is stablized, a variety of electric currents are available, the beneficial effect of current data record.
Detailed description of the invention
Fig. 1 is the frame principle figure of the utility model；
Fig. 2 is the circuit diagram of the utility model.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without making creative work
Every other embodiment obtained, fall within the protection scope of the utility model.
It please refers to shown in Fig. 1, Fig. 2, the utility model provides the following technical solutions: a kind of current source circuit, including voltage
Signal source 1, adder Module 2, enhanced processing module 3, current output module 4, differential processing module 5, ADC conversion module 6, number
According to recording equipment 7, the first power supply 8, circuit under test；The adder Module 2, enhanced processing module 3, differential processing module 5
Power end is electrically connected with the output end of the first power supply 8 respectively；The output end of the voltage signal source 1 and adder Module 2
Input terminal is electrically connected, and the output end of the adder Module 2 and the input terminal of enhanced processing module 3 are electrically connected, described to put
The output end of big processing module 3 is electrically connected with the input terminal of the input terminal of current output module 4, differential processing module respectively,
The output end of the current output module 4 provides required electric current for circuit under test；The output end of the differential processing module 5 with
The input terminal of ADC conversion module 6 is electrically connected, the output end of the ADC conversion module 6 and the input terminal of data recording equipment 7
It is electrically connected.
The voltage signal source 1 provides satisfactory voltage signal for junior's circuit.
The adder Module 2 includes operation chip U1, resistance R1, resistance R2, capacitor C1；The type of the operation chip U1
Number it is set as LT1112S8, the second pin of the operation chip U1 is corresponding with voltage signal source 1 through resistance R1, resistance R2 respectively
Output end connection, the third of the operation chip U1 are drawn foot meridian capacitor C1 and are connect with the first pin of operation chip U1, the fortune
The first pin for calculating chip U1 is connect with the input terminal of enhanced processing module 3, and the 4th pin of the operation chip U1, the 8th draw
Foot output end connection corresponding with the first power supply 8 respectively.
The enhanced processing module 3 includes enhanced processing chip U2, resistance R3, resistance R4, resistance R5；The enhanced processing
The model of chip U2 is set as OPA544T, the first pin of the enhanced processing chip U2 through resistance R3 and operation chip U1 the
The connection of one pin, the second pin of the enhanced processing chip U2 is grounded through resistance R4, and the second of enhanced processing chip U2 is drawn
Foot is connect through resistance R5 with the 5th pin of enhanced processing chip U2, the 5th pin of the enhanced processing chip U2 respectively with electricity
Input terminal, the connection of the corresponding input terminal of differential processing module 5 of output module 4 are flowed, the third of the enhanced processing chip U2 is drawn
The output end connection corresponding with the first power supply 8 respectively of foot, the 4th pin.
The 4 mass key S1 of current output module, key S2, key S3, key S4, key S5, key S6, resistance
R6, resistance R7, resistance R8, resistance R9, resistance R10, resistance R11, resistance R12；The resistance R6, resistance R7, resistance R8, resistance
R9, resistance R10, resistance R11, resistance R12 are sequentially connected in series, and one end after its series connection connects enhanced processing chip U2
The 5th pin, be connected in series after the other end connection current output module 4 output end, the current output module 4
Output end is separately connected the corresponding input terminal of differential processing module 5, circuit under test；The common end of the resistance R6 and resistance R7,
The common end of resistance R7 and resistance R8, the common end of resistance R8 and resistance R9, resistance R9 and resistance R10 common end, resistance R10
And the common end of resistance R11, resistance R11 and the common end of resistance R12 respectively through corresponding key S1, key S2, key S3, press
After key S4, key S5, key S6, it is all connected with the output end of current output module 4.
The differential processing module 5 includes difference processing chip U3, resistance R13, resistance R14, resistance R15；The difference
The model of processing chip U3 is set as LT1167CS8, the first pin of the difference processing chip U3 through resistance R14 connection difference at
The 8th pin of chip U3 is managed, the second pin of the difference processing chip U3 is through one end of resistance R15 connection resistance R12, institute
The third pin of difference processing chip U3 is stated through the 5th pin of resistance R13 connection enhanced processing chip U2, the difference processing
The 4th pin, the 7th pin of chip U3 is separately connected the corresponding output end of the first power supply 8, and the of the difference processing chip U3
Five pins ground connection, the input terminal of the 6th pin connection ADC conversion module 6 of the difference processing chip U3.
The ADC conversion module 6 includes input amplification chip U4, ADC conversion chip U5；The input amplification chip U4's
Model is set as LT1112S8, the 6th pin of the 6th pin connection difference processing chip U3 of the input amplification chip U4, institute
The 5th pin for stating input amplification chip U4 connects the 7th pin of the input amplification chip U4, the input amplification chip U4
The 7th pin connection ADC conversion chip U5 the end Vin, the output end of the ADC conversion chip U5 connects data recording equipment 7
Input terminal.
First power supply 8 is set as the power supply of offer+19V ,+15V, -15V, the end+19V of first power supply 8 respectively with
The 7th pin connection of the 4th pin of enhanced processing chip U1, difference processing chip U3, the end+15V of first power supply 8 with
The 8th pin of operation chip U1, the end -15V of first power supply 8 respectively with the 4th pin of operation chip U1, enhanced processing
The 4th pin connection of the third pin, difference processing chip U3 of chip U1.
The data recording equipment 7 is that the signal exported to ADC conversion module 6 records, and shows respective value
Equipment.
Embodiment 1:
Working principle of the utility model is:
Voltage signal source 1 provides required voltage signal, after the processing of adder Module 2, is transferred to enhanced processing module
3, current output module 4, the choosing that current output module 4 passes through different key are sent into through the amplified voltage of enhanced processing module 3
It is selected as circuit under test and different output electric currents is provided；Can respectively output be believed by simultaneously amplifying processing module 3, current output module 4
Number it is transferred to differential processing module 5, through treated the signal of differential processing module 5, is sent into after ADC conversion module 6 completes conversion,
Incoming data recording equipment 7 carries out data record and shows corresponding current values.
While there has been shown and described that the embodiments of the present invention, for the ordinary skill in the art,
It is understood that these embodiments can be carried out with a variety of variations in the case where not departing from the principles of the present invention and spirit, repaired
Change, replacement and variant, the scope of the utility model is defined by the appended claims and the equivalents thereof.
Claims (7)
1. a kind of current source circuit, which is characterized in that defeated including voltage signal source, adder Module, enhanced processing module, electric current
Module, differential processing module, ADC conversion module, data recording equipment, the first power supply, circuit under test out；The adder mould
Block, enhanced processing module, differential processing module power end, respectively with the output end of the first power supply be electrically connected；The voltage
The output end of signal source and the input terminal of adder Module are electrically connected, the output end and enhanced processing mould of the adder Module
The input terminal of block is electrically connected, and the output end of the enhanced processing module is respectively and at the input terminal of current output module, difference
The input terminal for managing module is electrically connected, and the output end of the current output module provides required electric current for circuit under test；It is described
The output end of differential processing module and the input terminal of ADC conversion module are electrically connected, the output end and number of the ADC conversion module
It is electrically connected according to the input terminal of recording equipment.
2. current source circuit according to claim 1, it is characterised in that: the adder Module include operation chip U1,
Resistance R1, resistance R2, capacitor C1；The model of the operation chip U1 is set as LT1112S8, and the second of the operation chip U1 is drawn
Foot is connected through resistance R1, resistance R2 output end corresponding with voltage signal source respectively, the third pin warp of the operation chip U1
Capacitor C1 is connect with the first pin of operation chip U1, the first pin of the operation chip U1 and the input of enhanced processing module
End connection, the 4th pin of the operation chip U1, the output end connection corresponding with the first power supply respectively of the 8th pin.
3. current source circuit according to claim 2, it is characterised in that: the enhanced processing module includes enhanced processing core
Piece U2, resistance R3, resistance R4, resistance R5；The model of the enhanced processing chip U2 is set as OPA544T, the enhanced processing core
The first pin of piece U2 is connect through resistance R3 with the first pin of operation chip U1, the second pin of the enhanced processing chip U2
It is grounded through resistance R4, and the second pin of enhanced processing chip U2 connects through the 5th pin of resistance R5 and enhanced processing chip U2
It connects, the 5th pin of the enhanced processing chip U2 is corresponding with the input terminal of current output module, differential processing module respectively
Input terminal connection, output end corresponding with the first power supply connects respectively for third pin, the 4th pin of the enhanced processing chip U2
It connects.
4. current source circuit according to claim 3, it is characterised in that: the current output module mass key S1, press
Key S2, key S3, key S4, key S5, key S6, resistance R6, resistance R7, resistance R8, resistance R9, resistance R10, resistance R11,
Resistance R12；The resistance R6, resistance R7, resistance R8, resistance R9, resistance R10, resistance R11, resistance R12 are sequentially connected in series,
And the 5th pin of one end connection enhanced processing chip U2 after its series connection, the other end after being connected in series connect electric current
The output end of output module, the output end of the current output module be separately connected the corresponding input terminal of differential processing module, to
Slowdown monitoring circuit；The common end of the resistance R6 and resistance R7, the common end of resistance R7 and resistance R8, resistance R8 are public with resistance R9's
End, the common end of resistance R9 and resistance R10, the common end of resistance R10 and resistance R11, resistance R11 and resistance R12 common end
Respectively after corresponding key S1, key S2, key S3, key S4, key S5, key S6, it is all connected with current output module
Output end.
5. current source circuit according to claim 4, it is characterised in that: the differential processing module includes difference processing core
Piece U3, resistance R13, resistance R14, resistance R15；The model of the difference processing chip U3 is set as LT1167CS8, at the difference
The first pin of chip U3 is managed through the 8th pin of resistance R14 connection difference processing chip U3, the difference processing chip U3's
The one end of second pin through resistance R15 connection resistance R12, the third pin of the difference processing chip U3 are connected through resistance R13
The 5th pin of enhanced processing chip U2, the 4th pin, the 7th pin of the difference processing chip U3 are separately connected the first electricity
The corresponding output end in source, the 5th pin ground connection of the difference processing chip U3, the 6th pin of the difference processing chip U3
Connect the input terminal of ADC conversion module.
6. current source circuit according to claim 5, it is characterised in that: the ADC conversion module includes input amplification core
Piece U4, ADC conversion chip U5；The model of the input amplification chip U4 is set as LT1112S8, the input amplification chip U4's
6th pin connects the 6th pin of difference processing chip U3, and the 5th pin of the input amplification chip U4 connects the input
The 7th pin of amplification chip U4, the end Vin of the 7th pin connection ADC conversion chip U5 of the input amplification chip U4, institute
State the input terminal of the output end connection data recording equipment of ADC conversion chip U5.
7. current source circuit according to claim 6, it is characterised in that: first power supply be set as offer+19V ,+
The power supply of 15V, -15V, the end+19V of first power supply the 4th pin, the difference processing core with enhanced processing chip U1 respectively
The 7th pin of piece U3 connects, the end+15V of first power supply and the 8th pin of operation chip U1, first power supply-
The end 15V respectively with the 4th pin of operation chip U1, the third pin of enhanced processing chip U1, difference processing chip U3 the 4th
Pin connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201822278513.5U CN209086780U (en) | 2018-12-29 | 2018-12-29 | A kind of current source circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201822278513.5U CN209086780U (en) | 2018-12-29 | 2018-12-29 | A kind of current source circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209086780U true CN209086780U (en) | 2019-07-09 |
Family
ID=67127825
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201822278513.5U Expired - Fee Related CN209086780U (en) | 2018-12-29 | 2018-12-29 | A kind of current source circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209086780U (en) |
-
2018
- 2018-12-29 CN CN201822278513.5U patent/CN209086780U/en not_active Expired - Fee Related
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| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20190709 |
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| CF01 | Termination of patent right due to non-payment of annual fee |