CN205450154U - A device for test of common mode conducted disturbance noise immunity - Google Patents
A device for test of common mode conducted disturbance noise immunity Download PDFInfo
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- CN205450154U CN205450154U CN201620257507.XU CN201620257507U CN205450154U CN 205450154 U CN205450154 U CN 205450154U CN 201620257507 U CN201620257507 U CN 201620257507U CN 205450154 U CN205450154 U CN 205450154U
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Abstract
The utility model provides a device for test of common mode conducted disturbance noise immunity, a device and an equipment under test electric connection, including FPGA chip, direct digital frequency synthesizer, digital analog conversion chip, band pass filter, audio power amplifier chip, interconnected circuit, isolation sampling circuit and change over switch, direct digital frequency synthesizer, FPGA chip, digital analog conversion chip, band pass filter, audio power amplifier chip and interconnected circuit be electric connection in proper order, change over switch is through keeping apart sampling circuit and FPGA chip electric connection, change over switch and interconnected circuit electric connection. The utility model discloses integrate circuit such as current arbitrary waveform generator, power amplification, coupling together, succeed in developing being exclusively used in 0Hz through the establishment special -purpose software the circuit of 150kHz common mode conducted disturbance noise immunity test. The circuit is built, is used comparatively conveniently, the equal satisfying criteria requirements of index such as signal amplitude, frequency, the improvement that is comparatively showing efficiency of software testing and experimental accuracy.
Description
Technical field
This utility model belongs to emc testing field, particularly to a kind of device for the test of common mode conduction interference immunity to interference.
Background technology
Electro Magnetic Compatibility (ElectromagneticCompatibility, EMC) test is electric, the important evaluation procedure of electronic equipment.It is made up of a series of test such as esd immunity test, electrical fast transient (eft) immunity experiment, surge (impact) immunity experiment and 0Hz-150kHz common mode conduction interference immunity experiment.The implementation of 0Hz-150kHz common mode conduction interference immunity experiment has been made clear and definite regulation by the standards such as IEC61000-4-16, GB/T17626.16.Inventionbriefly, when carrying out this test, power supply is powered to tested device by isolating device or uncoupling network, and test waveform generator applies common mode conduction interference signal by coupling network to tested device.By observing the operation conditions of tested device, judge that whether it is by test.
Test waveform generator is as the capital equipment of test, and above-mentioned standard defines the technical specification that it should meet simultaneously, and if output waveform is sinusoidal, total harmonic distortion is less than 1%；Open circuit output virtual value voltage range 1V (-10%) to 30V (+30%)；Impedance 50 Ω (± 10%), frequency 15Hz (-10%) is to 150kHz (+10%), and has 1 × 10-2The automatic scan capability of ten octaves/s or slower, output voltage can linear change or invariable according to frequency.
In addition; at the RCD (ResidualCurrentOperatedProtectiveDevices carrying out domestic and similar applications according to standard GB/T 18499; during 0Hz-150kHz common mode conduction interference immunity experiment RCD); stating otherwise common code impedance is 150 Ω; need to be applied on tested device by sinusoidal current signal, its current effective value changes between 2mA-66mA according to the difference of rated residual operating current or signal frequency.
At present, RCD etc. electrically, electronic equipment when carrying out 0Hz-150kHz common mode conduction interference immunity experiment, disqualification rate is higher.It is the most necessary in view of RCD endangers at reduction electric shock accidents, protects the importance in personal safety, a set of waveform generator meeting above-mentioned standard-required and corollary equipment for the enforcement of this test.But being exclusively used in that to realize the equipment of this test little at present, and need to use pulse-width modulation circuit, high-power switch device etc., somewhat expensive and output frequency and limited by switch off-time, during high frequency, waveform is poor.General waveform generator then exists that output is not enough, the more difficult maintenance of electric current is constant, frequency and amplitude can not the problems such as scanning simultaneously.
Utility model content
In order to overcome the deficiencies in the prior art, the purpose of this utility model is to provide a kind of circuit to build the device for the test of common mode conduction interference immunity to interference easy to use.
For achieving the above object, the technical scheme that this utility model is used is as follows:
A kind of device for the test of common mode conduction interference immunity to interference, including fpga chip, Direct Digital Frequency Synthesizers, analog-digital chip, band filter, Audio power amplifier chip, coupling circuit, isolation sample circuit and permutator, described Direct Digital Frequency Synthesizers, fpga chip, analog-digital chip, band filter, the input of Audio power amplifier chip and coupling circuit is electrically connected with successively, described permutator is electrically connected with fpga chip by isolation sample circuit, the outfan of described coupling circuit is for being electrically connected with an equipment under test；
Described Direct Digital frequency device, for arranging frequency and the amplitude of the test signal of fpga chip output；
Described fpga chip, for the most persistently output test signal, and adjusts the test signal of fpga chip output according to the feedback test signal of isolation sample circuit collection；
Described analog-digital chip, for being converted to analog test signal by the test signal that fpga chip exports；
Described band filter, for filtering off the high frequency in analog test signal and DC component, thus exports filtered analog test signal；
Described Audio power amplifier chip, for being amplified filtered analog test signal, thus exports amplification analog test signal；
Described coupling circuit, is used for amplifying analog test signal and coupled to equipment under test；
Described isolation sample circuit, amplify analog test signal and the one amplified in analog test signal of coupling circuit input end for selected to gather coupling circuit output end by permutator, and be to transmit the amplification analog test signal collected to fpga chip after feedback test signal by analog digital conversion.
Preferably, the model of described audio frequency amplification chip is LM3886.
Preferably, described resistance is the high-power resistance that rated power is more than 5W.
Preferably, described electric capacity is the high pressure polarity free capacitor of more than 400V.
Preferably, the voltage effective value of analog test signal is up to 30V.
Preferably, when common code impedance is 150 Ω, the virtual value of analog test signal electric current is up to 66mA, and the value of described common code impedance is the voltage effective value value ratio with its current value of the analog test signal of coupling circuit output.
Preferably, described equipment under test is residual action current protector.
Preferably, described equipment under test and an auxiliary equipment are electrically connected with, and described auxiliary equipment is power supply or communication equipment.
Preferably, uncoupling circuit is installed between described equipment under test and auxiliary equipment, the analog test signal that described uncoupling circuit the exports interference to auxiliary equipment for eliminating coupling circuit.
Compared to existing technology, the beneficial effects of the utility model are:
This utility model to together, succeeds in developing the circuit being exclusively used in the test of 0Hz-150kHz common mode conduction interference immunity to interference by circuit integrated to existing AWG (Arbitrary Waveform Generator), power amplification, coupling etc. by establishment special-purpose software.Circuit builds, it is more convenient to use, and the index such as signal amplitude, frequency is satisfied by standard-required, the most significantly improves the accuracy of testing efficiency and test.
Integrated audio power amplifier chip is introduced in this device, achieves preferable effect.Simplify device design, cycle of producing and debugging, it is to avoid the complexity that designed, designed discrete power amplification circuit brings is with inefficient.
Accompanying drawing explanation
Fig. 1 is the structural representation of a kind of device for the test of common mode conduction interference immunity to interference of this utility model.
Detailed description of the invention
Below, in conjunction with accompanying drawing and detailed description of the invention, this utility model is described further:
nullAs shown in Figure 1，This utility model provides a kind of device for the test of common mode conduction interference immunity to interference，Device and an equipment under test of the test of described immunity to interference are electrically connected with，Including fpga chip、Direct Digital Frequency Synthesizers、Analog-digital chip、Band filter、Audio power amplifier chip、Coupling circuit、Isolation sample circuit、Permutator and uncoupling circuit，Described Direct Digital Frequency Synthesizers、Fpga chip、Analog-digital chip、Band filter、The input of Audio power amplifier chip and coupling circuit is electrically connected with successively，The outfan of described coupling circuit is electrically connected with equipment under test，Described permutator is electrically connected with fpga chip by isolation sample circuit，Described permutator is electrically connected with coupling circuit，Described uncoupling circuit is arranged between an auxiliary equipment and equipment under test，The outfan of described coupling circuit and an equipment under test are electrically connected with，And described equipment under test and an auxiliary equipment are electrically connected with；
The analog test signal that described uncoupling circuit exports for the eliminating coupling circuit output end interference to auxiliary equipment；
Described Direct Digital frequency device, for arranging frequency and the amplitude of the test signal of fpga chip output；
Described fpga chip, for the most persistently output test signal, and adjusts the test signal of fpga chip output according to the feedback test signal of isolation sample circuit collection；
Described analog-digital chip, for being converted to analog test signal by the test signal that fpga chip exports；
Described band filter, for filtering off the high frequency in analog test signal and DC component, and exports filtered analog test signal；
Described Audio power amplifier chip, for being amplified filtered analog test signal, and exports amplification analog test signal, and the model of described audio frequency amplification chip is LM3886.Common power amplifier chip is all extremely difficult to output voltage or the output electric current of standard-required, and discrete power amplification circuit is built and debugs complex, application inconvenience, but the Audio power amplifier chip of the present embodiment, sufficiently high voltage and power can be exported, disclosure satisfy that the index request such as bandwidth and common mode rejection ratio simultaneously.
Described coupling circuit, for the analog test signal after power amplification is coupled to equipment under test, simultaneously by auxiliary equipment high_voltage isolation, coupling circuit can be formed by resistance and capacitances in series, but should select resistance respectively is that rated power is more than the high-power resistance of 1W and high pressure polarity free capacitor that electric capacity is more than 400V.
Described isolation sample circuit, for being selected the analog test signal of Gather and input coupling circuit still to couple the analog test signal of circuit output by permutator, and it is to transmit the analog test signal collected to fpga chip after feedback test signal by analog digital conversion.Sampled point has at two, at one be coupling circuit output end for gathering voltage, at one be coupling circuit input end for gathering electric current.
Operation principle of the present utility model:
The 0Hz-150kHz common mode conduction interference immunity experiment of tested device is tested by this utility model according to standards such as IEC61000-4-16, GB/T17626.16.This utility model is mainly used in the state of test equipment under test, and in the implementation process of test, auxiliary equipment and uncoupling circuit start run the actual working state of simulation equipment under test.
Amplitude is generated and sine voltage test signal that frequency can arbitrarily regulate by Direct Digital Frequency Synthesizers, D/A converter module and fpga chip, and fpga chip lasting output test signal within the standard time, and according to isolation the sample circuit voltage, electric current and the frequency that feed back to adjusting parameter corresponding to test signal to meet standard.
This sinusoidal test signal filters off high frequency and DC component by band filter.Filtered voltage signal magnitude and load capacity are relatively low, and standard-required output voltage that is to say that the virtual value of analog test signal voltage is up to 30V or when common code impedance is 150 Ω, output current effective value is up to 66mA, the most just needs original signal is carried out power amplification.The present embodiment use Audio power amplifier chip can reach requirement.Test signal after power amplification is applied to equipment under test by coupling circuit, and by auxiliary equipment high_voltage isolation.
During signals collecting, can be by isolation sample circuit, when gathering voltage signal, by permutator by collection point placement coupling circuit output end, it is sent in fpga chip after the test signal collected is AD converted, in fpga chip to the parameters such as the test signal amplitude collected, frequency with value be set compare, if there is error, then the corresponding parameter of the test signal changing output regulates the test signal of fpga chip output.
The equipment that auxiliary equipment is attached thereto in time simulating equipment under test real work, such as power supply, communication equipment etc., for avoiding it to be disturbed by test signal, should add uncoupling circuit between itself and tested device.But if auxiliary equipment itself is isolation, then uncoupling circuit can save.
During whole test, frequency and the virtual value of the test signal of output is set according to touchstone.By the afunction of equipment under test or the situation of performance degradation are classified, obtain test result.The following is several classification situation: performance is normal in technology requires to limit；Function or performance temporarily reduce or lose, but can recover voluntarily；Function or performance temporarily reduce or lose, but need operator to intervene or system reset；Because of equipment (element) or the damage of software, or loss of data and cause and can not recover to the function of normal condition to reduce or lose.
It will be apparent to those skilled in the art that can technical scheme as described above and design, make other various corresponding changes and deformation, and within all these changes and deformation all should belong to this utility model scope of the claims.
Claims (10)
1. the device for the test of common mode conduction interference immunity to interference, it is characterized in that, including fpga chip, Direct Digital Frequency Synthesizers, analog-digital chip, band filter, Audio power amplifier chip, coupling circuit, isolation sample circuit and permutator, described Direct Digital Frequency Synthesizers, fpga chip, analog-digital chip, band filter, the input of Audio power amplifier chip and coupling circuit is electrically connected with successively, described permutator is electrically connected with fpga chip by isolation sample circuit, the outfan of described coupling circuit is for being electrically connected with an equipment under test；
Described Direct Digital frequency device, for arranging frequency and the amplitude of the test signal of fpga chip output；
Described fpga chip, for the most persistently output test signal, and adjusts the test signal of fpga chip output according to the feedback test signal of isolation sample circuit collection；
Described analog-digital chip, for being converted to analog test signal by the test signal that fpga chip exports；
Described band filter, for filtering off the high frequency in analog test signal and DC component, thus exports filtered analog test signal；
Described Audio power amplifier chip, for being amplified filtered analog test signal, thus exports amplification analog test signal；
Described coupling circuit, for coupleding to equipment under test by amplification analog test signal；
Described isolation sample circuit, amplify analog test signal and the one amplified in analog test signal of coupling circuit output end for selected to gather coupling circuit input end by permutator, and be to transmit the amplification analog test signal collected to fpga chip after feedback test signal by analog digital conversion.
2. the device for the test of common mode conduction interference immunity to interference as claimed in claim 1, it is characterised in that the model of described Audio power amplifier chip is LM3886.
3. the device for the test of common mode conduction interference immunity to interference as claimed in claim 1, it is characterised in that described coupling electricity routing resistance and capacitances in series composition.
4. the device for the test of common mode conduction interference immunity to interference as claimed in claim 3, it is characterised in that described resistance is the high-power resistance that rated power is more than 5W.
5. the device for the test of common mode conduction interference immunity to interference as claimed in claim 3, it is characterised in that described electric capacity is the high pressure polarity free capacitor of more than 400V.
6. the device for the test of common mode conduction interference immunity to interference as claimed in claim 1, it is characterised in that the voltage effective value of analog test signal is up to 30V.
7. the device for the test of common mode conduction interference immunity to interference as claimed in claim 1, it is characterized in that, when common code impedance is 150 Ω, the virtual value of analog test signal electric current is up to 66mA, and the value of described common code impedance is the voltage effective value ratio with its current value of the analog test signal of coupling circuit output.
8. the device for the test of common mode conduction interference immunity to interference as claimed in claim 1, it is characterised in that described equipment under test is residual action current protector.
9. the device for the test of common mode conduction interference immunity to interference as claimed in claim 1, it is characterised in that described equipment under test and an auxiliary equipment are electrically connected with, and described auxiliary equipment is power supply or communication equipment.
10. the device for the test of common mode conduction interference immunity to interference as claimed in claim 9, it is characterized in that, uncoupling circuit is installed, the analog test signal that described uncoupling circuit exports for the eliminating coupling circuit interference to auxiliary equipment between described equipment under test and auxiliary equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620257507.XU CN205450154U (en) | 2016-03-30 | 2016-03-30 | A device for test of common mode conducted disturbance noise immunity |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620257507.XU CN205450154U (en) | 2016-03-30 | 2016-03-30 | A device for test of common mode conducted disturbance noise immunity |
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| Publication Number | Publication Date |
|---|---|
| CN205450154U true CN205450154U (en) | 2016-08-10 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620257507.XU Expired - Fee Related CN205450154U (en) | 2016-03-30 | 2016-03-30 | A device for test of common mode conducted disturbance noise immunity |
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| CN (1) | CN205450154U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105842562A (en) * | 2016-03-30 | 2016-08-10 | 东莞市广安电气检测中心有限公司 | Device for testing immunity to common-mode conducted disturbance |
| CN107271785A (en) * | 2017-06-15 | 2017-10-20 | 浙江大学 | A kind of common code impedance On-line testing method of common mode choke |
-
2016
- 2016-03-30 CN CN201620257507.XU patent/CN205450154U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105842562A (en) * | 2016-03-30 | 2016-08-10 | 东莞市广安电气检测中心有限公司 | Device for testing immunity to common-mode conducted disturbance |
| CN105842562B (en) * | 2016-03-30 | 2018-12-21 | 东莞市广安电气检测中心有限公司 | A kind of device for the test of common mode conduction interference immunity to interference |
| CN107271785A (en) * | 2017-06-15 | 2017-10-20 | 浙江大学 | A kind of common code impedance On-line testing method of common mode choke |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of utility model: Device for testing immunity to common-mode conducted disturbance Effective date of registration: 20170824 Granted publication date: 20160810 Pledgee: China Co truction Bank Corp Dongguan branch Pledgor: Dongguan Guang'An Electric Testing Center Co., Ltd. Registration number: 2017440000072 |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160810 Termination date: 20190330 |
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| PC01 | Cancellation of the registration of the contract for pledge of patent right | ||
| PC01 | Cancellation of the registration of the contract for pledge of patent right |
Date of cancellation: 20200824 Granted publication date: 20160810 Pledgee: China Co. truction Bank Corp Dongguan branch Pledgor: DONGGUAN GUANG'AN ELECTRIC TESTING CENTER Co.,Ltd. Registration number: 2017440000072 |