CN209046595U - A kind of simulated pre-distortion circuit - Google Patents
A kind of simulated pre-distortion circuit Download PDFInfo
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- CN209046595U CN209046595U CN201821867990.9U CN201821867990U CN209046595U CN 209046595 U CN209046595 U CN 209046595U CN 201821867990 U CN201821867990 U CN 201821867990U CN 209046595 U CN209046595 U CN 209046595U
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Abstract
The utility model provides a kind of simulated pre-distortion circuit.The simulated pre-distortion circuit includes: module control unit, analog predistortion chip, radio-frequency power amplifier and N number of adjustable time delay unit, N is the integer greater than 1, wherein, module control unit is respectively connected with N number of adjustable time delay unit, module control unit is connected with analog predistortion chip, the output end of analog predistortion chip and the input terminal of N number of adjustable time delay unit are respectively connected with, N number of adjustable time delay unit output end is connected with the input terminal of radio-frequency power amplifier respectively, and the output end of radio-frequency power amplifier is connected with the input terminal of analog predistortion chip.Entire simulated pre-distortion circuit is controlled by module control unit, the simulated pre-distortion circuit is allowed to carry out time-division processing to input signal, so that analog predistortion chip is handled a signal corresponding with itself working frequency range a moment, effect is offseted to ultra-broadband signal to improve simulated pre-distortion circuit.
Description
Technical field
The utility model relates to field of circuit technology more particularly to a kind of simulated pre-distortion circuits.
Background technique
In order to improve the linearity of system radio frequency power amplifier, it will usually use linearization technique.Currently, linearisation skill
For art there are many implementation, one of implementation is to be realized using analog predistortion technology.
For above-mentioned analog predistortion technology when offseting to signal progress predistortion, there are the following problems: due to being simulated
The limitation of the maximum of predistortion chip, when the frequency range for needing to carry out the signal that predistortion offsets is greater than analog predistortion
When the maximum of chip, which, which cannot achieve, offsets the signal, or the effect meeting offseted
It is nothing like expected effect.
Utility model content
The utility model provides a kind of simulated pre-distortion circuit, is greater than analog predistortion chip most to frequency range to improve
Effect is offseted when the signal of big bandwidth of operation is offseted.
In a first aspect, the utility model provides a kind of simulated pre-distortion circuit, which includes: module control
Unit, analog predistortion chip, radio-frequency power amplifier and N number of adjustable time delay unit processed, N are the integer greater than 1, wherein mould
Block control unit is respectively connected with N number of adjustable time delay unit, and module control unit is connected with analog predistortion chip, simulates pre- lose
The output end of true chip and the input terminal of N number of adjustable time delay unit are respectively connected with, N number of adjustable time delay unit output end respectively with penetrate
The input terminal of frequency power amplifier is connected, and the output end of radio-frequency power amplifier is connected with the input terminal of analog predistortion chip.
Module control unit adjusts analog predistortion chip in T for the frequency range according to input signaliThe work at moment
Frequency range, and the working condition for adjusting M adjustable time delay unit in N number of adjustable time delay unit, wherein i takes all over 1 to M,
M is the integer no more than N and greater than 1.
Analog predistortion chip, in above-mentioned TiMoment, according to input signal, feedback signal and analog predistortion core
Piece is in TiThe working frequency range at moment determines i-th of analog predistortion signal, and, i-th of analog predistortion signal is sent,
In, the frequency range and analog predistortion chip of i-th of analog predistortion signal are in TiThe working frequency range at moment is corresponding, and feedback signal is
It is determined according to the output signal of radio-frequency power amplifier.
I-th of adjustable time delay unit in M adjustable time delay unit, for receiving i-th of analog predistortion signal, and root
According to the working condition of i-th of adjustable time delay unit, after i-th duration that is delayed, i-th of analog predistortion signal is sent.
Radio-frequency power amplifier, for offset signal carry out power amplification after export, wherein offseting signal is according to institute
It states input signal and M analog predistortion signal generates.
By the simulated pre-distortion circuit, since analog predistortion chip handles one and itself work frequency a moment
The corresponding signal of section, and an analog predistortion signal corresponding with itself working frequency range is exported, therefore analog predistortion electricity
The analog predistortion chip on road will not cause the analog predistortion signal generated to be unable to reach because the frequency range of signal is excessive again
Expected effect offsets effect to ultra-broadband signal to improve simulated pre-distortion circuit.
In one possible implementation, the work of i-th of adjustable time delay unit in above-mentioned M adjustable time delay unit
State is in TiI-th of analog predistortion signal is sent after moment is in the open state and the i-th duration of delay, and above-mentioned M adjustable
I-th of adjustable time delay unit in delay unit, specifically can be used for, in TiReception analog predistortion chip send the
I analog predistortion signal, the first moment after i-th duration that is delayed send the analog predistortion signal.In the program, needle
It is all after the time corresponding with itself working condition that is delayed, at the same moment to each of M adjustable time delay unit
(i.e. at the first moment) sends analog predistortion signal, it is thereby achieved that each analog predistortion signal is in same a period of time
Quarter is sent, and the unit (such as combiner) for both having received analog predistortion signal can receive the pre- mistake of M simulation in synchronization
True signal.
In one possible implementation, foregoing circuit can also include combiner, above-mentioned N number of adjustable time delay unit
Output end is connected with the input terminal of the combiner respectively, the input terminal of the output end of the combiner and above-mentioned radio-frequency power amplifier
It is connected, the combiner is for receiving the M analog predistortion signal that M adjustable time delay unit is sent respectively, then according to M mould
Quasi- pre-distorted signals determine analog predistortion composite signal, and the analog predistortion composite signal is sent to radio-frequency power and is put
Big device, wherein the frequency range of analog predistortion composite signal and the frequency range of input signal are identical.The program, will frequency by combiner
The different analog predistortion signal of section synthesizes analog predistortion composite signal, helps to offset input signal.
In one possible implementation, above-mentioned module control unit can be also used for, according to the frequency range of input signal
With the maximum of analog predistortion chip, the value of M is determined.
In one possible implementation, foregoing circuit can also include signal frequency range detection unit, the signal frequency range
The output end of detection unit is connected with the input terminal of above-mentioned module control unit, the signal frequency range detection unit, defeated for receiving
Enter signal, and input signal is detected to obtain the frequency range of input signal, is then sent to the frequency range of input signal described
Module control unit.In the program, detected by frequency range of the frequency range detection unit to input signal, and will test
The frequency range of input signal is sent to module control unit, so that module control unit is pre- to simulating according to the frequency range of input signal
Distortion chip and N number of adjustable time delay unit are controlled.
In one possible implementation, above-mentioned analog predistortion chip specifically can be used for, in TiMoment, according to defeated
Enter signal and analog predistortion chip in TiThe working frequency range at moment determines the i-th segment signal of input signal；According to feedback letter
Number and analog predistortion chip in TiThe working frequency range at moment determines the i-th segment signal of feedback signal, is then believed according to input
Number the i-th segment signal and feedback signal the i-th segment signal, i-th of analog predistortion coefficient is determined, according to the i-th of input signal
Segment signal and i-th of analog predistortion coefficient, determine i-th of analog predistortion signal, then send i-th of analog predistortion
Signal.Based on the program, realizes and the time-division of input signal is offseted.
In one possible implementation, foregoing circuit can also include N number of memory, N number of memory respectively with institute
It states analog predistortion chip to be connected, i-th of memory in N number of memory, for storing above-mentioned i-th of analog predistortion system
Number.With this solution, analog predistortion coefficient is stored, can be according to storage when handling signal later
The analog predistortion coefficient stored in device, the analog predistortion coefficient needed when obtaining handling follow-up signal faster,
Improve signal offsets speed.
In one possible implementation, above-mentioned adjustable time delay unit may include adjustable delay line and switch, wherein
Adjustable delay line is used to adjust the delay duration of adjustable time delay unit, switchs the working condition for changing adjustable time delay unit.
Second aspect, the utility model provide a kind of analog predistortion time-division and offset method, and this method can be applied to
Simulated pre-distortion circuit, the simulated pre-distortion circuit include module control unit, analog predistortion chip, radio-frequency power amplifier
With N number of adjustable time delay unit, N is the integer greater than 1, this method comprises:
Module control unit adjusts analog predistortion chip in T according to the frequency range of input signaliThe working frequency range at moment,
Module control unit adjusts the work shape of M adjustable time delay unit in N number of adjustable time delay unit according to the frequency range of input signal
State, wherein i takes all over 1 to M, and M is the integer no more than N and greater than 1.
Analog predistortion chip is in above-mentioned TiMoment, according to input signal, feedback signal and analog predistortion chip in Ti
The working frequency range at moment determines i-th of analog predistortion signal, and sends i-th of analog predistortion signal, wherein i-th of mould
The frequency range and analog predistortion chip of quasi- pre-distorted signals are in TiThe working frequency range at moment is corresponding, and feedback signal is according to radio frequency function
What the output signal of rate amplifier determined.
I-th of adjustable time delay unit in M adjustable time delay unit receives i-th of analog predistortion signal, and according to i-th
The working condition of a adjustable time delay unit, be delayed the i-th duration after, send i-th of analog predistortion signal.
Radio-frequency power amplifier to offset signal carry out power amplification after export, wherein offset signal be according to input believe
Number and M analog predistortion signal generation.
Method is offseted by the analog predistortion time-division, since analog predistortion chip handles one and oneself a moment
The corresponding signal of body working frequency range, and an analog predistortion signal corresponding with itself working frequency range is exported, therefore the simulation
The analog predistortion chip of predistortion circuit will not lead to the analog predistortion signal generated because the frequency range of signal is excessive again
It is unable to reach expected effect, effect is offseted to ultra-broadband signal to improve simulated pre-distortion circuit.
In one possible implementation, the work of i-th of adjustable time delay unit in above-mentioned M adjustable time delay unit
State is in TiMoment it is in the open state and delay the i-th duration after send i-th of analog predistortion signal, the above method is specific
It may include: i-th of adjustable time delay unit in M adjustable time delay unit in TiWhat reception analog predistortion chip was sent
I-th of analog predistortion signal, the first moment after i-th duration that is delayed send the analog predistortion signal.In the program,
It is all after the time corresponding with itself working condition that is delayed, when same for each of M adjustable time delay unit
It carves and sends analog predistortion signal, it is thereby achieved that each analog predistortion signal is sent in synchronization.
In one possible implementation, foregoing circuit can also include combiner, and the above method can also include: to close
Road device receives the M analog predistortion signal that M adjustable time delay unit is sent respectively, and true according to M analog predistortion signal
Determine analog predistortion composite signal, wherein the frequency range of analog predistortion composite signal and the frequency range of input signal are identical.The party
The different analog predistortion signal of frequency range is synthesized analog predistortion composite signal by combiner by case, is facilitated pair
Input signal is offseted.
In one possible implementation, the above method can also include: module control unit according to input signal
The maximum of frequency range and analog predistortion chip determines the value of M.
In one possible implementation, foregoing circuit can also include signal frequency range detection unit, and the above method is also
It may include: that signal frequency range detection unit receives input signal, and is detected to obtain the frequency range of input signal to input signal,
Then the frequency range of input signal is sent to the module control unit.In the program, input is believed by frequency range detection unit
Number the frequency range frequency range of input signal that is detected, and will test be sent to module control unit so that module control
Unit processed controls analog predistortion chip and N number of adjustable time delay unit according to the frequency range of input signal.
In one possible implementation, above-mentioned analog predistortion chip is in the TiMoment believes according to the input
Number, feedback signal and the analog predistortion chip be in the TiThe working frequency range at moment determines i-th of analog predistortion letter
Number, can specifically include: analog predistortion chip is in TiMoment, according to input signal and analog predistortion chip in TiMoment
Working frequency range determine the i-th segment signal of input signal；Based on the feedback signal and analog predistortion chip is in TiThe work at moment
The i-th segment signal of feedback signal is determined as frequency range, then according to i-th section of letter of the i-th segment signal of input signal and feedback signal
Number, determine i-th of analog predistortion coefficient, according to the i-th segment signal of input signal and i-th of analog predistortion coefficient, really
Fixed i-th of analog predistortion signal.Based on the program, realizes and the time-division of input signal is offseted.
In one possible implementation, foregoing circuit can also include N number of memory, and the above method can also wrap
Include: i-th of memory in N number of memory stores i-th of analog predistortion coefficient.With this solution, analog predistortion coefficient
It is stored, it, can be according to the analog predistortion coefficient stored in memory, faster when handling signal later
The analog predistortion coefficient needed when obtaining handling follow-up signal, improve signal offsets speed.
Detailed description of the invention
Fig. 1 is a kind of simulated pre-distortion circuit schematic diagram provided by the utility model；
Fig. 2 is a kind of adjustable time delay unit schematic diagram of internal structure provided by the utility model；
Fig. 3 is a kind of analog predistortion time-division provided by the utility model to offset method flow schematic diagram.
Specific embodiment
It is practical to this below in conjunction with attached drawing in order to keep the purpose of this utility model, technical solution and advantage clearer
It is novel to be described in further detail.
Fig. 1 is a kind of simulated pre-distortion circuit schematic diagram provided by the utility model, as shown in Figure 1, the analog predistortion
Circuit includes: module control unit, analog predistortion chip, radio-frequency power amplifier and N number of adjustable time delay unit, and N is greater than 1
Integer, wherein module control unit is respectively connected with N number of adjustable time delay unit, module control unit and analog predistortion core
Piece is connected, and the output end of analog predistortion chip and the input terminal of N number of adjustable time delay unit are respectively connected with, N number of adjustable delay list
First output end is connected with the input terminal of radio-frequency power amplifier respectively, the output end and analog predistortion core of radio-frequency power amplifier
The input terminal of piece is connected.
Module control unit adjusts analog predistortion chip in T for the frequency range according to input signaliThe work at moment
Frequency range, and the working condition for adjusting M adjustable time delay unit in N number of adjustable time delay unit, wherein i takes all over 1 to M,
M is the integer no more than N and greater than 1.
Analog predistortion chip, in above-mentioned TiMoment, according to input signal, feedback signal and analog predistortion core
Piece is in TiThe working frequency range at moment determines i-th of analog predistortion signal, and, i-th of analog predistortion signal is sent,
In, the frequency range and analog predistortion chip of i-th of analog predistortion signal are in TiThe working frequency range at moment is corresponding, and feedback signal is
It is determined according to the output signal of radio-frequency power amplifier.
I-th of adjustable time delay unit in M adjustable time delay unit, for receiving i-th of analog predistortion signal, and root
According to the working condition of i-th of adjustable time delay unit, after i-th duration that is delayed, i-th of analog predistortion signal is sent.
Radio-frequency power amplifier, for offset signal carry out power amplification after export, wherein offseting signal is according to institute
It states input signal and M analog predistortion signal generates.
By the simulated pre-distortion circuit, since analog predistortion chip handles one and itself work frequency a moment
The corresponding signal of section, and an analog predistortion signal corresponding with itself working frequency range is exported, therefore, analog predistortion electricity
The analog predistortion chip on road will not cause the analog predistortion signal generated to be unable to reach because the frequency range of signal is excessive again
Expected effect offsets effect to ultra-broadband signal to improve simulated pre-distortion circuit.
In one possible implementation, the work of i-th of adjustable time delay unit in above-mentioned M adjustable time delay unit
State is in TiI-th of analog predistortion signal is sent after moment is in the open state and the i-th duration of delay, and in TiMoment with
It is in close state at the time of outer.When the working condition of an adjustable time delay unit is in close state, the adjustable delay list
Member will not receive analog predistortion signal.Its in addition to above-mentioned M adjustable time delay unit in above-mentioned N number of adjustable time delay unit
His N subtracts M adjustable time delay unit and is not adjusted working condition, and the N subtracts M adjustable time delay unit and is constantly in closed state.
It is also understood that having used M adjustable time delay unit in N number of adjustable time delay unit to the mould being respectively received
Quasi- pre-distorted signals carry out delay transmission.For the value of M, be according to the frequency range of input signal and analog predistortion chip most
Relationship between big bandwidth of operation determines that rear extended meeting illustrates.
I-th of adjustable time delay unit in above-mentioned M adjustable time delay unit, specifically can be used for, in TiReception mould
I-th of analog predistortion signal that quasi- predistortion chip is sent, it is pre- that the first moment after i-th duration that is delayed sends the simulation
Distorted signal.
Above scheme is illustrated below, for example, when M value be 2 when, at this point, module control unit to it is N number of can
The working condition of 2 adjustable time delay units in delay unit is adjusted to be adjusted, it is assumed that be adjusted the adjustable of working condition and prolong
Shi Danyuan is adjustable time delay unit 1 and adjustable time delay unit 2, in T1At the moment, adjustable time delay unit 1 is in the open state, adjustable
Delay unit 2 is in close state that (adjustable time delay unit 2 is in close state, and therefore, will not receive the 1st analog predistortion
Signal), at this point, adjustable time delay unit 1 receives the 1st analog predistortion signal, the T moment after first duration that is delayed (can also
To be known as the first moment), adjustable time delay unit 1 sends the 1st analog predistortion signal.In T2Moment, at adjustable time delay unit 2
In opening state, adjustable time delay unit 1 is in close state that (adjustable time delay unit 1 is in close state, and therefore, will not be received
2nd analog predistortion signal), at this point, adjustable time delay unit 2 receives the 2nd analog predistortion signal, in second duration that is delayed
T moment afterwards, adjustable time delay unit 2 send the 2nd analog predistortion signal, wherein the time span of the first duration and second
The difference (the first duration is greater than the second duration) of the time span of duration, with T1Moment is to T2The time span at moment is identical, because
This, adjustable time delay unit 1 be delayed the first duration after and adjustable time delay unit 2 be delayed the second duration after, can synchronization (i.e.
The T moment, or be the first moment) send corresponding analog predistortion signal.
Above scheme is all corresponding with itself working condition in delay for each of M adjustable time delay unit
After duration, analog predistortion signal is sent at the same moment, it is thereby achieved that each analog predistortion signal is same
Moment is sent.
In one possible implementation, foregoing circuit can also include combiner, above-mentioned N number of adjustable time delay unit
Output end is connected with the input terminal of the combiner respectively, the input terminal of the output end of the combiner and above-mentioned radio-frequency power amplifier
It is connected, the combiner is for receiving the M analog predistortion signal that M adjustable time delay unit is sent respectively, then according to M mould
Quasi- pre-distorted signals determine analog predistortion composite signal, and the analog predistortion composite signal is sent to radio-frequency power and is put
Big device, wherein the frequency range of M analog predistortion signal is different, the frequency range and input signal of analog predistortion composite signal
Frequency range it is identical.For example, when the frequency range of input signal is 1600MHz-2000MHz, it is assumed that M is equal to 4 at this time, then shares 4
Analog predistortion signal, it is assumed that four analog predistortion signals are respectively analog predistortion signal 1, analog predistortion signal 2, mould
Quasi- pre-distorted signals 3, analog predistortion signal 4, then the frequency range of analog predistortion signal 1 can for 1600MHz-1700MHz,
The frequency range of analog predistortion signal 2 can be 1700MHz-1800MHz, analog predistortion signal 3 frequency range can be
1800MHz-1900MHz, analog predistortion signal 4 frequency range can be 1900MHz-2000MHz, 4 analog predistortion signals
By combiner, the frequency range of the analog predistortion composite signal of generation is 1600MHz-2000MHz, certainly, for each mould
The frequency range of quasi- pre-distorted signals can be divided according to actual needs, the utility model to this with no restriction.The program passes through combining
The different analog predistortion signal of frequency range is synthesized analog predistortion composite signal by device, helps to carry out input signal
It offsets.
In one possible implementation, above-mentioned module control unit can be also used for, according to the frequency range of input signal
With the maximum of analog predistortion chip, the value of M is determined.
The value of M can be determined by following formula:That is M's
Value is the result of the ratio of the frequency range of input signal and the maximum of analog predistortion chip to round up.Than
Such as, when the frequency range of input signal is 1600MHz-2040MHz, and the maximum of analog predistortion chip is 100MHz,
It can determine at this time
In another implementation, the value of M can also be determined by following formula:K is some preset value of the maximum less than analog predistortion chip, i.e. M's takes
Value is the result of the frequency range of input signal and the ratio of K to round up.Such as when the frequency range of input signal is 1600MHz-
2040MHz, the maximum of analog predistortion chip are 100MHz, and the value of preset K is 80MHz, can be determined at this time
In one possible implementation, foregoing circuit can also include signal frequency range detection unit, the signal frequency range
The output end of detection unit is connected with the input terminal of above-mentioned module control unit, the signal frequency range detection unit, defeated for receiving
Enter signal, and input signal is detected to obtain the frequency range of input signal, is then sent to the frequency range of input signal described
Module control unit.In the program, detected by frequency range of the frequency range detection unit to input signal, and will test
The frequency range of input signal is sent to module control unit, so that module control unit is pre- to simulating according to the frequency range of input signal
Distortion chip and N number of adjustable time delay unit are controlled.
In one possible implementation, above-mentioned analog predistortion chip can specifically determine T in the following manneriWhen
The analog predistortion signal at quarter:
In TiMoment, according to input signal and analog predistortion chip in TiThe working frequency range at moment determines input signal
The i-th segment signal；Based on the feedback signal and analog predistortion chip is in TiThe working frequency range at moment determines the i-th of feedback signal
Segment signal determines i-th of analog predistortion system then according to the i-th segment signal of the i-th segment signal of input signal and feedback signal
Number；According to the i-th segment signal of input signal and i-th of analog predistortion coefficient, i-th of analog predistortion signal is determined.Its
In, the frequency range of the i-th segment signal of input signal and the frequency range of the i-th segment signal of feedback signal are identical.
For example, when the frequency range of input signal is 1800MHz-2000MHz, the frequency range of feedback signal is 1800MHz-
2000MHz, the maximum of analog predistortion chip are 100MHz, and M is 2 at this time, then:
In T1At the moment, the working frequency range that module control unit adjusts analog predistortion chip is 1800MHz-1900MHz, mould
Quasi- predistortion chip determines that the frequency range of the paragraph 1 signal of input signal is 1800MHz-1900MHz, and analog predistortion chip determines
The frequency range of the paragraph 1 signal of feedback signal is 1800MHz-1900MHz, and then analog predistortion chip is according to the of input signal
The paragraph 1 signal of 1 segment signal and feedback signal determines the 1st analog predistortion coefficient, according to the paragraph 1 signal of input signal
And the 1st analog predistortion coefficient, determine the 1st analog predistortion signal.The frequency range of 1st analog predistortion signal is
1800MHz-1900MHz。
In T2At the moment, the working frequency range that module control unit adjusts analog predistortion chip is 1900MHz-2000MHz, mould
Quasi- predistortion chip determines that the frequency range of the 2nd segment signal of input signal is 1900MHz-2000MHz, and analog predistortion chip determines
The frequency range of 2nd segment signal of feedback signal is 1900MHz-2000MHz, and then analog predistortion chip is according to the of input signal
2nd segment signal of 2 segment signals and feedback signal determines the 2nd analog predistortion coefficient, according to the 2nd segment signal of input signal
And the 2nd analog predistortion coefficient, determine the 2nd analog predistortion signal.The frequency range of 2nd analog predistortion signal is
1900MHz-2000MHz。
In one possible implementation, foregoing circuit can also include N number of memory, N number of memory respectively with institute
It states analog predistortion chip to be connected, i-th of memory in N number of memory, for storing above-mentioned i-th of analog predistortion system
Number.With this solution, analog predistortion coefficient is stored, can be according to storage when handling signal later
The analog predistortion coefficient stored in device, the analog predistortion coefficient needed when obtaining handling follow-up signal faster,
Improve signal offsets speed.
In one possible implementation, the internal structure of above-mentioned adjustable time delay unit can be as shown in Fig. 2, including can
The position of tune delay line and switch, adjustable delay line and switch is interchangeable.Line 201 is used to receive the transmission of analog predistortion chip
Analog predistortion signal, line 202 are used for the signal of receiving module control unit, root for sending analog predistortion signal, line 203
According to the signal of module control unit, the delay duration of adjustable adjustable delay line and the working condition of switch (are closed or disconnected
It opens).When switching in the closure state, adjustable time delay unit is in the open state, can receive analog predistortion chip at this time
The analog predistortion signal of transmission.When switch is in an off state, adjustable time delay unit is in close state, and will not be connect at this time
Receive the analog predistortion signal that analog predistortion chip is sent.
In one possible implementation, above-mentioned simulated pre-distortion circuit can also include splitter, analog predistortion
The analog predistortion signal that chip is sent is sent to corresponding adjustable time delay unit by splitter.
In one possible implementation, above-mentioned simulated pre-distortion circuit, can also include delay line, which uses
It is transmitted to the time required for radio-frequency power amplifier in extending input signal, to realize that input signal can be with analog predistortion
The analog predistortion signal of chip output is offseted.
In one possible implementation, above-mentioned simulated pre-distortion circuit can also include one or more couplers,
Coupler may be at position as shown in Figure 1, and coupler is used to signal carrying out branch or merging.
Below with a specific embodiment, illustrate to the specific implementation process of simulated pre-distortion circuit shown in FIG. 1
Explanation.
Assuming that the frequency range of input signal is 1800MHz-2040MHz in Fig. 1, the frequency range of feedback signal is 1800MHz-
2040MHz, the maximum of analog predistortion chip are 100MHz, and N value is that 5 (i.e. circuit includes 5 adjustable delay time lists
Member, for example, be referred to as adjustable delay time unit 1, adjustable delay time unit 2, adjustable delay time unit 3, adjustable delay time unit 4, can timing
Prolong unit 5, circuit includes 5 memories, such as is referred to as memory 1, memory 2, memory 3, memory 4, memory
5), input signal is through 1 entering signal frequency range detection unit of coupler, after signal frequency range detection unit receives input signal, inspection
The frequency range for measuring input signal is 1800MHz-2040MHz, and the frequency range is sent to module control unit.
After module control unit receives the frequency range of input signal, according to the frequency range of input signal and analog predistortion signal
Maximum, determine that M value is 3 (to obtain according to formula), therefore module control unit is to N
The working condition of 3 adjustable time delay units in a adjustable time delay unit is adjusted, it is assumed that the adjustable time delay unit being adjusted
For adjustable time delay unit 1, adjustable time delay unit 2, adjustable time delay unit 3, adjustable delay time unit 4 and adjustable delay time unit 5 at this time
It is in close state, i.e., does not enable adjustable delay time unit 4 and adjustable delay time unit 5 for the input signal.Module control unit
Also according to the frequency range of input signal, analog predistortion chip is adjusted in T1The working frequency range at moment is 1800MHz-1880MHz,
T2The frequency range at moment is 1880MHz-1960MHz, in T3The frequency range at moment is 1960MHz-2040MHz (in the example, to input
The frequency range of signal, which is divided equally, to be handled, and can be pressed to the specific division methods of the working frequency range of analog predistortion chip at various moments
Actual needs is adjusted).
Analog predistortion chip receives input signal and feedback signal, in T1Moment, the work of analog predistortion chip
Frequency range is 1800MHz-1880MHz, it is thus determined that the frequency range of the paragraph 1 signal of input signal is 1800MHz-1880MHz, is determined
The frequency range of the paragraph 1 signal of feedback signal is 1800MHz-1880MHz, according to the paragraph 1 signal and feedback signal of input signal
Paragraph 1 signal determine the 1st analog predistortion coefficient, and according to the paragraph 1 signal of input signal and the 1st analog predistortion
Coefficient determines the 1st analog predistortion signal, while the 1st analog predistortion coefficient being stored into memory 1, then sends
1st analog predistortion signal to adjustable time delay unit 1, the frequency range of the 1st analog predistortion signal is 1800MHz-
1880MHz.And at this point, adjustable time delay unit 1 is in the open state, other adjustable time delay units are in close state.
In T2Moment, the working frequency range of analog predistortion chip are 1880MHz-1960MHz, it is thus determined that input signal
The frequency range of 2nd segment signal is 1880MHz-1960MHz, determines that the frequency range of the 2nd segment signal of feedback signal is 1880MHz-
1960MHz determines the 2nd analog predistortion coefficient according to the 2nd segment signal of the 2nd segment signal of input signal and feedback signal,
And the 2nd analog predistortion signal is determined according to the 2nd segment signal of input signal and the 2nd analog predistortion coefficient, simultaneously will
2nd analog predistortion coefficient is stored into memory 2, then sends the 2nd analog predistortion signal to adjustable time delay unit
The frequency range of 2, the 2nd analog predistortion signal is 1880MHz-1960MHz.And at this point, adjustable time delay unit 2 is in open shape
State, other adjustable time delay units are in close state.
In T3Moment, the working frequency range of analog predistortion chip are 1960MHz-2040MHz, it is thus determined that input signal
The frequency range of 3rd segment signal is 1960MHz-2040MHz, determines that the frequency range of the 3rd segment signal of feedback signal is 1960MHz-
2040MHz determines the 3rd analog predistortion coefficient according to the 3rd segment signal of the 3rd segment signal of input signal and feedback signal,
And the 3rd analog predistortion signal is determined according to the 3rd segment signal of input signal and the 3rd analog predistortion coefficient, simultaneously will
3rd analog predistortion coefficient is stored into memory 3, then sends the 3rd analog predistortion signal to adjustable time delay unit
The frequency range of 3, the 2nd analog predistortion signal is 1960MHz-2040MHz.And at this point, adjustable time delay unit 3 is in open shape
State, other adjustable time delay units are in close state.
Assuming that T1Moment and T2Time at intervals is 0.01 second, T2Moment and T3Time at intervals is 0.01 second, then prolonging when adjustable
After Shi Danyuan 1 receives the 1st analog predistortion signal, the 1st analog predistortion signal is sent after delay 0.02 second to conjunction
Road device after adjustable time delay unit 2 receives the 2nd analog predistortion signal, sends the pre- mistake of the 2nd simulation after delay 0.01 second
True signal is to combiner, after adjustable time delay unit 3 receives the 3rd analog predistortion signal, directly transmits the 3rd without delay
A analog predistortion signal is to combiner, and certainly, adjustable time delay unit 3 is delayed, then correspondingly, adjustable time delay unit
1 and adjustable time delay unit 2 also to carry out the delay of same duration accordingly.
Combiner has received the 1st analog predistortion signal, the 2nd analog predistortion signal and in synchronization
3 analog predistortion signals, and according to the 1st analog predistortion signal, the 2nd analog predistortion signal and the 3rd simulation
Pre-distorted signals produce analog predistortion composite signal, and the frequency range of analog predistortion composite signal is 1800MHz-2040MHz, so
Combiner sends analog predistortion composite signal to coupler 2 afterwards.
Analog predistortion composite signal is offseted in coupler 2 with the input signal transmitted through delay line, generation pair
Disappear signal, and the frequency range for offseting signal is 1800MHz-2040MHz, offsets signal and enters radio-frequency power amplifier.
Radio-frequency power amplifier to offset signal carry out power amplification after export.
Above-mentioned simulated pre-distortion circuit, since analog predistortion chip handles one and itself working frequency range a moment
Corresponding signal, and an analog predistortion signal corresponding with itself working frequency range is exported, therefore the simulated pre-distortion circuit
Analog predistortion chip will not again because signal frequency range it is excessive and cause generate analog predistortion signal be unable to reach it is pre-
The effect of phase offsets effect to ultra-broadband signal to improve simulated pre-distortion circuit.
Based on same design, the utility model provides a kind of analog predistortion time-division and offsets method, and this method can be with
Applied to simulated pre-distortion circuit, which includes module control unit, radio-frequency power amplifier, N number of simulation
Predistortion chip, N are the integer greater than 1.Fig. 3 is a kind of analog predistortion line time-division provided by the utility model to offset method stream
Journey schematic diagram, as shown in figure 3, this method comprises:
Step 301, module control unit adjusts separately M in N number of adjustable time delay unit according to the frequency range of input signal
The working condition of adjustable time delay unit, and adjustment analog predistortion chip is in TiThe working frequency range at moment.
Wherein, i takes all over 1 to M, and M is the integer no more than N and greater than 1.
Step 302, analog predistortion chip is in above-mentioned TiMoment, according to input signal, feedback signal and the pre- mistake of simulation
True chip is in TiThe working frequency range at moment determines i-th of analog predistortion signal.
Wherein, the frequency range of i-th of analog predistortion signal and analog predistortion chip are in TiThe working frequency range at moment is corresponding,
Feedback signal is determined according to the output signal of radio-frequency power amplifier.
Step 303, analog predistortion chip is in above-mentioned TiMoment sends i-th of analog predistortion signal.
Step 304, i-th of adjustable time delay unit in M adjustable time delay unit receives i-th of analog predistortion signal,
And according to the working condition of i-th of adjustable time delay unit, after i-th duration that is delayed, i-th of analog predistortion signal is sent.
Step 305, radio-frequency power amplifier to offset signal carry out power amplification after export.
Wherein, offseting signal is generated according to input signal and M analog predistortion signal.
In one possible implementation, the work of i-th of adjustable time delay unit in above-mentioned M adjustable time delay unit
State is in TiMoment it is in the open state and delay the i-th duration after send i-th of analog predistortion signal, above-mentioned steps 304
Can specifically include: i-th of adjustable time delay unit in M adjustable time delay unit is in TiReception analog predistortion chip hair
I-th of the analog predistortion signal sent, the first moment after i-th duration that is delayed send the analog predistortion signal.
In one possible implementation, before above-mentioned steps 301, module control unit is according to the frequency of input signal
The maximum of section and analog predistortion chip, determines the value of M.
In one possible implementation, foregoing circuit can also include signal frequency range detection unit, in above-mentioned steps
Before 301, signal frequency range detection unit receives input signal, and is detected to obtain the frequency range of input signal to input signal,
Then the frequency range of input signal is sent to the module control unit.
In one possible implementation, above-mentioned steps 302 can specifically include: analog predistortion chip is in TiWhen
It carves, according to input signal and analog predistortion chip in TiThe working frequency range at moment determines the i-th segment signal of input signal；Root
According to feedback signal and analog predistortion chip in TiThe working frequency range at moment determines the i-th segment signal of feedback signal, then root
According to the i-th segment signal of input signal and the i-th segment signal of feedback signal, i-th of analog predistortion coefficient is determined, believed according to input
Number the i-th segment signal and i-th of analog predistortion coefficient, determine i-th of analog predistortion signal.
In one possible implementation, foregoing circuit can also include N number of memory, after above-mentioned steps 302,
It can also include: i-th of memory, i-th of analog predistortion coefficient of storage in N number of memory before above-mentioned steps 304.
The analog predistortion time-division shown in Fig. 3 offsets the specific implementation process and beneficial effect of method, pre- with aforementioned analog
Implementation process in distortion circuit embodiment is identical with beneficial effect, can refer to foregoing description, which is not described herein again.
Obviously, it is practical without departing from this can to carry out various modification and variations to the utility model by those skilled in the art
Novel spirit and scope.If in this way, these modifications and variations of the present invention belong to the utility model claims and
Within the scope of its equivalent technologies, then the utility model is also intended to include these modifications and variations.
Claims (10)
1. a kind of simulated pre-distortion circuit, which is characterized in that including module control unit, analog predistortion chip, radio-frequency power
Amplifier and N number of adjustable time delay unit, N are the integer greater than 1；
The module control unit is respectively connected with N number of adjustable time delay unit, the module control unit and the simulation
Predistortion chip is connected, and the output end of the analog predistortion chip and the input terminal of N number of adjustable time delay unit distinguish phase
Even, N number of adjustable time delay unit output end is connected with the input terminal of the radio-frequency power amplifier respectively, the radio-frequency power
The output end of amplifier is connected with the input terminal of the analog predistortion chip；
The module control unit adjusts the analog predistortion chip in T for the frequency range according to input signaliThe work at moment
Make frequency range, and the working condition for adjusting M adjustable time delay unit in N number of adjustable time delay unit, wherein i takes
All over 1 to M, M is the integer no more than N and greater than 1；
The analog predistortion chip, in the TiMoment, according to the input signal, feedback signal and the simulation
Predistortion chip is in the TiThe working frequency range at moment determines i-th of analog predistortion signal, and, send i-th of mould
Quasi- pre-distorted signals, wherein the frequency range of i-th of analog predistortion signal and the analog predistortion chip are in the TiWhen
The working frequency range at quarter is corresponding, and the feedback signal is determined according to the output signal of the radio-frequency power amplifier；
I-th of adjustable time delay unit in the M adjustable time delay unit, for receiving i-th of analog predistortion signal,
And according to the working condition of i-th of adjustable time delay unit, after i-th duration that is delayed, i-th of analog predistortion letter is sent
Number；
The radio-frequency power amplifier, for exporting after offseting signal progress power amplification, the signal that offsets to be according to institute
It states input signal and M analog predistortion signal generates.
2. circuit as described in claim 1, which is characterized in that i-th of adjustable delay list in the M adjustable time delay unit
The working condition of member is in the TiIt is pre- that i-th of simulation is sent after moment is in the open state and delay i-th duration
Distorted signal；
I-th of adjustable time delay unit in the M adjustable time delay unit, is specifically used for, in the TiIt is simulated described in reception
I-th of analog predistortion signal that predistortion chip is sent, described in the first moment transmission after i-th duration that is delayed
Analog predistortion signal.
3. circuit as claimed in claim 1 or 2, which is characterized in that the circuit further includes combiner, described N number of adjustable to prolong
The output end of Shi Danyuan is connected with the input terminal of the combiner respectively, and the output end of the combiner is put with the radio-frequency power
The input terminal of big device is connected；
The combiner, the M analog predistortion signal sent respectively for receiving the M adjustable time delay unit, according to institute
It states M analog predistortion signal and determines analog predistortion composite signal, and the analog predistortion composite signal is sent to institute
Radio-frequency power amplifier is stated, the frequency range of the analog predistortion composite signal is identical as the frequency range of the input signal.
4. circuit as claimed in claim 1 or 2, which is characterized in that the module control unit is also used to, according to the input
The maximum of the frequency range of signal and the analog predistortion chip, determines the value of the M.
5. circuit as claimed in claim 1 or 2, which is characterized in that the circuit further includes signal frequency range detection unit, described
The output end of signal frequency range detection unit is connected with the input terminal of the module control unit；
The signal frequency range detection unit, for receiving the input signal, detection obtains the frequency range of the input signal, and will
The frequency range of the input signal is sent to the module control unit.
6. circuit as claimed in claim 1 or 2, which is characterized in that the analog predistortion chip, in the TiMoment,
According to the input signal, feedback signal and the analog predistortion chip in the TiThe working frequency range at moment, determines i-th
A analog predistortion signal, comprising:
The analog predistortion chip is in the TiMoment, according to the input signal and the analog predistortion chip in institute
State TiThe working frequency range at moment determines the i-th segment signal of the input signal；It is pre- according to the feedback signal and the simulation
Chip is distorted in the TiThe working frequency range at moment determines the i-th segment signal of the feedback signal, is then believed according to the input
Number the i-th segment signal and the feedback signal the i-th segment signal, determine i-th of analog predistortion coefficient；Believed according to the input
Number the i-th segment signal and i-th of analog predistortion coefficient, determine i-th of analog predistortion signal.
7. circuit as claimed in claim 6, which is characterized in that the circuit further includes N number of memory, N number of memory
It is connected respectively with the analog predistortion chip；
I-th of memory in N number of memory, for storing i-th of analog predistortion coefficient.
8. circuit as claimed in claim 1 or 2, which is characterized in that the simulated pre-distortion circuit further includes delay line, institute
Delay line is stated for extending the required time that the input signal is transmitted to the radio-frequency power amplifier.
9. circuit as claimed in claim 1 or 2, which is characterized in that the simulated pre-distortion circuit further includes splitter, described
The output end of analog predistortion chip is connected with the input terminal of the splitter, the output end of the splitter respectively with the N
A adjustable time delay unit is connected；
I-th of analog predistortion signal is sent to corresponding adjustable time delay unit by the splitter.
10. circuit as claimed in claim 1 or 2, which is characterized in that include adjustable delay line inside the adjustable time delay unit
And switch, the adjustable delay line for being delayed to the analog predistortion signal, the switch for changing it is described can
Adjust the working condition of delay unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821867990.9U CN209046595U (en) | 2018-11-12 | 2018-11-12 | A kind of simulated pre-distortion circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821867990.9U CN209046595U (en) | 2018-11-12 | 2018-11-12 | A kind of simulated pre-distortion circuit |
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| Publication Number | Publication Date |
|---|---|
| CN209046595U true CN209046595U (en) | 2019-06-28 |
Family
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|---|---|---|---|
| CN201821867990.9U Withdrawn - After Issue CN209046595U (en) | 2018-11-12 | 2018-11-12 | A kind of simulated pre-distortion circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109217828A (en) * | 2018-11-12 | 2019-01-15 | 京信通信系统（中国）有限公司 | A kind of simulated pre-distortion circuit and analog predistortion time-division offset method |
| CN112615632A (en) * | 2020-11-05 | 2021-04-06 | 电子科技大学 | Digital-assisted analog domain distortion suppression device and method |
-
2018
- 2018-11-12 CN CN201821867990.9U patent/CN209046595U/en not_active Withdrawn - After Issue
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109217828A (en) * | 2018-11-12 | 2019-01-15 | 京信通信系统（中国）有限公司 | A kind of simulated pre-distortion circuit and analog predistortion time-division offset method |
| CN109217828B (en) * | 2018-11-12 | 2024-03-22 | 京信网络系统股份有限公司 | Analog predistortion circuit and analog predistortion time division cancellation method |
| CN112615632A (en) * | 2020-11-05 | 2021-04-06 | 电子科技大学 | Digital-assisted analog domain distortion suppression device and method |
| CN112615632B (en) * | 2020-11-05 | 2022-02-08 | 电子科技大学 | Digital-assisted analog domain distortion suppression device and method |
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Address after: 510663 No.10, Shenzhou Road, Guangzhou Science City, economic and Technological Development Zone, Huangpu District, Guangzhou City, Guangdong Province Patentee after: Jingxin Network System Co.,Ltd. Address before: 510663 No.10, Shenzhou Road, Guangzhou Science City, economic and Technological Development Zone, Huangpu District, Guangzhou City, Guangdong Province Patentee before: COMBA TELECOM SYSTEMS (CHINA) Ltd. |
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