CN208908435U - Multi-frequency clock circuit and circuit board - Google Patents
Multi-frequency clock circuit and circuit board Download PDFInfo
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- CN208908435U CN208908435U CN201821498581.6U CN201821498581U CN208908435U CN 208908435 U CN208908435 U CN 208908435U CN 201821498581 U CN201821498581 U CN 201821498581U CN 208908435 U CN208908435 U CN 208908435U
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Abstract
The utility model relates to a kind of multi-frequency clock circuit and circuit boards.Multi-frequency clock circuit includes generating reference clock signal and being delivered to the crystal oscillator that clock generates chip, reference clock signal is received by input pin, the clock for exporting the clock signal of different frequency respectively by output pin generates chip, and the input pin that clock generates chip connects crystal oscillator.Circuit board includes multi-frequency clock circuit and control chip, and the clock in multi-frequency clock circuit generates the clock pins of the output pin connection control chip of chip, guarantees the normal work of each control chip.Only one crystal oscillator of entire circuit structure solves the problems, such as traditional multi-frequency clock circuit due to using multiple crystal oscillators to lead to high failure rate, the failure rate of circuit can be effectively reduced, improve service efficiency and stability.Further, since clock signal comes from a crystal oscillator, can also meet the needs of clock is homologous, improve the reliability of circuit.
Description
Technical field
The utility model relates to clocks to generate field, more particularly to a kind of multi-frequency clock circuit and circuit board.
Background technique
With the development of electronic technology and PCB (Printed Circuit Board, printed circuit board) mask-making technology, lead to
Believe that electronic product function is stronger and stronger, the complexity of one piece of PCB single board is also higher and higher.Due to complexity height, no
Same chip works normally the clock signal for needing different frequency.
Traditional multi-frequency clock circuit be provide clock signal respectively using the crystal oscillator of multiple and different frequencies, but
Be will lead to after having used multiple crystal oscillators since the failure rate of crystal oscillator itself is higher entire pcb board failure rate be all crystalline substances
The summation for failure rate of shaking, therefore, traditional multi-frequency clock circuit the shortcomings that there are high failure rates.
Utility model content
Based on this, it is necessary to aiming at the problem that traditional multi-frequency clock circuit high failure rate, when providing a kind of multi-frequency
Clock circuit and circuit board.
A kind of multi-frequency clock circuit, comprising:
For generate reference clock signal and be delivered to clock generate chip crystal oscillator；
The clock signal that the crystal oscillator generates is received by input pin, difference is exported by output pin respectively
The clock of the clock signal of frequency generates chip；
It includes input pin and two or more output pins that the clock, which generates chip, and the clock generates core
The input pin of piece connects the crystal oscillator.
A kind of circuit board, including chip and multi-frequency clock circuit are controlled, the clock in the multi-frequency clock circuit produces
The output pin of raw chip connects the clock pins of the control chip.
Above-mentioned multi-frequency clock circuit and circuit board, multi-frequency clock circuit generate chip using crystal oscillator and clock
Connected structure, clock generates the clock signal that the input pin receiving crystal oscillator of chip generates, and passes through output pin
The clock signal for exporting different frequency respectively, is achieved in the conversion that single frequency is input to multiple rate-adaptive pacemakers.Circuit board packet
Multi-frequency clock circuit and control chip are included, the clock in multi-frequency clock circuit generates the output pin connection control core of chip
The clock pins of piece can provide correct clock signal to each control chip, guarantee respectively controlling chip just in circuit board
Often work.Entire circuit structure is applied only for a crystal oscillator, solves traditional multi-frequency clock circuit due to using
The failure rate of circuit can be effectively reduced in the problem of multiple crystal oscillators lead to high failure rate, improves service efficiency, increases steady
It is qualitative.Further, since clock signal comes from the same crystal oscillator, can also meet the needs of clock is homologous, improve
The reliability of circuit.
Detailed description of the invention
Fig. 1 is multi-frequency clock circuit structure chart in an embodiment；
Fig. 2 is the internal frame diagram that clock generates chip in an embodiment；
Fig. 3 is multi-frequency clock circuit structure chart in an embodiment；
Fig. 4 is the internal frame diagram of clock buffer chip in an embodiment；
Fig. 5 is multi-frequency clock circuit structure chart in an embodiment；
Fig. 6 is the internal frame diagram of conversion chip in an embodiment；
Fig. 7 is the composition figure of multi-frequency clock circuit in an embodiment.
Specific embodiment
In order to which the utility model aim, technical solution and advantage is more clearly understood, by the following examples, and combine
Attached drawing is described more fully the utility model.It should be appreciated that specific embodiment described herein is only to explain
The utility model is not used to limit the utility model.
In one embodiment, referring to Figure 1, multi-frequency clock circuit includes that crystal oscillator 110 and clock generate core
Piece 120, it includes input pin and two or more output pins that clock, which generates chip 120, and clock generates chip 120
Input pin connects crystal oscillator 110.Crystal oscillator 110 generates core for generating reference clock signal and being delivered to clock
Piece 120, clock generate chip 120 and pass through the clock signal that input pin receiving crystal oscillator 110 generates, and pass through output pin
The clock signal of different frequency is exported respectively.
Specifically, crystal oscillator 110 is a kind of resonating device made of the piezoelectric effect using quartz crystal, its base
This composition, which is substantially: from one piece of quartz crystal, cuts thin slice as chip, in two corresponding surfaces of chip by certain azimuth
Upper coating silver layer is as electrode, as soon as respectively a weldering lead is connected on pin on each electrode, along with package casing constitutes
Crystal oscillator 110.Since with piezoelectric effect, quartz crystal is the oscillator of a kind of high-precision and high stability, Ke Yiyong
In generation reference clock signal.Clock generates the clock letter that chip 120 is generated by input pin receiving crystal oscillator 110
Number, the clock signal of different frequency is exported respectively by output pin, in general, a clock generates the output pin of chip 120
More than one.By taking the clock of model CY22393 generates chip 120 as an example, Fig. 2 is referred to, the output pin of the chip includes
Six pins of CLKA1, CLKB1, CLKC1, CLKD1, CLKE1 and XBUF1, the clock output of each output pin can be by pre-
Erasable configuration first is carried out to the flash of chip, can also be configured by external I2C bus, i.e., it is two-way by one
Data line and a clock line are configured the clock output frequency of chip, and use is very convenient.Specifically, pin CLKA1,
CLKB1, CLKC1, CLKD1 and CLKE1 can export the clock signal of different frequency respectively, and CLKA1 pin is configurable clock
Export A, CLKB1 pin be that configurable clock output B, CLKC1 pin be clock output C, the CLKD1 pin that can configure for can
Clock output D, the CLKE1 pin of configuration is the reference clock output that configurable clock output E, XBUF1 pin is buffering, i.e.,
The frequency of the clock signal of XBUF1 pin output is identical as the clock signal frequency that input pin receives.It is appreciated that clock
The model for generating chip 120 is not unique, as long as those skilled in the art think that certain chip can produce different frequency clock letter
Number be regarded as meet the requirements, for example, the CY22391 chip of same type, CY22394 chip or CY22395 chip etc. all may be used
Chip 120 is generated using the clock as substitution.Multi-frequency clock circuit in the present embodiment uses crystal oscillator 110 and clock
Generate the connected structure of chip 120, the clock generated by the input pin receiving crystal oscillator 110 that clock generates chip 120
Signal, and pass through the clock signal that output pin exports different frequency respectively, it is achieved in single frequency and is input to multiple frequencies
The conversion of output.
Above-mentioned multi-frequency clock circuit is applied only for a crystal oscillator 110, the failure of circuit can be effectively reduced
Rate improves service efficiency, increases stability.Further, since clock signal comes from the same crystal oscillator 110, may be used also
To meet the needs of clock is homologous, the reliability of circuit is improved.
The quantity that clock generates chip 120 is not unique, and in one embodiment, it includes first that clock, which generates chip 120,
Clock generation chip and second clock generation chip, the input terminal connection crystal oscillator 110 of the first clock generation chip, first
The output end connection second clock that clock generates chip generates the input terminal of chip.First clock generates chip and passes through input pin
The clock signal that receiving crystal oscillator 110 generates, exports the clock signal of different frequency by output pin respectively, when second
The input terminal that clock generates chip connects the output end that the first clock generates chip.Since the first clock generates the output pin of chip
Quantity be two or more, when second clock generate chip input pin connection the first clock generate chip it is defeated
Out when pin difference, it is also different that second clock generates the clock signal frequency that chip receives.
Specifically, by taking the first clock of model CY22393 generates chip as an example, when second clock generates the input of chip
When pin connects the CLKA1 pin of CY22393, it is that the first clock generates core that second clock, which generates the clock signal that chip receives,
The configurable clock signal A of piece output, when second clock generates the CLKB1 pin of the input pin connection CY22393 of chip
When, it is the configurable clock signal B that the first clock generates chip output that second clock, which generates the clock signal that chip receives,
When second clock generates the CLKC1 pin of input pin connection CY22393 of chip, second clock generates what chip received
Clock signal is the configurable clock signal C that the first clock generates chip output, when second clock generates the input pipe of chip
When foot connects the CLKD1 pin of CY22393, it is that the first clock generates chip that second clock, which generates the clock signal that chip receives,
The configurable clock signal D of output, when second clock generates the CLKE1 pin of input pin connection CY22393 of chip,
It is the configurable clock signal E that the first clock generates chip output that second clock, which generates the clock signal that chip receives, when
Second clock generate chip input pin connection CY22393 XBUF1 pin when, second clock generate chip receive when
Clock signal is the buffering reference clock signal that the first clock generates chip output, i.e., the input clock that second clock generates chip is believed
Number with the first clock generate the input clock signal of chip it is identical.The clock that chip 120 exports different frequency is generated by clock
Signal can satisfy demand of the device in circuit board to different frequency clock signal, it is ensured that the normal work of each device in circuit board
Make.
In another embodiment, the input terminal that second clock generates chip also can connect crystal oscillator 110, when the
When two clocks generate chip connection crystal oscillator 110, second clock generates the clock letter that chip is exported with crystal oscillator 110
It number is benchmark signal, at this point, second clock generates chip and the first clock, to generate the effect of chip generation identical, is the equal of the
One clock generates the extension of the clock signal quantity of chip output, suitable for there is the electricity of quantitative requirement to certain frequency clock signals
Road.It is appreciated that in other embodiments, the quantity that clock generates chip 120 can also be two or more, and increased clock produces
The input terminal of raw chip can both be connect with crystal oscillator 110, and the output end that can also generate chip with other clocks is connect,
To export the clock signal of more multi-frequency.The quantity that chip 120 is generated by increasing clock can make the clock signal exported
Frequency is more diversified, and when device is more in circuit board or the frequency of device requirement is more, multiple clocks generate chips 120
The clock signal of output multi-frequency can make each proper device operation, improve working efficiency.
In one embodiment, Fig. 2 is referred to, clock generates chip 120 and includes oscillator A1, phase-locked loop B1, intersects
Point exchanger C1 and frequency divider D1, it should be noted that in the present embodiment, clock generates the phase-locked loop B1 and frequency dividing of chip
The quantity of device D1 is not that uniquely, the quantity that clock generates the phase-locked loop B1 of chip is 3, and the quantity of frequency divider D1 is five
It is a.Oscillator A1 is connect with the input pin that clock generates chip 120, the phase-locked loop B1 of oscillator A1 and clock generation chip
Connection, the phase-locked loop B1 that clock generates chip are connect with Crosspoint switch C1, and Crosspoint switch C1 and frequency divider D1 connect
It connects, frequency divider D1 connection clock generates the output pin of chip 120.Clock generates the input pin receiving crystal vibration of chip 120
The oscillator A1 for swinging the reference clock signal of the generation of device 110 and being input to inside clock generation chip 120, comes out from oscillator A1
Clock signal through oversampling clock generate chip phase-locked loop B1 carry out frequency expansion after be input to Crosspoint switch C1, then
It is sent to each frequency divider D1, obtains the clock output of different frequency.It can be complete by the internal structure that clock generates chip 120
It is input to the conversion of multiple frequency clock signal outputs at a frequency clock signal, works normally institute to provide to each device
The clock signal needed.
In one embodiment, Fig. 3 is referred to, multi-frequency clock circuit further includes clock buffer chip 130.Clock buffer
Chip 130 includes the input pin access of phase-locked loop B2, input pin and the clock signal of output and clock buffer chip 130
The identical output pin of clock signal frequency, the input of the output pin and clock buffer chip 130 of clock buffer chip 130
Pin is connect with the phase-locked loop B2 of clock buffer chip, the quantity of the output pin of clock buffer chip 130 be two or
Two or more, the input pin connection clock of clock buffer chip 130 generates the output pin of chip 120, in another implementation
In example, the input pin of clock buffer chip 130 can also connect crystal oscillator 110, and the clock for extending same frequency is believed
Number.
Specifically, by taking the clock buffer chip 130 of model CY2305C as an example, Fig. 4, clock buffer chip 130 are referred to
Received clock signal enters inside clock buffer chip 130 from input pin REF, and clock buffer chip 130 includes locking phase
Circuit B2, from the phase-locked loop B2 of clock buffer chip come out clock signal by output pin CLKOUT, CLK1, CLK2,
CLK3 and CLK4 output, 5 tunnel clock signals of output are identical with the clock signal frequency of input, to reach to input frequency
Clock signal carries out the purpose of quantity extension, preferably meets the diversified demand of device.It is appreciated that clock buffer chip
130 model is not unique, as long as those skilled in the art think that certain chip can extend the quantity of the clock signal of same frequency
It is regarded as meeting the requirements, for example, the CY2309C chip etc. of same type all can serve as the clock buffer chip 130 of substitution, remove
Have the function of extending outside the quantity of the clock signal of same frequency, certain clock buffer chips 130 can also be defeated by part
The configuration for entering pin chooses whether to enable internal phase-locked loop, to determine the clock signal exported with the clock signal of input
Whether zero-lag, to meet the needs of different application.
In one embodiment, the quantity of clock buffer chip 130 be two, specifically include the first clock buffer chip and
The input terminal connection clock of second clock buffer chip, the first clock buffer chip generates chip, the first clock buffer chip
The input terminal of output end connection second clock buffer chip.First clock buffer chip receives clock by input pin and generates core
The clock signal that piece generates, the clock signal of same frequency is exported by output pin, and the input terminal of second clock buffer chip connects
The output end for connecing the first clock buffer chip, the clock signal frequency phase exported due to the output pin of the first clock buffer chip
Together, thus second clock buffer chip connect the first clock buffer chip any output pin output clock signal frequency all
It is identical, only serve the effect of extension quantity.
In another embodiment, the input terminal of the first clock buffer chip can also connect crystal oscillator 110, reach
Extend the effect for the clock signal quantity that crystal oscillator 110 generates.Correspondingly, second clock buffer chip also can connect crystalline substance
Oscillation body device 110, effect and the first clock buffer chip realized at this time play the role of.It is appreciated that in other embodiments
In, the quantity of clock buffer chip 130 can also be two or more, and the input terminal of increased clock buffer chip 130 both can be with
It is connect with crystal oscillator 110, the output end that can also generate chip 120 with clock is connect, can also be with other clock buffers
The output end of chip connects, and to export greater number of clock signal, meets device work requirements.
In one embodiment, Fig. 5 is referred to, multi-frequency clock circuit further includes that the clock signal of access is converted to difference
Divide the conversion chip 140 of clock signal.Fig. 6 is referred to, conversion chip 140 includes Differential input circuit E1, differential output circuit
F1, input pin and output pin.Differential input circuit E1 is connect with the input pin of conversion chip 140, Differential input circuit
E1 is connect with differential output circuit F1, and differential output circuit F1 is connect with the output pin of conversion chip 140, conversion chip 140
Input pin and clock generate the output pin of chip 120 and connect.When having high speed signal inside circuit board, conversion chip
140 can be converted to high speed signal differential clock signal output, for chip in need normal work.
Specifically, by taking the conversion chip of model SI53307 as an example, Fig. 6 is referred to, Differential input circuit E1 in the chip
Quantity be 2, the quantity of differential output circuit F1 is 2.When SI53307 chip is used for single-ended signal slip sub-signal,
Single-ended signal is input to one of pin of Differential input circuit E1, another pin makees reference voltage to 0.5VCC.If any
When two-way inputs, two-way output signal can be switched by CLK_SEL pin, select CLK0 or CLK1.The chip branch simultaneously
The signal input and output of plurality of level standard are held, so that the clock signal of output is able to satisfy a variety of different chips and believes input clock
Number level demand.It is appreciated that the model of conversion chip 140 is not unique, as long as those skilled in the art think certain chip
Differential clock signal output can be played the role of being converted to the clock signal of access to be regarded as meeting the requirements.
In any embodiment described above, crystal oscillator 110 can shake for passive crystal oscillator or active crystal
Device is swung, can be used to generate reference clock signal.Passive crystal oscillator, that is, quartz-crystal resonator, signal level is can
Become, that is to say, that it is to be determined according to start-oscillation circuit, same crystal can be adapted for multiple voltage, and flexibility is good, and
And price is usually relatively low, the producer that be suitable for that a great variety of product lines of large quantities.Active crystal oscillator, that is, quartz crystal oscillation
Vibration generator is contained in device, inside, and signal quality is good, does not need accurately to match peripheral circuit, replaces the crystal oscillator of different frequency
When circumferential arrangement circuit do not need to do corresponding adjustment yet, Comparision is stablized, and connection type is relatively easy, does not need multiple
Miscellaneous configuration circuit.
Above-mentioned multi-frequency clock circuit in order to better understand carries out detailed explanation below with reference to specific embodiment
Explanation.Fig. 7 is referred to, the multi-frequency clock circuit in figure includes crystal oscillator 110, the first clock generation chip 122, second
Clock generates chip 124, clock buffer chip 130 and conversion chip 140.Wherein, the first clock generates the input terminal of chip 122
Crystal oscillator 110 is connected, the clock signal of different frequency is generated, the input terminal of clock buffer chip 130 connects the first clock
The output pin CLKA1 for generating chip 122, the clock signal for exporting to CLKA1 pin carry out quantity extension.Conversion chip
140 input terminal connects the output pin CLKB1 that the first clock generates chip 122, the clock for will access from CLKB1 pin
Signal is converted to differential clock signal output.The input terminal that second clock generates chip 124 connects the first clock and generates chip 122
Output pin XBUF1, for the extension of frequency type will to be carried out to the clock signal that exports from XBUF1 pin.
In one embodiment, a kind of circuit board is provided, circuit board specifically can be pcb board, which includes multifrequency
Rate clock circuit and control chip, specifically, multi-frequency clock circuit include that crystal oscillator 110 and clock generate chip 120,
Crystal oscillator 110 is for generating reference clock signal, and clock generates the input pin of chip 120 and crystal oscillator 110 connects
It connects, the clock signal that receiving crystal oscillator 110 generates, clock generates the output pin of chip 120 and the clock of control chip
Pin connection, the output pin that clock generates chip 120 export the clock signal of different frequency respectively, to corresponding control chip
Correct clock signal can work normally control chip.In the present embodiment, control chip, which refers to, needs to receive clock letter
The workable chip for generating certain functions of number.
Foregoing circuit plate, including multi-frequency clock circuit and control chip, the clock in multi-frequency clock circuit generate core
The clock pins of the output pin connection control chip of piece, can provide correct clock signal to each control chip, guarantee
The normal work of chip is respectively controlled in circuit board.Entire circuit structure is applied only for a crystal oscillator, solves traditional
The failure of circuit can be effectively reduced due to the problem of using multiple crystal oscillators to lead to high failure rate in multi-frequency clock circuit
Rate improves service efficiency, increases stability.Further, since clock signal comes from the same crystal oscillator, can also expire
The homologous demand of sufficient clock, improves the reliability of circuit.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, all should be considered as described in this specification.
Above-described embodiments merely represent several embodiments of the utility model, the description thereof is more specific and detailed,
But it cannot be understood as the limitations to utility model patent range.It should be pointed out that for the common skill of this field
For art personnel, without departing from the concept of the premise utility, various modifications and improvements can be made, these are belonged to
The protection scope of the utility model.Therefore, the scope of protection shall be subject to the appended claims for the utility model patent.
Claims (8)
1. a kind of multi-frequency clock circuit characterized by comprising
For generate reference clock signal and be delivered to clock generate chip crystal oscillator；
The clock signal that the crystal oscillator generates is received by input pin, different frequency is exported by output pin respectively
Clock signal clock generate chip；
It includes input pin and two or more output pins that the clock, which generates chip, and the clock generates chip
Input pin connects the crystal oscillator.
2. circuit according to claim 1, which is characterized in that it includes that the first clock generates chip that the clock, which generates chip,
Chip is generated with second clock, the input terminal that first clock generates chip connects the crystal oscillator；When described second
The input terminal that clock generates chip connects the output end that first clock generates chip.
3. circuit according to claim 1, which is characterized in that the clock generate chip include oscillator, phase-locked loop,
Crosspoint switch and frequency divider, the input pin that the oscillator and the clock generate chip connects, the oscillator and
The clock generates the phase-locked loop connection of chip, and the clock generates the phase-locked loop of chip and the Crosspoint switch connects
It connects, the Crosspoint switch is connect with the frequency divider, and the frequency divider connects the output pin that the clock generates chip.
4. circuit according to claim 1, which is characterized in that it further include clock buffer chip, the clock buffer chip
The clock that the input pin of clock signal and the clock buffer chip including phase-locked loop, input pin and output accesses is believed
The input pin of number identical output pin of frequency, the output pin of the clock buffer chip and the clock buffer chip is equal
It is connect with the phase-locked loop of the clock buffer chip, the quantity of the output pin of the clock buffer chip is two or two
More than, the input pin of the clock buffer chip connects the output pin that the clock generates chip.
5. circuit according to claim 4, which is characterized in that the quantity of the clock buffer chip is two.
6. circuit according to claim 1, which is characterized in that further include that the clock signal of access is converted to differential clocks
The conversion chip of signal, the conversion chip include Differential input circuit, differential output circuit, input pin and output pin；
The Differential input circuit is connect with the input pin of the conversion chip, the Differential input circuit and difference output electricity
Road connection, the differential output circuit are connect with the output pin of the conversion chip；The input pin of the conversion chip with
The clock generates the output pin connection of chip.
7. circuit described in -6 any one according to claim 1, which is characterized in that the crystal oscillator shakes for no source crystal
Swing device or active crystal oscillator.
8. a kind of circuit board, which is characterized in that including control chip and when multi-frequency as described in claim 1-7 any one
Clock circuit, the output pin that the clock in the multi-frequency clock circuit generates chip connect the clock pipe of the control chip
Foot.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201821498581.6U CN208908435U (en) | 2018-09-13 | 2018-09-13 | Multi-frequency clock circuit and circuit board |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201821498581.6U CN208908435U (en) | 2018-09-13 | 2018-09-13 | Multi-frequency clock circuit and circuit board |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110658758A (en) * | 2019-09-23 | 2020-01-07 | 北京中科晶上科技股份有限公司 | Control method and control system |
| CN112910553A (en) * | 2019-12-03 | 2021-06-04 | Oppo广东移动通信有限公司 | LiFi communication device and electronic equipment |
-
2018
- 2018-09-13 CN CN201821498581.6U patent/CN208908435U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110658758A (en) * | 2019-09-23 | 2020-01-07 | 北京中科晶上科技股份有限公司 | Control method and control system |
| CN112910553A (en) * | 2019-12-03 | 2021-06-04 | Oppo广东移动通信有限公司 | LiFi communication device and electronic equipment |
| CN112910553B (en) * | 2019-12-03 | 2023-06-30 | Oppo广东移动通信有限公司 | LiFi communication device and electronic equipment |
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