CN208797945U - The double light bypass network adapters of gigabit - Google Patents
The double light bypass network adapters of gigabit Download PDFInfo
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- CN208797945U CN208797945U CN201821778750.1U CN201821778750U CN208797945U CN 208797945 U CN208797945 U CN 208797945U CN 201821778750 U CN201821778750 U CN 201821778750U CN 208797945 U CN208797945 U CN 208797945U
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Abstract
The utility model provides a kind of double light bypass network adapters of gigabit, it includes pcb board and the chipset that is mounted on pcb board, pcb board, which is equipped on the one side of chipset, is equipped with cooling fin, chipset includes the 5th control chip U5, the first power-switching circuit connecting with the 5th control chip U5, two optical transport mouths J17 and J18, second control chip U2, BP switch J1, attachment base J2 and storage chip U10, BP switch J1 is connected with the third control chip U4 of control chip U3 and the 4th, and third controls chip U3 and is connected with the 4th control chip U4；Attachment base J2 is connected with the 9th control chip U9, socket J4 and external connection seat J6, the control of socket J4 and the 9th chip U9 is connect with the 5th control chip U5, socket J4 is also connected with third attachment base J3 and the 5th attachment base J5, attachment base J2 and third attachment base J3 are connected with second source conversion circuit, the adapter can safeguard network connection when system breaks down.
Description
Technical field
The utility model belongs to adapter technique field, in particular to the double light bypass network adapters of a kind of gigabit.
Background technique
With the development of science and technology people are increasing to the demand of information, the transmission medium of network data gradually by
Network is changed to optical fiber transmission.Because optical fiber transmission information has many advantages, such as big transmission capacity, good confidentiality, rapidly convenience.
The optical network adapter on the host of personal computer, work station or server is with PCI express at present
Interface is mainstream, different according to the function of host, and the port in fiber optic network adaptation can differ for 1 to 4, and port is electron-donating
A socket is connected, socket is with for one small-sized optical signal receiver (Small form-factor pluggable of insertion
Transceiver, SFP).After optical fiber is connected to small-sized optical signal transceiver, the transmission that can be used as data is used.
But as to data transmission and the requirement of process performance, existing optical network adapter poor performance is going out
When existing failure, the connection of whole network cannot be maintained.
Utility model content
Of the existing technology in order to solve the problems, such as, the utility model provides a kind of with the double light of the extraordinary gigabit of performance
Bypass network adapter can safeguard network connection when system breaks down.
The utility model specific technical solution is as follows:
The utility model provides a kind of double light bypass network adapters of gigabit, which includes pcb board and be mounted on
Chipset on pcb board, the pcb board, which is equipped on the one side of chipset, is equipped with cooling fin, and the chipset includes the
Five control chip U5, with it is described 5th control chip U5 connect the first power-switching circuit, two optical transport mouths J17 and J18,
Second control chip U2, BP switch J1, attachment base J2 and storage chip U10, the BP switch J1 are connected with third control chip
The control chip U4 of U3 and the 4th, the third control chip U3 and are connected with the 4th control chip U4；The attachment base J2 is connected with
9th control chip U9, socket J4 and external connection seat J6, the socket J4 and the 9th control chip U9 control core with the 5th
Piece U5 connection, the socket J4 are also connected with third attachment base J3 and the 5th attachment base J5, and the attachment base J2 is connected with third
Seat J3 is connected with second source conversion circuit.
Further to improve, the second source conversion circuit includes the second source conversion chip connecting with attachment base J2
U8 and with third attachment base J3 the 16th capacitor C16 connecting and the first Schottky diode SS14-1, the 16th capacitor
The other end of C16 is grounded, and the first Schottky diode SS14-1 is connected with the 23rd resistance R23, and the described 23rd
The other end of resistance R23 is separately connected the second farad capacitor F2 and the second Schottky diode SS14-2, second farad of electricity
Hold F2 ground connection, the first Schottky diode SS14-1 and the second Schottky diode SS14-2 convert core with the first power supply
Piece U1 controls the control of chip U3 and the 4th chip U4 with third and is connected；The control chip of the first power conversion chip U1 and second
U2 is connected；The second source conversion chip U8 controls chip U2, optical transport mouth J17 with the 5th control chip U5, second respectively
It is connected with J18, socket J4 with storage chip U10.
Further to improve, the second source conversion chip U8 is also connected with the 4th power conversion chip U7, and described the
Four power conversion chip U7 are connected with socket J4.
Further to improve, first power-switching circuit includes the third electricity being connected with the 5th control chip U5
Source conversion chip U6 and first capacitor C1 parallel with one another, the second capacitor C2, third capacitor C3 and the 4th capacitor C4, after in parallel
One end ground connection and simultaneously with the 5th control chip U5 be connected, the collector of other end connecting triode Q1, the triode Q1
Emitter connect respectively with one end of the 5th capacitor C5 and the 6th capacitor C6, the 5th capacitor C5's and the 6th capacitor C6 is another
It is grounded after the connection of one end, the ground level of the triode Q1 is connected with the 5th control chip U5.
Further to improve, the 5th control chip U5 is also connected with crystal oscillator Y1.
Further to improve, first resistor R1, second resistance R2, third is also respectively connected in the 5th control chip U5
Resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance R9, the tenth
The other end of resistance R10, eleventh resistor R11, the first resistor R1, the 8th resistance R8 and the 9th resistance R9 are grounded, described
Second resistance R2,3rd resistor R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7, the tenth resistance R10
With another termination 3.3V power supply of eleventh resistor R11.
It is further to improve, the second source conversion chip U8 by filter circuit and the 5th control chip U5,
Second control chip U2, optical transport mouth J17 are connected with J18, socket J4, the 4th power conversion chip U7 with storage chip U10, institute
Stating filter circuit includes and the 5th control chip U5, the second control chip U2, optical transport mouth J17 and J18, socket J4, the 4th electricity
The twelfth resistor R12 that source conversion chip U7 is connected with storage chip U10, the other end of the twelfth resistor R12 connect respectively
Connection pull-up resistor F1, the 7th capacitor C7, the 8th capacitor C8, the 9th capacitor C9, thirteenth resistor R13, the tenth capacitor C10 and inductance
The other end of one end of L1, the tenth capacitor C10 connect with the other end of thirteenth resistor R13 and is connected with the 14th resistance
R14, the other end of the 14th resistance R14 respectively with the 7th capacitor C7, the 8th capacitor C8, the 9th capacitor C9 and farad capacitor
F1 is grounded after being connected, and the other end of the inductance L1 is connected by the 11st capacitor C11 with second source conversion chip U8.
Further to improve, the adapter further includes the indicator light circuit being connected with the 5th control chip U5, the finger
Indication lamp circuit include with the 5th control chip U5 be connected the 15th resistance R15, the 16th resistance R16, the 17th resistance R17 and
The other end of 18th resistance R18, the 15th resistance R15 are separately connected the 12nd capacitor C12 and the 19th resistance R19,
The other end of the 19th resistance R19 passes through the 20th resistance R20 of LED1 connection, the other end of the 12nd capacitor C12
It is grounded after connecting the 13rd capacitor C13, the other end of the 13rd capacitor C13 and the 20th resistance R20 is electric with the 16th
The other end for hindering R16 is connected；The other end of the 17th resistance R17 is separately connected the electricity of the 14th capacitor C14 and the 21st
Hinder R21, the one end of the 21st resistance R21 by the 22nd resistance R22 of LED2 connection, the 14th capacitor C14
The other end connect the 15th capacitor C15 one end after be grounded, the other end and the 22nd resistance of the 15th capacitor C15
The other end of R22 is connected with the other end of the 18th resistance R18.
The utility model has the following beneficial effects: the double light bypass network adapters of gigabit provided by the utility model can be in master
Its ethernet port is bypassed or disconnected when the machine system failure, power supply are closed or software is requested, can be the connection of maintenance whole network.
Detailed description of the invention
Fig. 1 is the circuit diagram of chipset in the double light bypass network adapters of 1 gigabit of embodiment；
Fig. 2 is the circuit diagram of chipset in the double light bypass network adapters of 2 gigabit of embodiment；
Fig. 3 is the circuit diagram of chipset in the double light bypass network adapters of 3 gigabit of embodiment；
Fig. 4 is the circuit diagram of chipset in the double light bypass network adapters of 4 gigabit of embodiment；
Fig. 5 is the circuit diagram of chipset in the double light bypass network adapters of 5 gigabit of embodiment.
Specific embodiment
Embodiment 1
A kind of double light bypass network adapters of gigabit that the utility model embodiment 1 provides, the adapter includes pcb board
And it is mounted on the chipset on pcb board, the pcb board, which is equipped on the one side of chipset, is equipped with cooling fin, described to dissipate
Backing can be made of materials such as the copper sheets of plate, and cooling fin can be fixed on pcb board by rubber column gel column, as shown in Figure 1, described
Chipset includes the 5th control chip U5, the first power-switching circuit connecting with the 5th control chip U5, two light biographies
Outlet J17 and J18, the second control chip U2, BP switch J1, attachment base J2, crystal oscillator Y1, storage chip U10, the BP switch J1
It is connected with the third control of control chip U3 and the 4th chip U4, the third control chip U3 is connected with the 4th control chip U4；
The attachment base J2 is connected with the 9th control chip U9, socket J4 and external connection seat J6, the socket J4 and the 9th control core
Piece U9 is connect with the 5th control chip U5, and the socket J4 is also connected with third attachment base J3 and the 5th attachment base J5, described
Attachment base J2 and third attachment base J3 are connected with second source conversion circuit.5th control in adapter provided by the utility model
Chip U5 is Intel I350 ethernet controller, and optical transport mouth J17 and J18 are respectively SFP-1, the type of the second control chip U2
Number be ATMEGA88, third control chip U3 and the 4th control chip U4 model be RT9198-33PJ5R, the 9th control core
The model AT25256 of the model 74AHC1G04 of piece U9, storage chip U10；The Network adaptation that this practical utility model provides
The function of each component of device are as follows: storage chip U10EEPROM, that is, Electrically Erasable Programmable Read-Only Memory is that data are not after a kind of power down
Storage chip is lost, Y1 effect is to keep synchronizing convenient for each section to be to provide basic clock signal for adapter, the 9th control
Coremaking piece U9 is that single channel reverser is exactly to increase driving capability；J2 and J3 is two attachment bases, is used for and other equipment pair
The mouth connect, J6 are an external connection seats, and J5 inserts sim, and J4 is minipcie socket, for inserting mini card, passes through each attachment base
The data of access are deposited and handled by the second control chip U2, are then controlled at chip U5 using second
Reason carries out optical transport finally by J17 and J18；Wherein J1 is BP switch, when third control chip U3 work, at BP switch
In open state, i.e. bypass condition, when the 4th control chip U4 work, BP switch is in off state, i.e. normal condition, this is suitable
Port is independent interface to orchestration in the normal mode, in bypass mode, is all sent out from the received all groupings of a port
It is sent to adjacent port.Third control chip, the 4th control chip, BP under disconnection (Disconnect) mode, in adapter
The control of switch J1 and second chip U2 acts synergistically so that analog switch/path cable disconnects, and then is around what is broken down
System, and longest runing time is provided for network
Embodiment 2
The double light bypass network adapters of the gigabit that the utility model embodiment 2 provides are essentially identical with embodiment 1, different
Place is, as shown in Fig. 2, the second source conversion circuit includes the second source conversion chip U8 connecting with attachment base J2
(model tps54327) and with third attachment base J3 the 16th capacitor C16 connecting and the first Schottky diode SS14-1, institute
The other end ground connection of the 16th capacitor C16 is stated, the first Schottky diode SS14-1 is connected with the 23rd resistance R23,
The other end of the 23rd resistance R23 is separately connected the second farad capacitor F2 and the second Schottky diode SS14-2, institute
State the second farad capacitor F2 ground connection, the first Schottky diode SS14-1 and the second Schottky diode SS14-2 are with the
One power conversion chip U1 (model RT9198-33PJ5R) controls the control of chip U3 and the 4th chip U4 with third and is connected；It is described
First power conversion chip U1 is connected with the second control chip U2；The second source conversion chip U8 controls core with the 5th respectively
Piece U5, the second control chip U2, optical transport mouth J17 are connected with J18, socket J4 with storage chip U10, the second source conversion
Chip U8 is also connected with the 4th power conversion chip U7 (model RT9013-15GB), the 4th power conversion chip U7 and inserts
Seat J4 is connected.
With continued reference to Fig. 2, first power-switching circuit includes the third electricity being connected with the 5th control chip U5
Source conversion chip U6 (model AO4606) and first capacitor C1 parallel with one another, the second capacitor C2, the electricity of third capacitor C3 and the 4th
Hold C4, one end after parallel connection is grounded and is connected simultaneously with the 5th control chip U5, the collector of other end connecting triode Q1, institute
The emitter for stating triode Q1 is connect with one end of the 5th capacitor C5 and the 6th capacitor C6 respectively, the 5th capacitor C5 and the 6th
It is grounded after the other end connection of capacitor C6, the ground level of the triode Q1 is connected with the 5th control chip U5.Third power supply
Electricity also the 5th control chip U5 of supply after conversion chip U6 conversion.
Power supply can be changed into different power supplys and be used to be powered to a chip in chipset by power-switching circuit, guarantee to supply
The stability of electricity improves anti-interference.
Embodiment 3
The double light bypass network adapters of the gigabit that the utility model embodiment 3 provides are essentially identical with embodiment 1, different
Place is, as shown in figure 3, first resistor R1, second resistance R2, third electricity is also respectively connected in the 5th control chip U5
Hinder R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance R9, the tenth electricity
Hinder the other end ground connection of R10, eleventh resistor R11, the first resistor R1, the 8th resistance R8 and the 9th resistance R9, described the
Two resistance R2,3rd resistor R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7, the tenth resistance R10 and
Another termination 3.3V power supply of eleventh resistor R11.
The resistance of connection 3.3V power supply belongs to pull-up resistor, i.e. second resistance R2,3rd resistor R3, the 4th resistance R4, the
Five resistance R5, the 6th resistance R6, the 7th resistance R7, the tenth resistance R10 and eleventh resistor R11 belong to pull-up resistor, can be by one
A uncertain signal is connected with power supply by a resistance, is fixed on high level.Pull-up is to device Injection Current；Fill electricity
Stream；When the I/O port that one is connected to pull-up resistor is set as input state, its normality is high level.
The resistance of ground connection belongs to pull down resistor, i.e. first resistor R1, the 8th resistance R8 and the 9th resistance R9 can be by one not
Determining signal is connected to the ground by a resistance, is fixed on low level, and drop-down is from device output current；Sourcing current.When one
When a I/O port for being connected to pull down resistor is set as input state, its normality is low level.
Embodiment 4
The double light bypass network adapters of the gigabit that the utility model embodiment 4 provides are essentially identical with embodiment 2, different
Place is, as shown in figure 4, the second source conversion chip U8 passes through filter circuit and the 5th control chip U5, the
Two control chip U2, optical transport mouth J17 are connected with J18, socket J4, the 4th power conversion chip U7 with storage chip U10, described
Filter circuit includes and the 5th controls chip U5, the second control chip U2, optical transport mouth J17 and J18, socket J4, the 4th power supply
The twelfth resistor R12 that conversion chip U7 is connected with storage chip U10, the other end of the twelfth resistor R12 are separately connected
Farad resistance F1, the 7th capacitor C7, the 8th capacitor C8, the 9th capacitor C9, thirteenth resistor R13, the tenth capacitor C10 and inductance L1
One end, the other end of the tenth capacitor C10 connect with the other end of thirteenth resistor R13 and is connected with the 14th resistance
R14, the other end of the 14th resistance R14 respectively with the 7th capacitor C7, the 8th capacitor C8, the 9th capacitor C9 and farad capacitor
F1 is grounded after being connected, and the other end of the inductance L1 is connected by the 11st capacitor C11 with second source conversion chip U8.Filtering
Circuit plays the role of filtering and decoupling, provides stable power supply.
Embodiment 5
The double light bypass network adapters of the gigabit that the utility model embodiment 5 provides are essentially identical with embodiment 1, different
Place is, as shown in figure 5, the adapter further includes the indicator light circuit being connected with the 5th control chip U5, the instruction
Circuit for lamp includes the 15th resistance R15, the 16th resistance R16, the 17th resistance R17 and the being connected with the 5th control chip U5
18 resistance R18, the other end of the 15th resistance R15 are separately connected the 12nd capacitor C12 and the 19th resistance R19, institute
The other end of the 19th resistance R19 is stated by the 20th resistance R20 of LED1 connection, the other end of the 12nd capacitor C12 connects
The 13rd capacitor C13 is met, the other end of the 13rd capacitor C13 and the 20th resistance R20 is another with the 16th resistance R16
One end is connected；The other end of the 17th resistance R17 is separately connected the 14th capacitor C14 and the 21st resistance R21, described
The one end of 21st resistance R21 by the 22nd resistance R22 of LED2 connection, the other end company of the 14th capacitor C14
It is grounded after connecing one end of the 15th capacitor C15, the other end of the 15th capacitor C15 and the 22nd resistance R22's is another
End is connected with the other end of the 18th resistance R18.
When signal is sent or is linked, LED light can be bright, plays the role of prompt.
Above embodiments are only that preferred embodiments of the present invention are described, not to the model of the utility model
It encloses and is defined, under the premise of not departing from the spirit of the design of the utility model, those of ordinary skill in the art are to the utility model
The various changes and improvements made of technical solution should all fall into the protection scope that claims of the utility model determine.
Claims (7)
1. a kind of double light bypass network adapters of gigabit, which is characterized in that the adapter includes pcb board and is mounted on PCB
Chipset on plate, the pcb board, which is equipped on the one side of chipset, is equipped with cooling fin, and the chipset includes the 5th control
Coremaking piece U5, the first power-switching circuit being connect with the 5th control chip U5, two optical transport mouth J17 and J18, second
Control chip U2, BP switch J1, attachment base J2 and storage chip U10, the BP switch J1 be connected with third control chip U3 with
4th control chip U4, the third control chip U3 and are connected with the 4th control chip U4；The attachment base J2 is connected with the 9th
It controls chip U9, socket J4 and external connection seat J6, the socket J4 and the 9th control chip U9 controls chip U5 with the 5th
Connection, the socket J4 are also connected with third attachment base J3 and the 5th attachment base J5, the attachment base J2 and third attachment base J3
It is connected with second source conversion circuit.
2. the double light bypass network adapters of gigabit as described in claim 1, which is characterized in that the second source conversion circuit
Including the second source conversion chip U8 that is connect with attachment base J2 and with third attachment base J3 the 16th capacitor C16 connecting and
The other end of first Schottky diode SS14-1, the 16th capacitor C16 is grounded, first Schottky diode
SS14-1 is connected with the 23rd resistance R23, and the other end of the 23rd resistance R23 is separately connected the second farad capacitor F2
With the second Schottky diode SS14-2, the second farad capacitor F2 ground connection, the first Schottky diode SS14-1 and
Second Schottky diode SS14-2 controls chip U4 with the first power conversion chip U1 and third control chip U3 and the 4th
It is connected；The first power conversion chip U1 is connected with the second control chip U2；The second source conversion chip U8 respectively with
5th control chip U5, the second control chip U2, optical transport mouth J17 are connected with J18, socket J4 with storage chip U10.
3. the double light bypass network adapters of gigabit as claimed in claim 2, which is characterized in that the second source conversion chip
U8 is also connected with the 4th power conversion chip U7, and the 4th power conversion chip U7 is connected with socket J4.
4. the double light bypass network adapters of gigabit as described in claim 1, which is characterized in that first power-switching circuit
Including the third power conversion chip U6 and first capacitor C1 parallel with one another, second being connected with the 5th control chip U5
Capacitor C2, third capacitor C3 and the 4th capacitor C4, one end after parallel connection is grounded and is connected simultaneously with the 5th control chip U5, another
Hold the collector of connecting triode Q1, the emitter of triode Q1 one end with the 5th capacitor C5 and the 6th capacitor C6 respectively
Connection is grounded, the ground level of the triode Q1 and described the after the other end connection of the 5th capacitor C5 and the 6th capacitor C6
Five control chip U5 are connected.
5. the double light bypass network adapters of gigabit as described in claim 1, which is characterized in that the 5th control chip U5 is also
It is connected with crystal oscillator Y1.
6. the double light bypass network adapters of gigabit as claimed in claim 3, which is characterized in that the second source conversion chip
U8 passes through filter circuit and the 5th control chip U5, the second control chip U2, optical transport mouth J17 and J18, socket J4, the
Four power conversion chip U7 are connected with storage chip U10, and the filter circuit includes and the 5th control chip U5, the second control core
The twelfth resistor that piece U2, optical transport mouth J17 and J18, socket J4, the 4th power conversion chip U7 are connected with storage chip U10
R12, the other end of the twelfth resistor R12 are separately connected a farad resistance F1, the 7th capacitor C7, the 8th capacitor C8, the 9th electricity
Hold one end of C9, thirteenth resistor R13, the tenth capacitor C10 and inductance L1, the other end and the 13rd of the tenth capacitor C10
The other end of resistance R13 connects and is connected with the 14th resistance R14, and the other end of the 14th resistance R14 is respectively with the 7th
Capacitor C7, the 8th capacitor C8, the 9th capacitor C9 are grounded after being connected with farad capacitor F1, and the other end of the inductance L1 passes through the tenth
One capacitor C11 is connected with second source conversion chip U8.
7. the double light bypass network adapters of gigabit as described in claim 1, which is characterized in that the adapter further includes and the
Five control chip U5 connected indicator light circuit, the indicator light circuit include the 15th electricity being connected with the 5th control chip U5
Hinder the other end point of R15, the 16th resistance R16, the 17th resistance R17 and the 18th resistance R18, the 15th resistance R15
Not Lian Jie the 12nd capacitor C12 and the 19th resistance R19, the other end of the 19th resistance R19 passes through LED1 connection second
The other end of ten resistance R20, the 12nd capacitor C12 is grounded after connecting the 13rd capacitor C13, the 13rd capacitor C13
It is connected with the other end of the 16th resistance R16 with the other end of the 20th resistance R20；The 17th resistance R17's is another
End is separately connected the 14th capacitor C14 and the 21st resistance R21, and the 21st resistance R21 passes through LED2 connection second
One end of 12 resistance R22, the other end of the 14th capacitor C14 is grounded after connecting one end of the 15th capacitor C15, described
The other end of 15th capacitor C15 and the other end of the 22nd resistance R22 are connected with the other end of the 18th resistance R18.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821778750.1U CN208797945U (en) | 2018-10-30 | 2018-10-30 | The double light bypass network adapters of gigabit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821778750.1U CN208797945U (en) | 2018-10-30 | 2018-10-30 | The double light bypass network adapters of gigabit |
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| Publication Number | Publication Date |
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| CN208797945U true CN208797945U (en) | 2019-04-26 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111147132A (en) * | 2019-12-31 | 2020-05-12 | 杭州迪普科技股份有限公司 | Bypass device and network optical interface module comprising same |
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2018
- 2018-10-30 CN CN201821778750.1U patent/CN208797945U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111147132A (en) * | 2019-12-31 | 2020-05-12 | 杭州迪普科技股份有限公司 | Bypass device and network optical interface module comprising same |
| CN111147132B (en) * | 2019-12-31 | 2021-07-23 | 杭州迪普科技股份有限公司 | Bypass device and network optical interface module comprising same |
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