CN208622086U - A kind of serial communication interface circuit - Google Patents
A kind of serial communication interface circuit Download PDFInfo
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- CN208622086U CN208622086U CN201821326226.0U CN201821326226U CN208622086U CN 208622086 U CN208622086 U CN 208622086U CN 201821326226 U CN201821326226 U CN 201821326226U CN 208622086 U CN208622086 U CN 208622086U
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- Prior art keywords
- diode
- transceiving chip
- communication interface
- serial communication
- interface circuit
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- 238000004891 communication Methods 0.000 title claims abstract description 20
- 230000005540 biological transmission Effects 0.000 claims abstract description 8
- 230000006641 stabilisation Effects 0.000 abstract description 2
- 238000011105 stabilization Methods 0.000 abstract description 2
- 239000003990 capacitor Substances 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
The utility model proposes a kind of serial communication interface circuits, including a transceiving chip, the VCC pin of the transceiving chip connects supply voltage, the GND pin of the transceiving chip is grounded, transceiving chip one end connection input signal and transmission signal, the transmitting-receiving of the transceiving chip enables pin access transmitting-receiving enable signal, the other end of the transceiving chip is connected to network, two output ends of the transceiving chip pass through the first current-limiting resistance respectively and the second current-limiting resistance is connected to network, and pull-up resistor and pull down resistor are respectively arranged between the transceiving chip and network, and the transceiving chip connects supply voltage by pull-up resistor, the transceiving chip connects ground by pull down resistor, the both ends of first current-limiting resistance and the both ends of the second current-limiting resistance are connected separately with the first anti-circnit NOT and the second anti-circnit NOT , the utility model enough guarantees the stabilization of signal transmitting and receiving, and avoids the pollution of noise.
Description
Technical field
The utility model belongs to telecommunication circuit technical field, in particular to a kind of serial communication interface circuit.
Background technique
Currently, the major function of RS-485 interface circuit is: the transmission signal from microprocessor is turned by transmitter
Change the differential signal in communication network into, by communication network fall differential signal be converted by receiver it is received by microprocessor
Signal, but since signal is easy to appear uncertain intermediate state and other noises in network transmission process, lead to letter
Number transmission result it is not ideal enough.
Therefore, it in view of above scheme in actual fabrication and in place of implementing using upper missing, and corrected, improved, together
When in line with the spirit and theory asked, and by the knowledge of profession, the auxiliary of experience, and after multi-party clever thought, test, just found
The utility model out, spy provide a kind of serial communication interface circuit again, can guarantee the stabilization of signal transmitting and receiving, and avoid noise
Pollution.
Utility model content
The utility model proposes a kind of serial communication interface circuits to solve the problems of the prior art.
The technical solution of the utility model is achieved in that serial communication interface circuit, including a transceiving chip, described
The VCC pin of transceiving chip connects supply voltage, the GND pin ground connection of the transceiving chip, transceiving chip one end connection
Input signal and transmission signal, the transmitting-receiving of the transceiving chip enable pin access transmitting-receiving enable signal, the transceiving chip
The other end is connected to network, and two output ends of the transceiving chip pass through the first current-limiting resistance respectively and the second current-limiting resistance connects
It is connected to network, and is respectively arranged with pull-up resistor and pull down resistor between the transceiving chip and network, and the transceiving chip
By pull-up resistor connect supply voltage, the transceiving chip by pull down resistor connect, the two of first current-limiting resistance
End and the both ends of the second current-limiting resistance are connected separately with the first anti-circnit NOT and the second anti-circnit NOT.
As a preferred embodiment, the transceiving chip is MAX485 chip.
As a preferred embodiment, being connected with 3rd resistor between two input terminals of the transceiving chip.
As a preferred embodiment, the first anti-circnit NOT includes first diode and the two or two pole of concatenation
Pipe, the cathode of first diode connect transceiving chip, and the cathode of the second diode connects network.
As a preferred embodiment, the second anti-circnit NOT includes concatenated third diode and the four or two pole
Pipe, the cathode of third diode connect transceiving chip, and the cathode of the 4th diode connects network.
As a preferred embodiment, first diode and the second diode are zener diode.
As a preferred embodiment, third diode and the 4th diode are zener diode.
As a preferred embodiment, the node between first diode and the second diode is grounded.
As a preferred embodiment, the node between third diode and the 4th diode is grounded.
After above-mentioned technical proposal, the beneficial effects of the utility model are: passing through the output termination in transceiving chip
Enter current-limiting resistance, ensure that the stability of transmission signal, also, connect respectively by pull-up resistor in the output end of transceiving chip
Power supply is grounded by pull down resistor, ensure that the level of receiving and transmitting signal is different, and the signal transmission for meeting MAX485CPA chip is wanted
It asks, in addition, being provided with reversed diode at the both ends of current-limiting resistance, when voltage or current intensity is excessive, makes output end
Other elements are protected by way of breakdown diode, ensure that the stability of entire circuit.
Detailed description of the invention
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, the accompanying drawings in the following description is only
It is some embodiments of the utility model, for those of ordinary skill in the art, before not making the creative labor property
It puts, is also possible to obtain other drawings based on these drawings.
Fig. 1 is the structural schematic diagram of the utility model.
In figure, R1- first resistor；R2- second resistance；R3- pull-up resistor；R4- pull down resistor；D1- first diode；
The second diode of D2-；D3- third diode；The 4th diode of D4-；U1- transceiving chip；C1- first capacitor.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without creative efforts
Every other embodiment obtained, fall within the protection scope of the utility model.
As shown in Figure 1, this serial communication interface circuit, including a transceiving chip U1, the VCC pin of the transceiving chip U1
Supply voltage is connected, the VCC pin of transceiving chip U1 is grounded by first capacitor C1, and the GND pin of the transceiving chip U1 connects
Ground, the one end the transceiving chip U1 connect input signal and send signal, and the transmitting-receiving of the transceiving chip U1 enables pin access
Enable signal is received and dispatched, the other end of the transceiving chip U1 is connected to network, two output ends difference of the transceiving chip U1
It is connected to network by the first current-limiting resistance R1 and the second current-limiting resistance R2, and is set respectively between the transceiving chip U1 and network
It is equipped with pull-up resistor R3 and pull down resistor R4, and the transceiving chip U1 passes through pull-up resistor R3 connection supply voltage, the receipts
Send out chip U1 by pull down resistor R4 connection, the both ends of the first current-limiting resistance R1 and the both ends point of the second current-limiting resistance R2
It is not connected with the first anti-circnit NOT and the second anti-circnit NOT.The transceiving chip U1 is MAX485 chip.The transceiving chip U1
Two input terminals between be connected with 3rd resistor.The first anti-circnit NOT includes the first diode D1 and the two or two of concatenation
The cathode of pole pipe D2, first diode D1 connect transceiving chip U1, and the cathode of the second diode D2 connects network.Described second is anti-
Circnit NOT includes concatenated third diode D3 and the 4th diode D4, and the cathode of third diode D3 connects transceiving chip U1,
The cathode of 4th diode D4 connects network.First diode D1 and the second diode D2 is zener diode.Three or two pole
Pipe D3 and the 4th diode D4 is zener diode.Node ground connection between first diode D1 and the second diode D2.The
Node ground connection between three diode D3 and the 4th diode D4.
The working principle of the serial communication interface circuit is: input signal is received by the RX pin of transceiving chip U1, it is defeated
Arrive network out, and it is received come automatic network signal host computer is sent to by TX pin, and by transceiving chip U1's
Output end accesses current-limiting resistance, ensure that the stability of transmission signal, also, passes through respectively in the output end of transceiving chip U1 upper
Pull-up resistor R3 connection power supply, is grounded by pull down resistor R4, be ensure that the level of receiving and transmitting signal is different, is met MAX485CPA core
The request signal transmission of piece, in addition, reversed diode is provided at the both ends of current-limiting resistance, in voltage or current intensity mistake
When big, output end is made to protect other elements by way of breakdown diode, ensure that the stability of entire circuit.
The above is only the preferred embodiment of the utility model only, is not intended to limit the utility model, all at this
Within the spirit and principle of utility model, any modification, equivalent replacement, improvement and so on should be included in the utility model
Protection scope within.
Claims (9)
1. a kind of serial communication interface circuit, which is characterized in that including a transceiving chip, the VCC pin of the transceiving chip connects
Supply voltage, the GND pin ground connection of the transceiving chip, transceiving chip one end connection input signal and transmission signal are connect,
The transmitting-receiving of the transceiving chip enables pin access transmitting-receiving enable signal, and the other end of the transceiving chip is connected to network, institute
Two output ends for stating transceiving chip pass through the first current-limiting resistance respectively and the second current-limiting resistance is connected to network, and the transmitting-receiving
Pull-up resistor and pull down resistor are respectively arranged between chip and network, and the transceiving chip connects power supply by pull-up resistor
Voltage, the transceiving chip connect ground by pull down resistor, and the two of the both ends of first current-limiting resistance and the second current-limiting resistance
End is connected separately with the first anti-circnit NOT and the second anti-circnit NOT.
2. serial communication interface circuit according to claim 1, which is characterized in that the transceiving chip is MAX485 core
Piece.
3. serial communication interface circuit according to claim 2, which is characterized in that two input terminals of the transceiving chip
Between be connected with 3rd resistor.
4. serial communication interface circuit according to claim 3, which is characterized in that the first anti-circnit NOT includes concatenation
First diode and the second diode, the cathode of first diode connect transceiving chip, the cathode of the second diode connects net
Network.
5. serial communication interface circuit according to claim 4, which is characterized in that the second anti-circnit NOT includes series connection
Third diode and the 4th diode, the cathode of third diode connects transceiving chip, and the cathode of the 4th diode connects net
Network.
6. serial communication interface circuit according to claim 5, which is characterized in that first diode and the second diode are equal
For zener diode.
7. serial communication interface circuit according to claim 6, which is characterized in that third diode and the 4th diode are equal
For zener diode.
8. serial communication interface circuit according to claim 7, which is characterized in that first diode and the second diode it
Between node ground connection.
9. serial communication interface circuit according to claim 8, which is characterized in that third diode and the 4th diode it
Between node ground connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821326226.0U CN208622086U (en) | 2018-08-16 | 2018-08-16 | A kind of serial communication interface circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821326226.0U CN208622086U (en) | 2018-08-16 | 2018-08-16 | A kind of serial communication interface circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208622086U true CN208622086U (en) | 2019-03-19 |
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ID=65715392
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821326226.0U Expired - Fee Related CN208622086U (en) | 2018-08-16 | 2018-08-16 | A kind of serial communication interface circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208622086U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109992081A (en) * | 2019-04-04 | 2019-07-09 | 杭州嘉楠耘智信息科技有限公司 | Computing device and computer server |
-
2018
- 2018-08-16 CN CN201821326226.0U patent/CN208622086U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109992081A (en) * | 2019-04-04 | 2019-07-09 | 杭州嘉楠耘智信息科技有限公司 | Computing device and computer server |
| CN109992081B (en) * | 2019-04-04 | 2024-06-07 | 杭州嘉楠耘智信息科技有限公司 | Computing device and computer server |
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| Date | Code | Title | Description |
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| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20190319 |
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| CF01 | Termination of patent right due to non-payment of annual fee |