CN208589014U - The Intelligent hardware watchdog circuit of tape pulse detection - Google Patents
The Intelligent hardware watchdog circuit of tape pulse detection Download PDFInfo
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- CN208589014U CN208589014U CN201821146008.9U CN201821146008U CN208589014U CN 208589014 U CN208589014 U CN 208589014U CN 201821146008 U CN201821146008 U CN 201821146008U CN 208589014 U CN208589014 U CN 208589014U
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Abstract
The utility model discloses a kind of Intelligent hardware watchdog circuits of tape pulse detection, circuit and power MOS pipe ON/OFF circuit are restarted automatically including booting delay control circuit, pulse-detecting circuit, delay switching-off, booting delayed detection function is provided by the delay control circuit that is switched on, to guarantee that hardware system has time enough to enter stable state after the power-up.By the pulse signal of pulse-detecting circuit real-time detection hardware system sending, the judgment basis whether worked normally using pulse signal as hardware system can determine whether to reset hardware system again, guarantee the reliability service of hardware system.Circuit connection is restarted automatically by delay switching-off between pulse-detecting circuit and power MOS pipe ON/OFF circuit, realize shutdown delay, alarm and reset function again, the on-off powered using the main control chip of power MOS pipe ON/OFF circuit control hardware system, ensure that the reliability of hardware watchdog itself.
Description
Technical field
The utility model relates to field of power electronics, relate in particular to a kind of Intelligent hardware house dog of tape pulse detection
Circuit.
Background technique
With the development of electronic technology, the integrated level of product is higher and higher, more and more intelligent chips and various electronics
Circuit constitutes complicated electronic product, is widely used in people's lives, career field, but system is at work often by intelligence
The energy potential program BUG of chip and the interference of each adverse circumstances: such as interference of temperature, humidity, dust, external electromagnetic field is led
It causes whole system can not work normally, unpredictable consequence occurs, causes heavy economic losses.
Currently, existing hardware watchdog circuit all seals between reset pin at common I/O mouthfuls of main control chip substantially
Whether specialized hardware watchdog chip is overturn by detection signal level, and main control chip reset pin is set height or set low to come in fact
It is existing, the disadvantage is that having a single function；It has higher requirements to the I/O mouth low and high level transformation period of main control chip, is typically only capable to detect
Square wave or rectangular wave；By the reset mode setting height to main control chip reset pin or setting low, system cannot be absolutely solved
Crash situation.
Summary of the invention
In order to solve the above-mentioned technical problem, the utility model proposes a kind of Intelligent hardware house dog electricity of tape pulse detection
Road, it is whether normal as system with the pulse signal by real-time detection single-chip microcontroller or the pulse signal of other hardware circuits
The judgment basis of work, it is determined whether reset system again, guarantee the reliability service of system with this, improve the reliable of system
Property.
The technical solution of the utility model is achieved in that
A kind of Intelligent hardware watchdog circuit of tape pulse detection, including booting delay control circuit, pulse-detecting circuit,
Delay switching-off restarts circuit and power MOS pipe ON/OFF circuit automatically, the output end of the booting delay control circuit with it is described
The control terminal of pulse-detecting circuit is connected, the input terminal of the pulse-detecting circuit and the pulse signal output end of hardware system
It is connected, the output end of the pulse-detecting circuit is connected with the input terminal that the delay switching-off restarts circuit automatically, described
The output end that delay switching-off restarts circuit automatically is connected with the input terminal of the power MOS pipe ON/OFF circuit, the power
The output end of metal-oxide-semiconductor ON/OFF circuit is connected with the feeder ear of hardware system, and the output of the power MOS pipe ON/OFF circuit
It holds and is connected with the input terminal of the booting delay control circuit.
Further, the booting delay control circuit includes second resistance R2,3rd resistor R3, the 4th resistance R4,
Six resistance R6, first capacitor C1, the second capacitor C2, third capacitor C3, the second metal-oxide-semiconductor Q2, first comparator U1, first diode
D1；Input terminal and the power MOS pipe ON/OFF circuit of the one end of the second resistance as the booting delay control circuit
Output end be connected, one end of the other end of the second resistance and second capacitor and the first comparator it is anti-
Phase input terminal is connected, one end of three resistance and one end of the 6th resistance and the homophase input of the first comparator
End is connected, the output end of the first comparator and one end of the 4th resistance, one end of the third capacitor and described
The grid of second metal-oxide-semiconductor is connected, and the other end of second capacitor, the other end of the 6th resistance, described first are compared
The negative power end of device, the other end of the third capacitor, the source electrode of second metal-oxide-semiconductor and a termination of the first capacitor
Ground；The other end of the 3rd resistor, the positive power source terminal of the first comparator, the other end of the 4th resistance and described
Another termination power supply of one capacitor, the first diode is in parallel with the second resistance, the drain electrode of second metal-oxide-semiconductor
Output end as the booting delay control circuit is connected with the control terminal of the pulse-detecting circuit.
Further, the power MOS pipe ON/OFF circuit includes first resistor, the 5th resistance, triode, the first metal-oxide-semiconductor
With third metal-oxide-semiconductor, the first MOS pipe is P-channel power MOS pipe, and the drain electrode of first metal-oxide-semiconductor is as the power
The output end of metal-oxide-semiconductor ON/OFF circuit is connected with the input terminal of the feeder ear of hardware system and the booting delay control circuit,
The grid of first metal-oxide-semiconductor is connected with one end of the collector of the triode and the first resistor, the first MOS
The source electrode of pipe is connected with the other end of the first resistor, one end of the 5th resistance and power supply, the 5th electricity
The other end of resistance is connected with the base stage of the drain electrode of the third metal-oxide-semiconductor and the triode, the source electrode of the third metal-oxide-semiconductor and
The emitter of the triode is grounded, input terminal of the grid of the third metal-oxide-semiconductor as the power MOS pipe ON/OFF circuit
The output end for restarting circuit automatically with the delay switching-off is connected.
Further, the pulse-detecting circuit includes the tenth resistance, eleventh resistor, twelfth resistor, the 14th electricity
Resistance, the 16th resistance, the 17th resistance, the 5th capacitor, the 6th capacitor, the 7th capacitor, the 8th capacitor, the 9th capacitor, the tenth electricity
Appearance, monostable flipflop, the 4th metal-oxide-semiconductor, the 5th metal-oxide-semiconductor；One end of 17th resistance is as the pulse-detecting circuit
Input terminal be connected with the pulse signal output end of hardware system, and the 17th resistance end and the 6th capacitor
One end is connected, and the other end of the 6th capacitor is connected with one end of the 16th resistance, the 16th resistance
The other end is connected with the grid of the 5th metal-oxide-semiconductor, the drain electrode of the 5th metal-oxide-semiconductor and one end of the twelfth resistor,
One end of 8th capacitor and the external low level signal triggering end of the monostable flipflop are connected, and the monostable
Control terminal and booting delays time to control electricity of the external low level signal triggering end of trigger as the pulse-detecting circuit
The output end on road is connected, and the output end of the monostable flipflop is connected with one end of the 14th resistance, and described
The other end of 14 resistance is connected with the grid of the 4th metal-oxide-semiconductor, and the one of the source electrode of the 4th metal-oxide-semiconductor, the 7th capacitor
End, one end of the tenth resistance, the ground terminal of the monostable flipflop, one end of the 9th capacitor, the 8th electricity
The other end of appearance, the source electrode of the 5th metal-oxide-semiconductor, the other end of the 17th resistance and a termination of the 5th capacitor
Ground, the other end of the twelfth resistor, one end of the tenth resistance, the power end of the monostable flipflop and reset are defeated
Enter a termination power supply at end, the other end of the 5th capacitor, the eleventh resistor, the other end of the tenth resistance
It is connected with the other end of the high level triggering end and discharge end of the monostable flipflop, the 9th capacitor, the described tenth
The other end of capacitor is connected with the voltage controling end of the monostable flipflop, the other end of the eleventh resistor and the 4th
The other end of the drain electrode of metal-oxide-semiconductor and the 7th capacitor is connected, and the other end of the 7th capacitor is as the pulse detection electricity
The output end on road is connected with the input terminal that the delay switching-off restarts circuit automatically.
Further, it includes the 7th resistance, the 8th resistance, the 9th resistance, the tenth that the delay switching-off restarts circuit automatically
Three resistance, the 15th resistance, the 18th resistance, the 4th capacitor, the 11st capacitor, buzzer, the second diode, the three or two pole
Pipe, the second comparator, third comparator and the 6th metal-oxide-semiconductor；One end of the thirteenth resistor is automatic as the delay switching-off
The input terminal for restarting circuit is connected with the output end of the pulse-detecting circuit, the other end of the thirteenth resistor with it is described
One end of positive, described 11st capacitor, the non-inverting input terminal of the third comparator and second ratio of second diode
Inverting input terminal compared with device is connected, and one end of the 7th resistance is compared with one end and described second of the 15th resistance
The non-inverting input terminal of device is connected, the other end of the 15th resistance and one end of the 18th resistance and third ratio
Inverting input terminal compared with device is connected, the output end of second comparator and one end, the third comparator of the 8th resistance
Output end and the grid of the 6th metal-oxide-semiconductor be connected, the drain electrode of the 6th metal-oxide-semiconductor and the anode of third diode and institute
The cathode for stating buzzer is connected, and the anode of the buzzer is connected with one end of nine resistance, the 9th resistance
The other end, the cathode of the third diode, the other end of the 8th resistance, one end of the 4th capacitor, described second
The positive power source terminal of comparator, the positive power source terminal of the third comparator, the 7th resistance another termination power supply, it is described
The other end of 11st capacitor, the other end of the 18th resistance, the negative power end of second comparator, third ratio
The other end compared with the negative power end of device, the source electrode of the 6th metal-oxide-semiconductor, the 4th capacitor is grounded, second diode
Cathode connects hardware system and loads, and the output end of the output end of second comparator or the third comparator is as the delay
The output end that shutdown restarts circuit automatically is connected with the input terminal of the power MOS pipe ON/OFF circuit.
The beneficial effects of the utility model are: the utility model provides a kind of Intelligent hardware house dog electricity of tape pulse detection
Road, including booting delay control circuit, pulse-detecting circuit, delay switching-off restart circuit and power MOS pipe ON/OFF electricity automatically
Road controls the delay of pulse detection resistance by booting delay control circuit and enters working condition, make no matter to input letter in booting
Number be which kind of state, power MOS pipe ON/OFF circuit all on state, thus provide booting delayed detection function,
To guarantee that hardware system (chip of ARM kernel) has time enough to enter stable state after the power-up, guarantee hardware system
After the operation is stable, then start to detect input signal, ensure that the reliability of Intelligent hardware watchdog circuit itself.It is examined by pulse
Slowdown monitoring circuit real-time detection hardware system (single-chip microcontroller or other hardwired electronic circuits) issue pulse signal, using pulse signal as
The judgment basis whether hardware system works normally can determine whether to reset hardware system again, guarantee hardware system
Reliability service.Therefore, the Intelligent hardware watchdog circuit of the utility model tape pulse detection can be adapted for all sending arteries and veins
Rush the product of signal, applied widely, strong applicability, and can be with the various hardware systems of seamless interfacing, improvement cost is low.By prolonging
Shi Guanji restarts circuit connection between pulse-detecting circuit and power MOS pipe ON/OFF circuit automatically, realizes power MOS pipe
Shutdown delay, alarm and the reset function again of ON/OFF circuit, for example, closing power MOS pipe ON/OFF circuit by several seconds
It is disconnected to be delayed and then restore again to the main control chip power supply of hardware system, to guarantee that the charge of circuit capacitance can be bled off completely,
It avoiding being switched on again when powering on, the time for the delay that is switched on will not have a surplus electricity because of circuit capacitance and cause delay time too short, into
And guarantee the effect that the main control chip to hardware system resets, the reliability of system is improved, realizes the reliability service of system.Using
The on-off of the main control chip power supply of power MOS pipe ON/OFF circuit control hardware system, even gives the hardware system of higher power dissipation
Main control chip power supply, the power loss of power MOS pipe ON/OFF circuit itself is also very small, to ensure that hardware watchdog
The reliability of itself.Therefore, the utility model hardware system crash reset effect is thorough, and hardware cost is low, strong antijamming capability,
Various interference can effectively be solved and cause program fleet failure, improve the reliability of system entirety, be particularly suitable for it is various it is industrial,
The unattended operation environment in the fields such as communication, control, power electronics.
Detailed description of the invention
Fig. 1 is the functional block diagram of the Intelligent hardware watchdog circuit of the utility model tape pulse detection；
Fig. 2 is the circuit diagram of the Intelligent hardware watchdog circuit of the utility model tape pulse detection；
Fig. 3 is the working timing figure of the Intelligent hardware watchdog circuit of the utility model tape pulse detection.
Specific embodiment
In order to be more clearly understood that the technology contents of the utility model, spy lifts following embodiment and is described in detail, mesh
Be only that the content for being best understood from the utility model rather than limit the protection scope of the utility model.Hardware system in the present embodiment
System includes but is not limited to single-chip microcontroller or other intelligent chip electronic circuits.
As depicted in figs. 1 and 2, a kind of Intelligent hardware watchdog circuit of tape pulse detection, including booting delays time to control electricity
Road, pulse-detecting circuit, delay switching-off restart circuit and power MOS pipe ON/OFF circuit, the booting delay control circuit automatically
Output end be connected with the control terminal of the pulse-detecting circuit, the input terminal of the pulse-detecting circuit and hardware system
Pulse signal output end is connected, and the output end of the pulse-detecting circuit restarts the input of circuit with the delay switching-off automatically
End is connected, and the output end that the delay switching-off restarts circuit automatically is connected with the input terminal of the power MOS pipe ON/OFF circuit
Connect, the output end of the power MOS pipe ON/OFF circuit is connected with the feeder ear of hardware system, and the power MOS pipe open/
The output end on powered-down road is connected with the input terminal of the booting delay control circuit.
Preferably, the booting delay control circuit includes second resistance R2,3rd resistor R3, the 4th resistance R4, the 6th
Resistance R6, first capacitor C1, the second capacitor C2, third capacitor C3, the second metal-oxide-semiconductor of N-channel Q2, first comparator U1, the one or two
Pole pipe D1；Input terminal and the power MOS pipe ON/OFF of the one end of the second resistance as the booting delay control circuit
The output end of circuit is connected, one end and the first comparator of the other end of the second resistance and second capacitor
Inverting input terminal be connected, one end of three resistance and one end of the 6th resistance and the same phase of the first comparator
Input terminal is connected, one end of the output end of the first comparator and the 4th resistance, one end of the third capacitor and
The grid of second metal-oxide-semiconductor is connected, the other end of second capacitor, the other end of the 6th resistance, described first
The negative power end of comparator, the other end of the third capacitor, the source electrode of second metal-oxide-semiconductor and one end of the first capacitor
Ground connection；The other end of the 3rd resistor, the positive power source terminal of the first comparator, the other end of the 4th resistance and described
Another termination power supply (+5V of first capacitor-IN), the first diode is in parallel with the second resistance, and described second
The drain electrode of metal-oxide-semiconductor is connected as the output end of the booting delay control circuit with the control terminal of the pulse-detecting circuit.
The working principle of above-mentioned booting delay control circuit are as follows: first capacitor C1 is the power supply of first comparator U1A
Filter capacitor, second resistance R2 and the second capacitor C2 form integrating circuit, due to second resistance and power MOS pipe ON/OFF circuit
Output end be connected, when power MOS pipe ON/OFF circuit is connected and powers, electric current is flowed through on second resistance R2 and to the second electricity
Hold (electrolytic capacitor) C2 charging, simultaneously as second resistance R2 is connected to the inverting input terminal of first comparator U1A, 3rd resistor
+ the 5V_IN that R3 and the 6th resistance R6 inputs power supply is divided, and it is same mutually defeated to first comparator U1A to provide reference voltage
Enter end, therefore, charging is initial, and the inverting input terminal voltage of first comparator U1A is lower than non-inverting input terminal voltage, first comparator
The output voltage of U1A will be high level, and the Vgs voltage of the second metal-oxide-semiconductor Q2 of N-channel is+5V, and the second metal-oxide-semiconductor Q2 is connected, the
The drain voltage (TR/H) of two metal-oxide-semiconductors is 0V, and at this time regardless of which kind of state is input signal be, the first metal-oxide-semiconductor of power Q1 is held always
Continuous conducting；When the voltage of the second capacitor C2 is slowly charged due to the resistor rl, the inverting input terminal voltage of first comparator U1A will be above same phase
Input terminal voltage, at this point, the output voltage of first comparator U1A is low level, the Vgs voltage of the second metal-oxide-semiconductor of N-channel Q2 is
The drain voltage TR/H of 0V, the second metal-oxide-semiconductor Q2 shutdown, the second metal-oxide-semiconductor will be always no longer 0V, due to the drain electrode of the second metal-oxide-semiconductor
Voltage is connected with the control terminal of pulse-detecting circuit, at this point, drain voltage TR/H will be influenced by input signal current state,
That is pulse-detecting circuit is just initially located in effective working condition.Therefore, arteries and veins can control by booting delay control circuit
Rush detection resistance delay and enter working condition, make no matter input signal which kind of state, power MOS pipe ON/OFF circuit all in
On state, so that booting delayed detection function is provided, to guarantee hardware system (chip of ARM kernel) after the power-up
There is time enough to enter stable state, after guaranteeing hardware system the operation is stable, then starts to detect input signal, ensure that intelligence
The reliability of energy hardware watchdog circuit itself.
In above-mentioned booting delay control circuit, the 4th resistance R4 is the output pull-up resistor of first comparator U1A, third
Capacitor C3 is the output delay capacitor of first comparator U1A, and first diode D1 is in parallel with second resistance R2, is used in power the
When one metal-oxide-semiconductor Q1 is turned off, the energy on the second capacitor C2 will be discharged rapidly.
Preferably, the power MOS pipe ON/OFF circuit includes first resistor R1, the 5th resistance R5, triode Q3, first
Metal-oxide-semiconductor Q1 and N-channel third metal-oxide-semiconductor Q4, first metal-oxide-semiconductor are P-channel power MOS pipe, the drain electrode of first metal-oxide-semiconductor
As the output end of the power MOS pipe ON/OFF circuit and the feeder ear of hardware system and the booting delay control circuit
Input terminal is connected, and the grid of the first MOS pipe is connected with one end of the collector of the triode and the first resistor
Connect, the other end of the source electrode of first metal-oxide-semiconductor and the first resistor, one end of the 5th resistance and power supply (+
5V-IN) it is connected, the other end of the 5th resistance is connected with the base stage of the drain electrode of the third metal-oxide-semiconductor and the triode
It connects, the source electrode of the third metal-oxide-semiconductor and the emitter ground connection of the triode, the grid of the third metal-oxide-semiconductor is as the function
The input terminal of rate metal-oxide-semiconductor ON/OFF circuit is connected with the output end that the delay switching-off restarts circuit automatically.
The working principle of above-mentioned power MOS pipe ON/OFF circuit are as follows: as first time energization input+5V-IN, power first
Metal-oxide-semiconductor Q1 conducting, i.e. power MOS pipe ON/OFF circuit debugging, to hardware system and other circuit power supplies.When initial, power supply
Supply voltage+5V_IN input, since booting delay control circuit control pulse-detecting circuit and delay switching-off restart circuit automatically
It does not work, the driving voltage ON/OFF of the grid of N-channel third metal-oxide-semiconductor is 0V, and+5V_IN gives NPN tri- pole by the 5th resistance R5
Base stage offer+5V high level the forward bias voltage of pipe Q3, NPN triode Q3 conducting, the grid quilt of the first metal-oxide-semiconductor of P-channel Q1
It is pulled low to low level 0V, P-channel the first metal-oxide-semiconductor Q1 conducting, output voltage+5V_OUT=+5V_IN；After the delay that is switched on, arteries and veins
It rushes detection circuit and delay switching-off and restarts circuit automatically and start effectively to work, driving voltage ON/OFF is not remaining 0V, works as ON/
When OFF is high level (5V), conduit, the base stage of NPN triode Q3 will be pulled low to 0V, NPN tri- by N-channel third metal-oxide-semiconductor Q4
Pole pipe Q3 cut-off, the grid of the first metal-oxide-semiconductor of P-channel Q1 are pulled to high level 5V, the first metal-oxide-semiconductor of P-channel Q1 by first resistor R1
Shutdown.Therefore, by controlling the driving voltage ON/OFF of the grid of N-channel third metal-oxide-semiconductor, power MOS pipe ON/OFF can be realized
The on-off function of circuit, the utility model are powered using the main control chip of power MOS pipe ON/OFF circuit control hardware system
On-off, even to the main control chip power supply of the hardware system of higher power dissipation, the power damage of power MOS pipe ON/OFF circuit itself
Consumption is also very small, to ensure that the reliability of hardware watchdog itself.
Preferably, the pulse-detecting circuit includes the tenth resistance R10, eleventh resistor R11, twelfth resistor R12, the
14 resistance R14, the 16th resistance R16, the 17th resistance R17, the 5th capacitor C5, the 6th capacitor C6, the 7th capacitor C7, the 8th
Capacitor C8, the 9th capacitor C9, the tenth capacitor C10, monostable flipflop U2, the 4th metal-oxide-semiconductor Q5 of N-channel, the 5th metal-oxide-semiconductor of N-channel
Q6；One end of 17th resistance is as the input terminal of the pulse-detecting circuit and the pulse signal output end of hardware system
Be connected, and the 17th resistance end is connected with one end of the 6th capacitor, the other end of the 6th capacitor with
One end of 16th resistance is connected, and the other end of the 16th resistance is connected with the grid of the 5th metal-oxide-semiconductor,
The drain electrode of 5th metal-oxide-semiconductor and one end of the twelfth resistor, one end of the 8th capacitor and the monostable trigger
The external low level signal triggering end (TRIG, 2 feet) of device is connected, and the external low level signal of the monostable flipflop
Triggering end is connected as the control terminal of the pulse-detecting circuit with the output end of the booting delay control circuit, the list
The output end (OUT, 3 feet) of steady state trigger is connected with one end of the 14th resistance, the 14th resistance it is another
End is connected with the grid of the 4th metal-oxide-semiconductor, the source electrode of the 4th metal-oxide-semiconductor, one end of the 7th capacitor, the tenth resistance
One end, the ground terminal (GND, 1 foot) of the monostable flipflop, one end of the 9th capacitor, the 8th capacitor it is another
One end, the source electrode of the 5th metal-oxide-semiconductor, the other end of the 17th resistance and the 5th capacitor one end ground connection, it is described
The other end of twelfth resistor, one end of the tenth resistance, the power end (VDD, 8 feet) of the monostable flipflop and reset
Input terminal (RST, 4 feet), the other end of the 5th capacitor, the eleventh resistor one termination power supply, the described tenth
The high level triggering end (THRES, 6 feet) and discharge end (DISCH, 7 feet) of the other end of resistance and the monostable flipflop,
The other end of 9th capacitor is connected, the other end of the tenth capacitor and the voltage controling end of the monostable flipflop
(CONT, 5 feet) are connected, the drain electrode of the other end of the eleventh resistor and the 4th metal-oxide-semiconductor and the 7th capacitor it is another
End is connected, and the other end of the 7th capacitor is restarted as the output end of the pulse-detecting circuit with the delay switching-off automatically
The input terminal of circuit is connected.
The working principle of above-mentioned pulse-detecting circuit are as follows:
5th capacitor C5 is the power supply filter capacitor of monostable flipflop U2, can avoid the antenna of input signal lead
Effect introduces pulse spurious signal, so that pulse-detecting circuit has been takeed for pulse signal input, the 17th resistance R17 is in circuit
Play the role of absorbing interference signal；7th capacitor C7 exports OUT1 as the output end of the pulse-detecting circuit.Work as input
It is defeated according to the logical characteristic for handing over blocking of capacitor when signal is sine wave, square wave, rectangular wave, triangular wave, sawtooth wave isopulse signal
Enter signal after the 17th resistance R17, the 6th capacitor C6, the 16th resistance R16, arteries and veins will be generated in the grid of the 5th metal-oxide-semiconductor Q6
Rushing driving signal is connected the 5th metal-oxide-semiconductor Q6, and the drain voltage TR/H of the second metal-oxide-semiconductor is pulled to low level, monostable touching at this time
It sends out device U2 and exports high level, the output of monostable flipflop U2 drives the 4th metal-oxide-semiconductor Q5 by the 14th resistance R14, by the 4th
Metal-oxide-semiconductor Q5 conducting, making OUT1 output is low level；If input signal is high level or low level, blocking is handed over according to capacitor is logical
Characteristic, the grid step voltage of the 5th metal-oxide-semiconductor Q6 is 0V, and the 5th metal-oxide-semiconductor Q6 shutdown, TR/H is high level, monostable trigger always
Device U2 exports low level, the 4th metal-oxide-semiconductor Q5 shutdown, and OUT1 output is high level.Therefore, pass through above-mentioned pulse-detecting circuit
OUT1 exports low level or high level, it can be determined that whether input signal is pulse signal, so as to real-time detection hardware
Whether whether system (single-chip microcontroller or other hardwired electronic circuits) issues pulse signal, normal using pulse signal as hardware system
The judgment basis of work can determine whether to reset hardware system again, guarantee the reliability service of hardware system.
Preferably, the delay switching-off restart automatically circuit include the 7th resistance R7, the 8th resistance R8, the 9th resistance R9,
Thirteenth resistor R13, the 15th resistance R15, the 18th resistance R18, the 4th capacitor C4, the 11st capacitor C11, buzzer BZ1,
Second diode D2, third diode D3, the second comparator U3A and third comparator U3B and the 6th metal-oxide-semiconductor Q7；Described tenth
One end of three resistance restarts the input terminal and the output end phase of the pulse-detecting circuit of circuit as the delay switching-off automatically
Connection, one end of positive, described 11st capacitor of the other end of the thirteenth resistor and second diode, described the
The non-inverting input terminal of three comparators and the inverting input terminal of second comparator are connected, one end of the 7th resistance and institute
The non-inverting input terminal of one end and second comparator for stating the 15th resistance is connected, the other end of the 15th resistance with
One end of 18th resistance and the inverting input terminal of the third comparator are connected, the output end of second comparator
It is connected with the grid of one end of the 8th resistance, the output end of the third comparator and the 6th metal-oxide-semiconductor, the described 6th
The drain electrode of metal-oxide-semiconductor is connected with the cathode of the positive and described buzzer of third diode, the buzzer anode with it is described
One end of nine resistance is connected, the other end of the 9th resistance, the cathode of the third diode, the 8th resistance it is another
One end, one end of the 4th capacitor, the positive power source terminal of second comparator, the positive power source terminal of the third comparator, institute
State another termination power supply of the 7th resistance, the other end, the other end of the 18th resistance, institute of the 11st capacitor
State the negative power end of the second comparator, the negative power end of the third comparator, the source electrode of the 6th metal-oxide-semiconductor, the described 4th
The other end of capacitor is grounded, and the cathode of second diode connects hardware system load, the output end of second comparator or
The output end of the third comparator as the delay switching-off restarts the output end of circuit automatically and the power MOS pipe open/
The input terminal on powered-down road is connected.
Above-mentioned delay switching-off restarts the working principle of circuit automatically are as follows: the second comparator U3A and third comparator U3B is total
With a window comparator U3 circuit is combined into, the non-inverting input terminal of the second comparator U3A is VH, and third comparator U3B's is anti-
Phase input terminal is VL, the inverting input terminal of the second comparator U3A and the non-inverting input terminal of third comparator U3B connect together for
VO, the 7th resistance R7, the 15th resistance R15, the 18th resistance R18, which are concatenated after partial pressure, provides thresholding ginseng for window comparator U3
Level VH, VL are examined, the 8th resistance R8 is the output pull-up resistor of window comparator U3.When the OUT1 output of pulse-detecting circuit is
When high level, slowly charge through thirteenth resistor R13 to the 11st capacitor C11, VO level slowly rises.When VO < VL, third
Comparator U3B exports low level；As VO > VH, the second comparator U3A exports low level；Second comparator U3A or third compare
Device U3B output is low level, the 3rd MOS connecting with the output end of the output end of the second comparator U3A or third comparator U3B
Pipe Q4 and the 6th metal-oxide-semiconductor Q7 will be turned off, and only as VL < VO < VH, window comparator U3 output end ON/OFF is high level, and
High level lasting time is approximately equal to the time that VO voltage rises to VH value from VL value, exports high period in window comparator U3
Between, third metal-oxide-semiconductor Q4 and the 6th metal-oxide-semiconductor Q7 will be connected, by power MOS pipe ON/OFF circuit it is found that when third metal-oxide-semiconductor Q4 is connected,
The first metal-oxide-semiconductor of power will turn off, i.e. power MOS pipe ON/OFF circuit stops powering for the main control chip of hardware system, and turns off
Time be dependent on VO from VL level rise VH time.For example, turning off power MOS pipe ON/OFF circuit by several seconds
It being delayed and then restores again to the main control chip power supply of hardware system, it is ensured that the charge of circuit capacitance can be bled off completely,
It avoiding being switched on again when powering on, the time for the delay that is switched on will not have a surplus electricity because of circuit capacitance and cause delay time too short, into
And guarantee the effect that the main control chip to hardware system resets, the reliability of system is improved, realizes the reliability service of system.Together
When, it will be sounded an alarm by the buzzer that the 6th metal-oxide-semiconductor Q7 is controlled, for example buzzer BZ1 issues " ticking " long warning note that rings and shuts down.
After delay switching-off, VO > VH, window comparator U3 exports high level and terminates at this time, and ON/OFF is low level, third metal-oxide-semiconductor Q4
It is turned off with the 6th metal-oxide-semiconductor Q7, triode Q3 shutdown, power the first metal-oxide-semiconductor Q1 will be connected again, i.e., reset hardware system again, weight
Multiple above-mentioned function.
Above-mentioned delay switching-off restarts in circuit automatically, and the 11st capacitor C11 is off the capacitor of delay, with thirteenth resistor
R13 forms RC delay, if it is desired to the time of shutdown is extended or shortened, it can be by suitably adjusting the 11st capacitor C11
The shutdown delay time needed is obtained with thirteenth resistor R13, during power the first metal-oxide-semiconductor Q1 shutdown, passes through the two or two pole
Pipe D2 bleeds off the 11st capacitor C11 energy stored quickly through the load that hardware system is connect.
It is the Intelligent hardware watchdog circuit working timing figure of the utility model tape pulse detection, time referring to Fig. 3, Fig. 3
Unit is the second (s): where Td is delay time when hardware powers on；Within the time, no matter input pulse why state,
It is always low level that pulse-detecting circuit, which exports OUT1,；Corresponding pulse-detecting circuit when being high or low level that To is input signal
Output OUT1 is always the time of high level；Ts is the time for controlling the shutdown of power MOS pipe ON/OFF circuit；Toff is corresponding
+ 5V_OUT exports the turn-off time；It follows that pulse detection road, delay switching-off restart circuit automatically and do not act as during delay
With that is, no matter which kind of state input pulse is, power MOS pipe power ON/OFF circuit is all on state.When delay terminated
Afterwards, pulse-detecting circuit works, at this point, input signal, if it is high level or low level, pulse-detecting circuit exports low electricity
Flat, delay switching-off restarts circuit automatically and works, the positive pulse signal that window comparator output pulse width is 5 seconds, power first
The first metal-oxide-semiconductor of power is again automatic open-minded after metal-oxide-semiconductor turns off 5 seconds, 5 seconds.If input signal is pulse signal, pulse detection
Circuit identifies the input signal for normal working signal (this signal can be provided by single-chip microcontroller or hardware circuit), i.e. hardware system
System is in steady operational status.At this point, pulse-detecting circuit exports low level, delay switching-off restarts circuit automatically and does not work,
Power switch circuit is persistently opened.
To sum up, the utility model proposes a kind of Intelligent hardware watchdog circuits of tape pulse detection, including booting delay control
Circuit processed, pulse-detecting circuit, delay switching-off restart circuit and power MOS pipe ON/OFF circuit automatically, in booting, by opening
Machine delay control circuit controls the delay of pulse detection resistance and enters working condition, make no matter input signal which kind of state, power
Metal-oxide-semiconductor ON/OFF circuit is all on state, so that booting delayed detection function is provided, to guarantee hardware system
(chip of ARM kernel) has time enough to enter stable state after the power-up, after guaranteeing hardware system the operation is stable, then opens
Begin detection input signal, ensure that the reliability of Intelligent hardware watchdog circuit itself.Pass through pulse-detecting circuit real-time detection
The pulse signal that hardware system (single-chip microcontroller or other hardwired electronic circuits) issues, whether just using pulse signal as hardware system
The judgment basis often to work can determine whether to reset hardware system again, guarantee the reliability service of hardware system.Cause
This, the Intelligent hardware watchdog circuit of the utility model tape pulse detection can be adapted for all products for issuing pulse signal,
Applied widely, strong applicability, and can be with the various hardware systems of seamless interfacing, improvement cost is low.It is weighed automatically by delay switching-off
It plays circuit to be connected between pulse-detecting circuit and power MOS pipe ON/OFF circuit, realizes the pass of power MOS pipe ON/OFF circuit
Disconnected delay, alarm and reset function again, for example, make power MOS pipe ON/OFF circuit being delayed by shutdown in several seconds and then
Again restore, to guarantee that the charge of circuit capacitance can be bled off completely, to avoid being switched on again to the main control chip power supply of hardware system
When powering on, the time for the delay that is switched on will not have a surplus electric because of circuit capacitance and cause delay time too short, and then guarantee to hardware
The effect that the main control chip of system resets, improves the reliability of system, realizes the reliability service of system.It is opened using power MOS pipe
/ close the on-off that the main control chip of circuit control hardware system is powered, the even main control chip to the hardware system of higher power dissipation
Power supply, the power loss of power MOS pipe ON/OFF circuit itself is also very small, to ensure that the reliable of hardware watchdog itself
Property.Therefore, the utility model hardware system crash reset effect is thorough, and hardware cost is low, strong antijamming capability, can effectively solve
Various interference cause program fleet failure, improve the reliability of system entirety, be particularly suitable for it is various industry, communication, control,
The unattended operation environment in the fields such as power electronics.
Above embodiments are the preferred embodiment of the utility model to be described in detail, the skill of this field referring to attached drawing
Art personnel are by carrying out modification or change on various forms, but the feelings of the essence without departing substantially from the utility model to above-described embodiment
Under condition, all fall within the scope of the present invention.
Claims (5)
1. a kind of Intelligent hardware watchdog circuit of tape pulse detection, which is characterized in that including the delay control circuit, pulse of being switched on
Detection circuit, delay switching-off restart circuit and power MOS pipe ON/OFF circuit, the output of the booting delay control circuit automatically
End is connected with the control terminal of the pulse-detecting circuit, and the pulse of the input terminal and hardware system of the pulse-detecting circuit is believed
Number output end is connected, and the output end of the pulse-detecting circuit is connected with the input terminal that the delay switching-off restarts circuit automatically
It connects, the output end that the delay switching-off restarts circuit automatically is connected with the input terminal of the power MOS pipe ON/OFF circuit, institute
The output end for stating power MOS pipe ON/OFF circuit is connected with the feeder ear of hardware system, and the power MOS pipe ON/OFF circuit
Output end with it is described booting delay control circuit input terminal be connected.
2. the Intelligent hardware watchdog circuit of tape pulse detection according to claim 1, it is characterised in that: the booting is prolonged
When control circuit include second resistance (R2), 3rd resistor (R3), the 4th resistance (R4), the 6th resistance (R6), first capacitor
(C1), the second capacitor (C2), third capacitor (C3), the second metal-oxide-semiconductor (Q2), first comparator (U1), first diode (D1)；Institute
One end of second resistance is stated as the defeated of input terminal and the power MOS pipe ON/OFF circuit of the booting delay control circuit
Outlet is connected, and the other end of the second resistance and one end of second capacitor and the reverse phase of the first comparator are defeated
Enter end to be connected, one end of three resistance and one end of the 6th resistance and the non-inverting input terminal phase of the first comparator
Connection, the output end of the first comparator and one end of the 4th resistance, one end and described second of the third capacitor
The grid of metal-oxide-semiconductor is connected, the other end of second capacitor, the other end of the 6th resistance, the first comparator
Negative power end, the other end of the third capacitor, the source electrode of second metal-oxide-semiconductor and the first capacitor one end ground connection；Institute
State the other end and first electricity of the other end of 3rd resistor, the positive power source terminal of the first comparator, the 4th resistance
Another termination power supply held, the first diode is in parallel with the second resistance, the drain electrode conduct of second metal-oxide-semiconductor
The output end of the booting delay control circuit is connected with the control terminal of the pulse-detecting circuit.
3. the Intelligent hardware watchdog circuit of tape pulse detection according to claim 2, it is characterised in that: the power
Metal-oxide-semiconductor ON/OFF circuit includes first resistor (R1), the 5th resistance (R5), triode (Q3), the first metal-oxide-semiconductor (Q1) and the 3rd MOS
It manages (Q4), first metal-oxide-semiconductor is P-channel power MOS pipe, the drain electrode of first metal-oxide-semiconductor opens as the power MOS pipe/
The output end on powered-down road is connected with the input terminal of the feeder ear of hardware system and the booting delay control circuit, and described first
The grid of metal-oxide-semiconductor is connected with one end of the collector of the triode and the first resistor, the source electrode of first metal-oxide-semiconductor
Be connected with the other end of the first resistor, one end of the 5th resistance and power supply, the 5th resistance it is another
End is connected with the base stage of the drain electrode of the third metal-oxide-semiconductor and the triode, the source electrode of the third metal-oxide-semiconductor and three pole
The emitter of pipe is grounded, and the grid of the third metal-oxide-semiconductor prolongs as the input terminal of the power MOS pipe ON/OFF circuit with described
The output end that Shi Guanji restarts circuit automatically is connected.
4. the Intelligent hardware watchdog circuit of tape pulse detection according to claim 3, it is characterised in that: the pulse inspection
Slowdown monitoring circuit includes the tenth resistance (R10), eleventh resistor (R11), twelfth resistor (R12), the 14th resistance (R14), the tenth
Six resistance (R16), the 17th resistance (R17), the 5th capacitor (C5), the 6th capacitor (C6), the 7th capacitor (C7), the 8th capacitor
(C8), the 9th capacitor (C9), the tenth capacitor (C10), monostable flipflop (U2), the 4th metal-oxide-semiconductor (Q5), the 5th metal-oxide-semiconductor (Q6)；
One end of 17th resistance is as the input terminal of the pulse-detecting circuit and the pulse signal output end phase of hardware system
Connection, and the 17th resistance end is connected with one end of the 6th capacitor, the other end of the 6th capacitor and institute
The one end for stating the 16th resistance is connected, and the other end of the 16th resistance is connected with the grid of the 5th metal-oxide-semiconductor, institute
State drain electrode and one end of the twelfth resistor, one end of the 8th capacitor and the monostable flipflop of the 5th metal-oxide-semiconductor
External low level signal triggering end be connected, and the monostable flipflop external low level signal triggering end be used as described in
The control terminal of pulse-detecting circuit with it is described booting delay control circuit output end be connected, the monostable flipflop it is defeated
Outlet is connected with one end of the 14th resistance, and the other end of the 14th resistance is connected with the grid of the 4th metal-oxide-semiconductor
It connects, one end, one end of the tenth resistance, the monostable flipflop of the source electrode of the 4th metal-oxide-semiconductor, the 7th capacitor
Ground terminal, one end of the 9th capacitor, the other end of the 8th capacitor, the source electrode of the 5th metal-oxide-semiconductor, the described tenth
One end of the other end of seven resistance and the 5th capacitor ground connection, the other end of the twelfth resistor, the tenth resistance
One end, the power end of the monostable flipflop and the RESET input, the other end of the 5th capacitor, the eleventh resistor
A termination power supply, the high level triggering end and electric discharge of the other end of the tenth resistance and the monostable flipflop
It holds, the other end of the 9th capacitor is connected, the voltage control of the other end and the monostable flipflop of the tenth capacitor
End processed is connected, and the other end of the eleventh resistor is connected with the other end of the drain electrode of the 4th metal-oxide-semiconductor and the 7th capacitor
It connects, and the other end of the 7th capacitor restarts circuit as the output end of the pulse-detecting circuit and the delay switching-off automatically
Input terminal is connected.
5. the Intelligent hardware watchdog circuit of tape pulse detection according to claim 4, it is characterised in that: the delay is closed
It includes the 7th resistance (R7), the 8th resistance (R8), the 9th resistance (R9), thirteenth resistor (R13), the tenth that machine restarts circuit automatically
Five resistance (R15), the 18th resistance (R18), the 4th capacitor (C4), the 11st capacitor (C11), buzzer (BZ1), the two or two pole
Manage (D2), third diode (D3), the second comparator (U3A), third comparator (U3B) and the 6th metal-oxide-semiconductor (Q7)；Described tenth
One end of three resistance restarts the input terminal and the output end phase of the pulse-detecting circuit of circuit as the delay switching-off automatically
Connection, one end of positive, described 11st capacitor of the other end of the thirteenth resistor and second diode, described the
The non-inverting input terminal of three comparators and the inverting input terminal of second comparator are connected, one end of the 7th resistance and institute
The non-inverting input terminal of one end and second comparator for stating the 15th resistance is connected, the other end of the 15th resistance with
One end of 18th resistance and the inverting input terminal of the third comparator are connected, the output end of second comparator
It is connected with the grid of one end of the 8th resistance, the output end of the third comparator and the 6th metal-oxide-semiconductor, the described 6th
The drain electrode of metal-oxide-semiconductor is connected with the cathode of the positive and described buzzer of third diode, the buzzer anode with it is described
One end of nine resistance is connected, the other end of the 9th resistance, the cathode of the third diode, the 8th resistance it is another
One end, one end of the 4th capacitor, the positive power source terminal of second comparator, the positive power source terminal of the third comparator, institute
State another termination power supply of the 7th resistance, the other end, the other end of the 18th resistance, institute of the 11st capacitor
State the negative power end of the second comparator, the negative power end of the third comparator, the source electrode of the 6th metal-oxide-semiconductor, the described 4th
The other end of capacitor is grounded, and the cathode of second diode connects hardware system load, the output end of second comparator or
The output end of the third comparator as the delay switching-off restarts the output end of circuit automatically and the power MOS pipe open/
The input terminal on powered-down road is connected.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201821146008.9U CN208589014U (en) | 2018-07-19 | 2018-07-19 | The Intelligent hardware watchdog circuit of tape pulse detection |
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|---|---|---|---|
| CN201821146008.9U CN208589014U (en) | 2018-07-19 | 2018-07-19 | The Intelligent hardware watchdog circuit of tape pulse detection |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114866078A (en) * | 2022-07-08 | 2022-08-05 | 深之蓝(天津)水下智能科技有限公司 | Reset switch power on-off control circuit and system |
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2018
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114866078A (en) * | 2022-07-08 | 2022-08-05 | 深之蓝(天津)水下智能科技有限公司 | Reset switch power on-off control circuit and system |
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