CN208539887U - A kind of AMI/HDB3 coding and decoding circuit - Google Patents
A kind of AMI/HDB3 coding and decoding circuit Download PDFInfo
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- CN208539887U CN208539887U CN201821200811.6U CN201821200811U CN208539887U CN 208539887 U CN208539887 U CN 208539887U CN 201821200811 U CN201821200811 U CN 201821200811U CN 208539887 U CN208539887 U CN 208539887U
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Abstract
The utility model is suitable for AMI/HDB3 coding and decoding field, provide a kind of AMI/HDB3 coding and decoding circuit, the AMI/HDB3 coding and decoding circuit includes AMI/HDB3 codec module, and the coding output waveform module of the connection AMI/HDB3 codec module, and it is electrically connected the power supply of the AMI/HDB3 codec module and the coding output waveform module；It solves to realize the technical problem that the circuit of the coding and decoding of AMI code and HDB3 code is excessively complicated.
Description
Technical field
The utility model belongs to AMI/HDB3 coding and decoding field more particularly to a kind of AMI/HDB3 coding and decoding circuit.
Background technique
NRZ(Non-Return-to-Zero unipolarity non-return-to-zero) code generally respectively indicates " 1 " with high level and zero level
" 0 ", and level is constant during entire symbol.Because it contains more DC component and without error correction and detection ability, unsuitable letter
Road transmission, it is necessary to carry out code conversion to it with adaptive channel transmission characteristic.
AMI(Alternative Mark Inverse alternate mark inversion) code is adjacent in unipolar pulse sequence
" 1 " code become the positive and negative pulse of+1, -1 alternating polarity, and a kind of transmission pattern that " 0 " code remains unchanged.Although AMI code function
In rate spectrum without DC component and can mistake self-test, but connect " 0 " code it is too long when cause timing extraction difficult.
HDB3 (tri- rank high density bipolar of High Density Bipolar) code is improved one on the basis of AMI code
Kind bipolarity zero code, overcomes the problem that the number of AMI code company 0 excessively causes timing extraction difficulty, and spectrum energy is mainly concentrated
It is that the number for PCM basic group, quadratic gropup and the tertiary group that G.703 CCITT recommends passes in fundamental frequency hereinafter, band occupancy is relatively narrow
Defeated interface pattern.
Currently, AMI/HDB3 coding and decoding is mainly by special integrated chip and corresponding peripheral middle small scale integrated circuit Lai real
It is existing.AMI/HDB3 belongs to bipolar signal, but NRZ signal be two-way duty ratio is 50% by what is obtained after coding and decoding
Unipolar signal needs that AMI/HDB3 code can be obtained by unipolarity-bipolarity transformation.
In practical projects through realizing mono-/bis-reversal frequently with transformer coupled mode, although the method can mention
High RST transmittability, but circuit is complicated, Extraction of Bit Synchronization Signal is difficult, is unfavorable for the observation of experimental phenomena and to AMI/
The understanding of HDB3 code and decoding principle.
Summary of the invention
The purpose of this utility model is to provide a kind of AMI/HDB3 coding and decoding circuits, it is intended to solve realize AMI code and
The excessively complicated technical problem of the circuit of the coding and decoding of HDB3 code.
The utility model is realized in this way a kind of AMI/HDB3 coding and decoding circuit, the AMI/HDB3 coding and decoding circuit
Including AMI/HDB3 codec module, and the coding output waveform module of the connection AMI/HDB3 codec module, and electrically
Connect the power supply of the AMI/HDB3 codec module and the coding output waveform module；
The AMI/HDB3 codec module: for the baseband signal of input to be compiled code；
The coding output waveform module: for the waveform after exports coding；
The power supply: for providing required voltage for modules.
The further technical solution of the utility model is: the AMI/HDB3 codec module includes coding and decoding chip U1, m
Sequence inputting interface J1, full 0 code input interface J2, all-ones input interface J3, toggle switch S2, coded pattern switch S1, paraphase
Amplifier U3A, decoding output interface J5, interface clock signal J4, resistance R1, capacitor C1 and light emitting diode D1, the compiling
1 stitch of code chip U1 is separately connected 4 stitch, 5 stitch and 6 stitch of the toggle switch S2,1 needle of the toggle switch S2
Foot connects the m-sequence input interface J1, and 2 stitch of the toggle switch S2 connect the full 0 code input interface J2, and described group
3 stitch of code switch S2 connect the all-ones input interface J3, and 2 stitch of the coding and decoding chip U1 connect the paraphase and put
The output end of big device U3A, 3 stitch of the coding and decoding chip U1 connect the movable end of the coded pattern switch S1, the volume
9 stitch of coding chip U1 connect one end of the resistance R1, and the other end of the resistance R1 connects the light emitting diode D1
Anode, 11 stitch of the coding and decoding chip U1 connect 14 stitch of the coding and decoding chip U1, the coding and decoding chip U1
13 stitch connect 15 stitch of the coding and decoding chip U1,16 stitch of the coding and decoding chip U1 connect the capacitor C1's
4 stitch of one end, the coding and decoding chip U1 connect the decoding output interface J5, and the interface clock signal J4 is separately connected
One end of 5 stitch of the input terminal of the inverting amplifier U3A and the coding and decoding chip U1, the coded pattern switch S1 is solid
6 stitch of fixed end and the coding and decoding chip U1 are all connected with the anode of the power supply, the other end of the coded pattern switch S1
Fixing end, 8 stitch of the coding and decoding chip U1,12 stitch, the cathode of the light emitting diode D1 and the capacitor C1 it is another
One end is all connected with GND.
The further technical solution of the utility model is: the coding output waveform module includes digital control analog switch
U2 and coding output waveform interface J6,9 stitch of the digital control analog switch U2 connect the 14 of the coding and decoding chip U1
Stitch, 10 stitch of the digital control analog switch U2 connect 15 stitch of the coding and decoding chip U1, described digital control
5 stitch of analog switch U2 are separately connected 14 stitch of the digital control analog switch U2, one end of the capacitor C1 and institute
The anode of power supply is stated, 7 stitch, 2 stitch, 15 stitch of the digital control analog switch U2 are all connected with the cathode of the power supply,
13 stitch of the digital control analog switch U2 connect the coding output waveform interface J6, the digital control analog switch
6 stitch, 1 stitch, 12 stitch of U2 are all connected with GND.
It is converted the beneficial effects of the utility model are: realizing mono- bipolarity using digital control analog switch, circuit knot
Structure is greatly simplified, and experimental phenomena observation is obvious, is highly convenient for understanding code and decoding principle, when making coding using a NOT gate
Clock failing edge is effective, and it is effective to decode rising edge clock, realizes coding and decoding bit synchronization process, it is ensured that coding and decoding it is accurate
Property.
Detailed description of the invention
Fig. 1 is a kind of structural block diagram of AMI/HDB3 coding and decoding circuit provided by the embodiment of the utility model；
Fig. 2 is a kind of electrical schematic diagram of AMI/HDB3 coding and decoding circuit provided by the embodiment of the utility model.
Specific embodiment
Fig. 1-2 shows a kind of AMI/HDB3 coding and decoding circuit provided by the utility model, the AMI/HDB3 coding and decoding
Circuit includes AMI/HDB3 codec module, and the coding output waveform module of the connection AMI/HDB3 codec module, and
It is electrically connected the power supply of the AMI/HDB3 codec module and the coding output waveform module；
The AMI/HDB3 codec module: for the baseband signal of input to be compiled code；
The coding output waveform module: for the waveform after exports coding；
The power supply: for providing required voltage for modules.
The AMI/HDB3 codec module includes coding and decoding chip U1, m-sequence input interface J1, full 0 code input interface
J2, all-ones input interface J3, toggle switch S2, coded pattern switch S1, inverting amplifier U3A, decoding output interface J5, when
Clock signaling interface J4, resistance R1, capacitor C1 and light emitting diode D1,1 stitch of the coding and decoding chip U1 are separately connected described
1 stitch of 4 stitch, 5 stitch and 6 stitch of toggle switch S2, the toggle switch S2 connects the m-sequence input interface J1,
2 stitch of the toggle switch S2 connect the full 0 code input interface J2, the 3 stitch connection described complete 1 of the toggle switch S2
2 stitch of code input interface J3, the coding and decoding chip U1 connect the output end of the inverting amplifier U3A, the coding and decoding
3 stitch of chip U1 connect the movable end of the coded pattern switch S1, and 9 stitch of the coding and decoding chip U1 connect the electricity
One end of R1 is hindered, the other end of the resistance R1 connects the anode of the light emitting diode D1, and the 11 of the coding and decoding chip U1
Stitch connects 14 stitch of the coding and decoding chip U1, and 13 stitch of the coding and decoding chip U1 connect the coding and decoding chip U1
15 stitch, 16 stitch of the coding and decoding chip U1 connect one end of the capacitor C1,4 stitch of the coding and decoding chip U1
Connect the decoding output interface J5, the interface clock signal J4 be separately connected the inverting amplifier U3A input terminal and
5 stitch of the coding and decoding chip U1,6 needles of one end fixing end of the coded pattern switch S1 and the coding and decoding chip U1
Foot is all connected with the anode of the power supply, 8 needles of the other end fixing end of the coded pattern switch S1, the coding and decoding chip U1
Foot, 12 stitch, the cathode of the light emitting diode D1 and the capacitor C1 the other end be all connected with GND.Firstly, according to coding code
Coded pattern (being HDB3 when high level, be AMI when low level), baseband signal (m-sequence, the full 0 of input is arranged in type switch S1
Code, all-ones), under by inverting amplifier U3A generation and the reversed clock effect of m-sequence, 15 stitch of warp knit coding chip U1
With 14 stitch output+HDB3 OUT and the parallel unipolar signal of-HDB3 OUT two-way respectively, by the encoder of coding and decoding chip U1
Negative code output end (- HDB3 OUT) is connected with the negative code input terminal of the decoder of coding and decoding chip U1 (- HDB3 IN), coding and decoding core
Decoder code input terminal (+HDB3 IN) phase of the encoder code output end (+HDB3 OUT) of piece U1 and coding and decoding chip U1
Even, i.e., directly 11 stitch of coding and decoding chip U1 being connected with 14 stitch, 13 stitch of coding and decoding chip U1 are connected with 15 stitch,
To realize coding output undistorted feeding decoder after ideal communication channel.It can be decoded under synchronised clock effect in this way
NRZ signal, and the 4 foot NRZ_OUT of coding and decoding chip U1 export, complete decoding output.
The coding output waveform module includes digital control analog switch U2 and coding output waveform interface J6, the number
9 stitch of word control analog switch U2 connect 14 stitch of the coding and decoding chip U1, the digital control analog switch U2's
10 stitch connect 15 stitch of the coding and decoding chip U1, and 5 stitch of the digital control analog switch U2 are separately connected described
The anode of 14 stitch of digital control analog switch U2, one end of the capacitor C1 and the power supply, the digital control simulation
7 stitch, 2 stitch, 15 stitch of switch U2 are all connected with the cathode of the power supply, 13 stitch of the digital control analog switch U2
The coding output waveform interface J6 is connected, 6 stitch, 1 stitch, 12 stitch of the digital control analog switch U2 are all connected with
GND.Two-way unipolar signal is sent into input address code A and B control terminal (the digital control simulation of digital control analog switch U2
9,10 stitch of switch U2), as signal gating+5V and -5V in turn is controlled, mono- bipolarity transformation is completed, is finally controlled in number
Waveform after the end X (13 stitch) exports coding of analog switch U2 processed.
It realizes mono- bipolarity using digital control analog switch to convert, circuit structure is greatly simplified, experimental phenomena
Observation is obvious, is highly convenient for understanding code and decoding principle, makes encoded clock failing edge effective using a NOT gate, and decodes clock
Rising edge is effective, realizes coding and decoding bit synchronization process, it is ensured that the accuracy of coding and decoding.
The above is only the preferred embodiment of the utility model only, is not intended to limit the utility model, all at this
Made any modifications, equivalent replacements, and improvements etc., should be included in the utility model within the spirit and principle of utility model
Protection scope within.
Claims (3)
1. a kind of AMI/HDB3 coding and decoding circuit, it is characterised in that: the AMI/HDB3 coding and decoding circuit includes that AMI/HDB3 is compiled
Decoding module, and the coding output waveform module of the connection AMI/HDB3 codec module, and it is electrically connected the AMI/
The power supply of HDB3 codec module and the coding output waveform module；
The AMI/HDB3 codec module: for the baseband signal of input to be compiled code；
The coding output waveform module: for the waveform after exports coding；
The power supply: for providing required voltage for modules.
2. AMI/HDB3 coding and decoding circuit according to claim 1, which is characterized in that the AMI/HDB3 codec module
Including coding and decoding chip U1, m-sequence input interface J1, full 0 code input interface J2, all-ones input interface J3, toggle switch S2,
Coded pattern switch S1, inverting amplifier U3A, decoding output interface J5, interface clock signal J4, resistance R1, capacitor C1 and hair
1 stitch of optical diode D1, the coding and decoding chip U1 are separately connected 4 stitch, 5 stitch and 6 stitch of the toggle switch S2,
1 stitch of the toggle switch S2 connects the m-sequence input interface J1, and 2 stitch of the toggle switch S2 connect the full 0
3 stitch of code input interface J2, the toggle switch S2 connect the all-ones input interface J3, and the 2 of the coding and decoding chip U1
Stitch connects the output end of the inverting amplifier U3A, and 3 stitch of the coding and decoding chip U1 connect the coded pattern switch
The movable end of S1,9 stitch of the coding and decoding chip U1 connect one end of the resistance R1, the other end connection of the resistance R1
The anode of the light emitting diode D1,11 stitch of the coding and decoding chip U1 connect 14 stitch of the coding and decoding chip U1,
13 stitch of the coding and decoding chip U1 connect 15 stitch of the coding and decoding chip U1,16 stitch of the coding and decoding chip U1
One end of the capacitor C1 is connected, 4 stitch of the coding and decoding chip U1 connect the decoding output interface J5, the clock letter
Number interface J4 is separately connected the input terminal of the inverting amplifier U3A and 5 stitch of the coding and decoding chip U1, the coding code
6 stitch of one end fixing end of type switch S1 and the coding and decoding chip U1 are all connected with the anode of the power supply, the coding code
The other end fixing end of type switch S1,8 stitch of the coding and decoding chip U1,12 stitch, the light emitting diode D1 cathode
And the other end of the capacitor C1 is all connected with GND.
3. AMI/HDB3 coding and decoding circuit according to claim 2, which is characterized in that the coding output waveform module packet
9 stitch for including digital control analog switch U2 and coding output waveform interface J6, the digital control analog switch U2 connect institute
14 stitch of coding and decoding chip U1 are stated, 10 stitch of the digital control analog switch U2 connect the 15 of the coding and decoding chip U1
Stitch, 5 stitch of the digital control analog switch U2 are separately connected 14 stitch, described of the digital control analog switch U2
The anode of one end of capacitor C1 and the power supply, 7 stitch, 2 stitch, 15 stitch of the digital control analog switch U2 are all connected with
The cathode of the power supply, 13 stitch of the digital control analog switch U2 connect the coding output waveform interface J6, described
6 stitch, 1 stitch, 12 stitch of digital control analog switch U2 are all connected with GND.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201821200811.6U CN208539887U (en) | 2018-07-26 | 2018-07-26 | A kind of AMI/HDB3 coding and decoding circuit |
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| CN201821200811.6U CN208539887U (en) | 2018-07-26 | 2018-07-26 | A kind of AMI/HDB3 coding and decoding circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110380736A (en) * | 2019-06-13 | 2019-10-25 | 华南师范大学 | A kind of new HDB3 code encoding method, device, equipment and storage medium |
| CN111277327A (en) * | 2020-01-21 | 2020-06-12 | 国网四川省电力公司 | Line protection communication channel fault area identification method |
| CN111756382A (en) * | 2020-07-10 | 2020-10-09 | 成都工业学院 | C54 x-based RLHDB3 decoding method, device and storage medium |
-
2018
- 2018-07-26 CN CN201821200811.6U patent/CN208539887U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110380736A (en) * | 2019-06-13 | 2019-10-25 | 华南师范大学 | A kind of new HDB3 code encoding method, device, equipment and storage medium |
| CN110380736B (en) * | 2019-06-13 | 2023-04-21 | 华南师范大学 | Novel HDB 3code encoding method, device, equipment and storage medium |
| CN111277327A (en) * | 2020-01-21 | 2020-06-12 | 国网四川省电力公司 | Line protection communication channel fault area identification method |
| CN111756382A (en) * | 2020-07-10 | 2020-10-09 | 成都工业学院 | C54 x-based RLHDB3 decoding method, device and storage medium |
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