CN208433954U - A kind of digital analog converter - Google Patents
A kind of digital analog converter Download PDFInfo
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- CN208433954U CN208433954U CN201821262548.3U CN201821262548U CN208433954U CN 208433954 U CN208433954 U CN 208433954U CN 201821262548 U CN201821262548 U CN 201821262548U CN 208433954 U CN208433954 U CN 208433954U
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Abstract
The utility model discloses a kind of digital analog converters, including first switch, second switch, the first current source and the second current source；One end of first switch is connect with voltage input end, and the other end is connect with the first end of the first current source；The second end of first current source connects the first end of the second current source, and the second end of the second current source and one end of second switch connect, the other end grounding connection of second switch；The switch state of first switch and the switch state of second switch are controlled by PWM input signal, and PWM input signal is used for first switch in the closure state, and second switch is in an off state；When PWM input signal is also used to for first switch being in an off state, second switch is in closed state.The digital analog converter can directly improve its equivalent output impedance using the form of current source, to improve the power supply rejection ratio of itself, and then improve the power supply rejection ratio of digital power amplifier system.
Description
Technical field
The utility model relates to semiconductor integrated circuit technology fields, more specifically to a kind of digital-to-analogue conversion
Device.
Background technique
Digital power amplifier has many advantages, such as that the small, low noise of distortion, dynamic range be big and strong antijamming capability, in the transparent of sound quality
Advantage in terms of degree, parsing power, quiet and low frequency the shock dynamics of background substantially exceeds traditional analog amplifier and class
D power amplifier.
With DVD home theater, mini audio system, set-top box, PC, LCD TV, flat-panel monitor and movement
The new source of sound specification of some high sample frequencys of the update of the consumer products such as phone, especially SACD, DVD Audio etc. goes out
Existing and sound system all accelerates the development of digital power amplifier from stereo to the evolution of multichannel surrounding system.
It is existing a kind of new noun " pure digi-tal power amplifier " occur for HIFI enthusiast in digital power amplifier field,
It supports many digital audio-format signals to input, such as 12S and TDM, can be handled by number DSP, realize sound abundant
Imitate algorithm, there is very strong RF anti-interference ability, on mobile phone, there is natural advantage, digital signal in transmission process not
The problems such as phase delay, phase distortion and intermodulation distortion can be brought, the benefit of sense of hearing be exactly sound can be more fully apparent from, position it is more quasi- with
And sound is closer to really.
In some application systems, power supply is often less clean, has the power supply ripple of different frequency, if audio frequency power amplifier chip
Power supply rejection ratio (PSRR) be made imperfect words, the audio-frequency noise on power supply will be transmitted to loudspeaker by audio frequency power amplifier chip
On, cause irritated audio-frequency noise, influence voice or music sense of hearing.
Utility model content
To solve the above problems, the utility model provides a kind of digital analog converter digital analog converter raising
Power supply rejection ratio, solves problems of the prior art.
To achieve the above object, the utility model provides the following technical solutions:
A kind of digital analog converter is applied in digital power amplifier system, and the digital analog converter includes: first to open
Pass, second switch, the first current source and the second current source；
Wherein, one end of the first switch is connect with voltage input end, the other end of the first switch and described the
The first end of one current source connects；
The second end of first current source connects the first end of second current source, first current source and described
Signal output end of the connecting node of second current source as the digital analog converter；
The second end of second current source is connect with one end of the second switch, another termination of the second switch
Ground connection；
The switch state of the switch state of the first switch and the second switch is controlled by PWM input signal, described
PWM input signal is used for the first switch in the closure state, and the second switch is in an off state；The PWM
When input signal is also used to for the first switch being in an off state, the second switch is in closed state.
Preferably, in above-mentioned digital analog converter, first current source is the first field-effect tube and second effect
Ying Guan；
Second current source is third field-effect tube and the 4th field-effect tube；
Wherein, the source electrode of first field-effect tube is connect with the other end of the first switch, first field-effect
The drain electrode of pipe is connect with the source electrode of second field-effect tube, and the grid of first field-effect tube is for receiving the first biased electrical
Pressure；
The drain electrode of second field-effect tube is connect with the drain electrode of the third field-effect tube, second field-effect tube
Grid is for receiving the second bias voltage；
The source electrode of the third field-effect tube is connect with the drain electrode of the 4th field-effect tube, the third field-effect tube
Grid is for receiving third bias voltage；
The 4th field-effect tube source electrode is connect with one end of the second switch, and the grid of the 4th field-effect tube is used
In the 4th bias voltage of reception；
The connecting node of the drain electrode of the drain electrode and third field-effect tube of second field-effect tube is as the number
The signal output end of analog converter.
Preferably, in above-mentioned digital analog converter, first field-effect tube and second field-effect tube are p-type
Field-effect tube；
The third field-effect tube and the 4th field-effect tube are N-type field-effect tube.
Preferably, in above-mentioned digital analog converter, first bias voltage is generated by the first current generating circuit,
For providing grid voltage for first field-effect tube；
Second bias voltage is generated by the second current generating circuit, for providing grid for second field-effect tube
Voltage；
The third bias voltage is generated by third current generating circuit, for providing grid for the third field-effect tube
Voltage；
4th bias voltage is generated by the 4th current generating circuit, for providing grid for the 4th field-effect tube
Voltage.
Preferably, in above-mentioned digital analog converter, the first switch and the second switch are field-effect tube.
Preferably, in above-mentioned digital analog converter, the first switch is p-type field-effect tube, the second switch
For N-type field-effect tube.
Preferably, in above-mentioned digital analog converter, the first switch is N-type field-effect tube, the second switch
For p-type field-effect tube.
As can be seen from the above description, a kind of digital analog converter provided by the utility model is applied to digital power amplifier system
In system, the digital analog converter includes: first switch, second switch, the first current source and the second current source；Wherein, institute
The one end for stating first switch is connect with voltage input end, the first end of the other end of the first switch and first current source
Connection；The second end of first current source connects the first end of second current source, first current source and described
Signal output end of the connecting node of two current sources as the digital analog converter；The second end of second current source with
One end of the second switch connects, the other end grounding connection of the second switch；The switch state of the first switch and
The switch state of the second switch is controlled by PWM input signal, and the PWM input signal is for the first switch to be in
When closed state, the second switch is in an off state；The PWM input signal is also used to the first switch being in disconnected
When open state, the second switch is in closed state.
The digital analog converter is compared in the prior art using the form of current source and the connection type of current source
Digital analog converter can directly improve power supply rejection ratio.
Detailed description of the invention
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, the accompanying drawings in the following description is only
It is the embodiments of the present invention, for those of ordinary skill in the art, without creative efforts, also
Other attached drawings can be obtained according to the attached drawing of offer.
Fig. 1 is that a kind of digital power amplifier system application scenarios of digital analog converter provided by the embodiment of the utility model show
It is intended to；
Fig. 2 is a kind of structural schematic diagram of the digital power amplifier subsystem in the channel VOP provided by the embodiment of the utility model；
Fig. 3 is a kind of structural schematic diagram of digital analog converter provided by the embodiment of the utility model；
Fig. 4 is the structural schematic diagram of another digital analog converter provided by the embodiment of the utility model.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without making creative work
Every other embodiment obtained, fall within the protection scope of the utility model.
To keep the above objects, features, and advantages of the utility model more obvious and easy to understand, with reference to the accompanying drawing and have
Body embodiment is described in further detail the utility model.
With reference to Fig. 1, Fig. 1 is that a kind of digital power amplifier system of digital analog converter provided by the embodiment of the utility model is answered
With schematic diagram of a scenario, by digital module, treated that pwm signal is converted into analog signal for effect, including VOP and VON two
A channel is illustrated by taking the digital power amplifier subsystem in the channel VOP as an example below.
With reference to Fig. 2, Fig. 2 is a kind of structure of the digital power amplifier subsystem in the channel VOP provided by the embodiment of the utility model
Schematic diagram, the digital power amplifier subsystem in the channel VOP include: digital analog converter DAC, operational amplifier AMP, integrator
21, PWM comparator 22, driver 23, first resistor RF, capacitor C1 and common mode voltage signal generation module 24.
Wherein, the signal output end DAC_VOP of the digital analog converter DAC and operational amplifier AMP's is anti-
The connection of phase input terminal, the output of the non-inverting input terminal of the operational amplifier AMP and the common mode voltage signal generation module 24
VCM connection is held, the output terminals A MP_VP1 of the operational amplifier AMP is connect with the input terminal of the integrator 21.
The output end of the integrator 21 is connect with the input terminal of the PWM comparator 22, the PWM comparator 22 it is defeated
Outlet PWM_P2 is connect with the input terminal of the driver 23, and the output end of the driver is as the digital power amplifier subsystem
Signal output end VOP.
One end of the first resistor RF is connect with the inverting input terminal of the operational amplifier AMP, the first resistor
The other end of RF is connect with the output end of the driver.
One end of the capacitor C1 is connect with the inverting input terminal of the operational amplifier AMP, and the capacitor C1's is another
End is connect with the output terminals A MP_VP1 of the operational amplifier AMP.
Wherein, the common mode voltage signal generation module 24 includes: second resistance R1 and 3rd resistor R2.
Wherein, one end of the second resistance R1 is connect with voltage input end VDD, the other end of the second resistance R1 with
One end of the 3rd resistor R2 connects.
The other end of the 3rd resistor R1 is grounded GND connection.
The connecting node of the second resistance R1 and the 3rd resistor R2 are as the common-mode voltage generation module 24
Output end VCM.
Wherein, the signal output end VOP of the digital power amplifier subsystem passes through first resistor RF, amplifier AMP, integrator
21, PWM comparator 22 and driver 23 form feedback loop.
Similarly, the digital power amplifier subsystem in the channel VON and the digital power amplifier subsystem in the channel VOP are identical, no longer explain herein
It states.
For digital power amplifier subsystem based on the above-mentioned channel VOP, the power supply of the digital power amplifier subsystem in the channel VOP is influenced
Inhibiting the key factor than PSRR includes: the power supply rejection ratio of common mode voltage signal generation module 24, digital analog converter DAC
Power supply rejection ratio, the power supply rejection ratio of AMP amplifier and digital power amplifier subsystem feedback loop gain.
Under regular situation, the power supply rejection ratio itself of AMP amplifier is very high, and the feedback loop of digital power amplifier subsystem
Gain is larger, is often inhibited well to power supply noise, therefore, influences the power supply rejection ratio PSRR's of digital power amplifier subsystem
Key factor is mainly that the power supply rejection ratio of common mode voltage signal generation module 24 and the power supply of digital analog converter DAC inhibit
Than.
Based on this, derived in conjunction with power supply rejection ratio PSRR of the Fig. 1 to digital power amplification system, specific as follows:
Firstly, the voltage signal VCM that common mode voltage signal generation module 24 exports is received based on digital analog converter DAC
Voltage signal VDD gain are as follows:
So, the output pulsation of the digital power amplifier subsystem in the channel VOP are as follows:
Δ VOP=Δ VDD* α * (1+RFP/r0P_dac)
Similarly, the output pulsation of the digital power amplifier subsystem in the channel VON are as follows:
Δ VON=Δ VDD* α * (1+RFN/r0N_dac)
Wherein, r0P_dac indicates that the equivalent output impedance of the digital analog converter DAC in the channel VOP, r0N_dac indicate
The equivalent output impedance of the digital analog converter DAC in the channel VON, RFP indicate that the RF resistance in the channel VOP, RFN indicate that VON is logical
The RF resistance in road, Δ VDD indicate the fluctuation of the received voltage signal VDD of digital analog converter DAC.
It follows that the output pulsation of digital power amplifier system are as follows:
Δ Vout=Δ VOP- Δ VON
That is, the output pulsation of digital power amplifier system are as follows:
Since there are mismatch, mismatching δ for the current source of digital analog converter DAC in the channel VOP and the channel VON1It is full
Sufficient the following conditions:
R0P_dac=(1+ δ1)*r0N_dac
Since there is also mismatch, mismatching δ for the RF resistance in the channel VOP and the channel VON2Meet the following conditions:
RFP=(1+ δ2)*RFN
It follows that the output pulsation of digital power amplifier system are as follows:
It may finally obtain, the power supply rejection ratio PSRR of digital power amplifier system are as follows:
Wherein, RF indicates the resistance value of the RF resistance in the channel VOP or the channel VON, and r0_dac indicates the channel VOP or the channel VON
Digital analog converter DAC equivalent output impedance.
By the formula of the power supply rejection ratio of above-mentioned digital power amplifier system it is found that due to digital analog converter DAC etc.
Output impedance r0_dac is imitated on the denominator of the formula, it follows that influence the power supply rejection ratio PSRR of digital power amplifier system
Main factor is the equivalent output impedance r0_dac of digital analog converter DAC.
Based on this, with reference to Fig. 3, Fig. 3 is that a kind of structure of digital analog converter provided by the embodiment of the utility model is shown
It is intended to, the digital analog converter DAC includes: first switch S1, second switch S2, the electricity of the first current source IDAC1 and second
Stream source IDAC2.
Wherein, one end of the first switch S1 is connect with voltage input end VDD, the other end of the first switch S1 with
The first end of the first current source IDAC1 connects.
The second end of the first current source IDAC1 connects the first end of the second current source IDAC2, first electricity
Signal output end of the connecting node of stream source IDAC1 and the second current source IDAC2 as the digital analog converter DAC
DAC_VOP。
The second end of the second current source IDAC2 is connect with one end of the second switch S2, the second switch S2
The other end be grounded GND connection.
The switch state of the switch state of the first switch S1 and the second switch S2 are controlled by PWM input signal,
The PWM input signal is used for the first switch S1 in the closure state, and the second switch S2 is in an off state；
When the PWM input signal is also used to for the first switch S1 being in an off state, the second switch S2 is in closed form
State.
Since Fig. 3 is illustrated by taking the channel VOP as an example, so PWM input signal is expressed as PWM_P input signal.
That is, the opposite in phase of the first switch S1 and the second switch S2, when one of them is in closure
When state, another is in an off state.
Optionally, the first switch S1 and second switch S2 is field-effect tube.
Optionally, the first switch is p-type field-effect tube, and the second switch is N-type field-effect tube.
Optionally, the first switch is N-type field-effect tube, and the second switch is p-type field-effect tube.
Specifically, first switch S1 is in closed state, second switch S2 when PWM input signal is between high period
It is in an off state, at this point, the first current source IDAC1 charges to first resistor RF and capacitor C1, amplifier AMP is to capacitor
C1 discharges, and the voltage of the output terminals A MP_VP1 of amplifier AMP reduces, and passes through integrator 21, PWM comparator 22 and driving
The VOP that device 23 exports is low level.
When PWM input signal is between low period, first switch S1 is in an off state, and second switch S2 is in closure
State, at this point, the second current source IDAC2 discharges to resistance RF and capacitor C1, amplifier AMP charges to capacitor C1,
The voltage of the output terminals A MP_VP1 of amplifier AMP increases, and is exported by integrator 21, PWM comparator 22 and driver 23
VOP is high level.In a PWM input signal cycle, the output of amplifier AMP forms a triangular wave, driver 23
Output VOP is that square wave restores audio signal after the low-frequency filter characteristics of low-pass filter or loudspeaker itself.
Wherein, the voltage signal VCM that common mode voltage signal generation module 24 exports can be not limited to be set as VCM=VDD/
2, since the negative feedback loop gain in the channel VOP is very big, the output voltage DAC_VOP of digital analog converter DAC is with VCM
Center carries out fluctuation small up and down, the output stability of the raising digital analog converter of high degree.
PWM input signal to the channel VOP output end VOP gain A V=2* (2*Din-1) * IDAC*RF, wherein Din
It is high level duty ratio for PWM input signal.
As can be seen from the above description, in the utility model embodiment, digital analog converter uses the form of current source,
The equivalent output impedance of digital analog converter can directly be increased to a certain extent, and then improve the electricity of digital power amplifier system
Source inhibits ratio.
Further, as shown in figure 4, Fig. 4 is another digital analog converter provided by the embodiment of the utility model
Structural schematic diagram, the first current source IDAC1 are the first field-effect tube MP1 and the second field-effect tube MP2.
The second current source IDAC2 is third field-effect tube MN1 and the 4th field-effect tube MN2.
Wherein, the source electrode of the first field-effect tube MP1 is connect with the other end of the first switch S1, and described first
The drain electrode of effect pipe MP1 is connect with the source electrode of the second field-effect tube MP2, and the grid of the first field-effect tube MP1 is used for
Receive the first bias voltage VBP1.
The drain electrode of the second field-effect tube MP2 is connect with the drain electrode of the third field-effect tube MN1, second effect
Should pipe MP2 grid for receive the second bias voltage VBP2.
The source electrode of the third field-effect tube MN1 is connect with the drain electrode of the 4th field-effect tube MN2, the third field effect
Should pipe MN1 grid for receiving third bias voltage VBN1.
The 4th field-effect tube MN2 source electrode is connect with one end of the second switch S2, the 4th field-effect tube MN2
Grid for receive the 4th bias voltage VBN2.
The connecting node of the drain electrode of the drain electrode and third field-effect tube MN1 of the second field-effect tube MP2 is as institute
State the signal output end DAC_VOP of digital analog converter DAC.
Wherein, the first field-effect tube MP1 and the second field-effect tube MP2 is p-type field-effect tube.
The third field-effect tube MN1 and the 4th field-effect tube MN2 is N-type field-effect tube.
Wherein, the first bias voltage VBP1 is generated by the first current generating circuit, for being first field-effect
Pipe MP1 provides grid voltage.
The second bias voltage VBP2 is generated by the second current generating circuit, for being the second field-effect tube MP2
Grid voltage is provided.
The third bias voltage VBN1 is generated by third current generating circuit, for being the third field-effect tube MN1
Grid voltage is provided.
The 4th bias voltage VBN2 is generated by the 4th current generating circuit, for being the 4th field-effect tube MN2
Grid voltage is provided.
Specifically, current source to be all made of to the form of field-effect tube, and realized according to the structure of vertical connection grade cascode,
The equivalent output impedance r0_dac of digital analog converter DAC and the stability of current source are further increased, to improve number
The power supply rejection ratio of power amplification system, equivalent output impedance r0_dac are as follows:
R0_dac=(gm_N1*r0n1*r0n2) // (gm_P1*r0p1*r0p2)
Wherein, gm_N1 indicate third field-effect tube across foot, gm_P1 indicate the second field-effect tube across foot, r0p1 is indicated
The equivalent resistance of first field-effect tube, r0p2 indicate that the equivalent resistance of the second field-effect tube, r0n1 indicate third field-effect tube
Equivalent resistance, r0n2 indicate the equivalent resistance of the 4th field-effect tube.
Also, the current source that the current source and third field-effect tube that the first field-effect tube generates generate should guarantee as far as possible
It is almost equal under technique change and different temperatures, to guarantee the output in the channel VOP when PWM input signal is 50% duty ratio
Holding VOP is also 50% duty ratio, and the DC voltage of the output end VOP in the channel VOP is in VDD/2.
It follows that by way of current source is all made of field-effect tube, it can be with the raising digital simulation of high degree
The equivalent output impedance r0_dac of converter also just further improves the power supply rejection ratio PSRR of digital power amplifier system.
It should be noted that digital analog converter DAC also uses above-mentioned form, concrete principle class in the channel VON
Together, it is not illustrating herein.
It should be noted that all the embodiments in this specification are described in a progressive manner, each embodiment weight
Point explanation is the difference from other embodiments, and the same or similar parts between the embodiments can be referred to each other.
It should also be noted that, herein, relational terms such as first and second and the like are used merely to one
Entity or operation are distinguished with another entity or operation, without necessarily requiring or implying between these entities or operation
There are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant are intended to contain
Lid non-exclusive inclusion, so that article or equipment including a series of elements not only include those elements, but also
It including other elements that are not explicitly listed, or further include for this article or the intrinsic element of equipment.Do not having
In the case where more limitations, the element that is limited by sentence "including a ...", it is not excluded that in the article including above-mentioned element
Or there is also other identical elements in equipment.
The foregoing description of the disclosed embodiments can be realized professional and technical personnel in the field or using originally practical new
Type.Various modifications to these embodiments will be readily apparent to those skilled in the art, and determine herein
The General Principle of justice can be realized in other embodiments without departing from the spirit or scope of the present utility model.Cause
This, the present invention will not be limited to the embodiments shown herein, and is to fit to and principles disclosed herein
The widest scope consistent with features of novelty.
Claims (7)
1. a kind of digital analog converter is applied in digital power amplifier system, which is characterized in that the digital analog converter packet
It includes: first switch, second switch, the first current source and the second current source；
Wherein, one end of the first switch is connect with voltage input end, the other end of the first switch and first electricity
The first end in stream source connects；
The second end of first current source connects the first end of second current source, first current source and described second
Signal output end of the connecting node of current source as the digital analog converter；
The second end of second current source is connect with one end of the second switch, and the other end of the second switch, which is grounded, to be connected
It connects；
The switch state of the switch state of the first switch and the second switch is controlled by PWM input signal, and the PWM is defeated
Enter signal in the closure state, the second switch to be in an off state by the first switch；The PWM input letter
When number being also used to for the first switch being in an off state, the second switch is in closed state.
2. digital analog converter according to claim 1, which is characterized in that first current source is the first field-effect
Pipe and the second field-effect tube；
Second current source is third field-effect tube and the 4th field-effect tube；
Wherein, the source electrode of first field-effect tube is connect with the other end of the first switch, first field-effect tube
Drain electrode is connect with the source electrode of second field-effect tube, and the grid of first field-effect tube is for receiving the first bias voltage；
The drain electrode of second field-effect tube is connect with the drain electrode of the third field-effect tube, the grid of second field-effect tube
For receiving the second bias voltage；
The source electrode of the third field-effect tube is connect with the drain electrode of the 4th field-effect tube, the grid of the third field-effect tube
For receiving third bias voltage；
The 4th field-effect tube source electrode is connect with one end of the second switch, and the grid of the 4th field-effect tube is for connecing
Receive the 4th bias voltage；
The connecting node of the drain electrode of the drain electrode and third field-effect tube of second field-effect tube is as the digital simulation
The signal output end of converter.
3. digital analog converter according to claim 2, which is characterized in that first field-effect tube and described second
Field-effect tube is p-type field-effect tube；
The third field-effect tube and the 4th field-effect tube are N-type field-effect tube.
4. digital analog converter according to claim 2, which is characterized in that first bias voltage is by the first electric current
Generation circuit generates, for providing grid voltage for first field-effect tube；
Second bias voltage is generated by the second current generating circuit, for providing grid electricity for second field-effect tube
Pressure；
The third bias voltage is generated by third current generating circuit, for providing grid electricity for the third field-effect tube
Pressure；
4th bias voltage is generated by the 4th current generating circuit, for providing grid electricity for the 4th field-effect tube
Pressure.
5. digital analog converter according to claim 1, which is characterized in that the first switch and the second switch
For field-effect tube.
6. digital analog converter according to claim 5, which is characterized in that the first switch is p-type field-effect tube,
The second switch is N-type field-effect tube.
7. digital analog converter according to claim 5, which is characterized in that the first switch is N-type field-effect tube,
The second switch is p-type field-effect tube.
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| CN201821262548.3U CN208433954U (en) | 2018-08-07 | 2018-08-07 | A kind of digital analog converter |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109120269A (en) * | 2018-08-07 | 2019-01-01 | 上海艾为电子技术股份有限公司 | A kind of digital analog converter |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109120269A (en) * | 2018-08-07 | 2019-01-01 | 上海艾为电子技术股份有限公司 | A kind of digital analog converter |
| CN109120269B (en) * | 2018-08-07 | 2024-02-27 | 上海艾为电子技术股份有限公司 | Digital-analog converter |
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