CN208401853U - drive source circuit - Google Patents
drive source circuit Download PDFInfo
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- CN208401853U CN208401853U CN201820884457.7U CN201820884457U CN208401853U CN 208401853 U CN208401853 U CN 208401853U CN 201820884457 U CN201820884457 U CN 201820884457U CN 208401853 U CN208401853 U CN 208401853U
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Abstract
The utility model provides a kind of drive source circuit, comprising: at least one pulse reverse circuit generates the output signal of low and high level overturning when often receiving rising edge or failing edge pulse signal；At least one driving circuit, it is corresponding with pulse reverse circuit to be connected, it is opened or closed including a current source and according to the output signal of pulse reverse circuit control current source；Phase-difference control circuit is connected with each driving circuit, forms corresponding phase difference the amplitude in same period is identical, generates the pressure difference of relevant voltage between the identical first light pulse component of initial phase and the second light pulse component for making.The utility model is overturn using pulse and converts rising edge or failing edge driving for pulsed drive so that reducing driving frequency avoids the limitation of pulsed drive pulsewidth, different amplitude drive signals are realized by different current sources, avoid shake caused by Signal averaging, it avoids multipath current-source while controlling, using current source parallel drive, influence of the source impedance to driving is avoided.
Description
Technical field
The utility model relates to Technique on Quantum Communication field, more particularly to the electronic circuit technology field of quantum communications,
Specially a kind of drive source circuit.
Background technique
Currently, a kind of agreement that BB84 agreement is most widely used as quantum key distribution (QKD) system, including polarization
Coding, when a variety of coding modes such as m- phase code, phase code.Four kinds of phases of pure phase code need 3 kinds of non-zeros not
With the pulse voltage signal (another amplitude voltage is bias voltage) of amplitude, while to meet 3 kinds of different amplitude pulses voltages
Generally use voltage Superposition.Two kinds of phases of time phase coding need the pulse voltage signal of a kind of amplitude non-zero (another
Kind amplitude voltage is bias voltage).
The prior art drives using pulse voltage driving method, for four kinds of pure phase code phase code
Phase needs the pulse voltage signal of the different amplitudes of three kinds of non-zeros, while generally adopting to meet 3 kinds of different amplitude pulses voltages
Use voltage Superposition.It is more and more narrow for the width requirement of pulse voltage first with high speed ps optical impulses application, it uses
Pulse voltage superposition needs stringent time unifying, and since the narrower time unifying of pulsewidth is more difficult, while pulse voltage is superimposed
Signal jitter is caused to become larger；High-speed phase is modulated, also requires the frequency of pulse voltage higher and higher, while voltage is folded
Add, the voltage source for needing to control simultaneously also increases, and the sum of superposition will receive the influence of different voltages source impedance, these are all to system
It puts forward higher requirements, while also resulting in phase impulse coding degradation in High Speed System.
Utility model content
In view of the foregoing deficiencies of prior art, the embodiments of the present invention provide a kind of drive source circuit, use
In solving to become larger using the bring signal jitter of pulse voltage driving method in the prior art, voltage source impedance and QKD system are influenced
The problem of performance of uniting.
A kind of drive source circuit of the embodiments of the present invention, the drive source circuit include: at least one pulse overturning
Circuit generates the output signal of low and high level overturning when often receiving rising edge or failing edge pulse signal；At least one drives
Dynamic circuit, it is corresponding with the pulse reverse circuit to be connected, believe including a current source and according to the output of the pulse reverse circuit
Number control current source opens or closes；Phase-difference control circuit is connected, for making in same week with each driving circuit
Amplitude in phase is identical, generates relevant voltage between the identical first light pulse component of initial phase and the second light pulse component
Pressure difference forms corresponding phase difference.
In an embodiment of the utility model, the pulse reverse circuit includes: trigger, receives rising edge or decline
Along pulse signal；Buffer is connected with the trigger output end and output signal is fed back to the trigger input,
The trigger generates the output signal of low and high level overturning when often receiving rising edge or failing edge pulse signal.
In an embodiment of the utility model, the trigger is d type flip flop.
In an embodiment of the utility model, the d type flip flop includes: the first clock signal input terminal and second clock
Signal input part, for receiving rising edge or failing edge pulse signal；The positive end D and the end cathode D, for receiving the buffer
Feedback signal；The positive end Q and the end cathode Q, for outputting signals to the buffer.
In an embodiment of the utility model, the buffer includes: electrode input end and negative input, right respectively
Should in the trigger the anode end Q and the end the cathode Q be connected；Positive feedback end and negative feedback end, it is right respectively
Should in the trigger the end the cathode D and the anode end D be connected；Cathode output end and cathode output end, for defeated
The output signal of the low and high level overturning out.
In an embodiment of the utility model, the driving circuit includes: differential conversion circuit, is overturn with the pulse
The output end of circuit is connected, and the differential signal that the pulse reverse circuit exports is converted to single-ended signal；Switching circuit, with institute
It states differential conversion circuit to be connected, be opened or closed according to the single-ended signal that the differential conversion circuit exports；The current source with
The switching circuit is connected and opens or closes with the opening or closing for switching circuit.
In an embodiment of the utility model, the driving circuit further include: current control circuit, with the current source
It is connected, the size of current for the output of the current source according to phase-difference control.
In an embodiment of the utility model, the differential conversion circuit includes an amplifier；The switching circuit packet
Include a triode.
In an embodiment of the utility model, the phase-difference control circuit includes: power amplifier, with each drive
The output end of dynamic circuit is connected, for amplifying to voltage corresponding with driving circuit output electric current；Phase-modulator,
It is connected with the power amplifier, the first light pulse component and described is controlled according to the voltage of power amplifier output
The pressure difference that relevant voltage is generated between second light pulse component, forms corresponding phase difference.
In an embodiment of the utility model, the phase-difference control circuit includes: voltage regulation resistance, and one end is connected to respectively
Between the driving circuit and the power amplifier, the other end is connected with an external power supply.
As described above, the drive source circuit of the utility model has the advantages that
In the technical solution of the utility model, current source parallel drive is overturn using pulse and converts pulsed drive to
It rises edge or failing edge driving and avoids pulsed drive pulsewidth from limiting to reduce driving frequency, different amplitude drive signals are by different electricity
Stream source is realized, is avoided shake caused by Signal averaging, while single actuations need to only control driving signal all the way, is avoided multichannel electric current
Source controls simultaneously, using current source parallel drive, avoids influence of the source impedance to driving, these are all than the prior art in control
Difficulty is reduced, while greatly improving driveability.
Detailed description of the invention
It, below will be to required in embodiment description in order to illustrate more clearly of the technical scheme in the embodiment of the utility model
Attached drawing to be used is briefly described, it should be apparent that, the accompanying drawings in the following description is only some realities of the utility model
Example is applied, it for those of ordinary skill in the art, without creative efforts, can also be according to these attached drawings
Obtain other attached drawings.
Fig. 1 is shown as a kind of electrical block diagram of the drive source circuit of the utility model.
Fig. 2 is shown as another electrical block diagram of the drive source circuit of the utility model.
Fig. 3 is shown as the electrical block diagram of pulse reverse circuit in the drive source circuit of the utility model.
Fig. 4 is shown as the timing diagram of pulse reverse circuit in the drive source circuit of the utility model.
Fig. 5 is shown as the electrical block diagram of driving circuit in the drive source circuit of the utility model.
Fig. 6 is shown as timing diagram when encoding in the drive source circuit of the utility model using BB84 time phase.
Fig. 7 is shown as timing diagram when phase code pure using BB84 in the drive source circuit of the utility model.
Component label instructions
100 drive source circuits
110 pulse reverse circuits
1101 pulse reverse circuits
1102 pulse reverse circuits
1103 pulse reverse circuits
111 triggers
112 buffers
120 driving circuits
1201 driving circuits
1202 driving circuits
1203 driving circuits
130 phase-difference control circuits
Specific embodiment
Illustrate the embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this theory
Content disclosed by bright book understands other advantages and effect of the utility model easily.The utility model can also be by addition
Different specific embodiments are embodied or practiced, and the various details in this specification can also be based on different viewpoints and answer
With carrying out various modifications or alterations under the spirit without departing from the utility model.It should be noted that the case where not conflicting
Under, the feature in following embodiment and embodiment can be combined with each other.
Fig. 1 is please referred to Fig. 7.It should be clear that this specification structure depicted in this specification institute accompanying drawings, ratio, size etc., only to
Cooperate the revealed content of specification, so that those skilled in the art understands and reads, is not intended to limit the utility model
Enforceable qualifications, therefore do not have technical essential meaning, the modification of any structure, the change of proportionate relationship or size
Adjustment, in the case where not influencing the effect of the utility model can be generated and the purpose that can reach, should all still fall in the utility model
In the range of revealed technology contents can be covered.Meanwhile in this specification it is cited as "upper", "lower", " left side ",
The term on " right side ", " centre " and " one " etc. is merely convenient to being illustrated for narration, rather than enforceable to limit the utility model
Range, relativeness are altered or modified, under the content of no substantial changes in technology, enforceable when being also considered as the utility model
Scope.
The purpose of the present embodiment is that providing a kind of drive source circuit, driven in the prior art using pulse voltage for solving
The problem of flowing mode bring signal jitter becomes larger, and influences voltage source impedance and QKD system performance.Described in detail below reality
With the principle and embodiment of novel drive source circuit, so that those skilled in the art is not needed creative work and be appreciated that this
The drive source circuit of utility model.
The pulsed drive control of the prior art is improved to rising edge driving control by drive source circuit provided in this embodiment
System generates different amplitude driving signals using controllable current source, may be implemented when the rising edge of pulse clock signal arrives, defeated
Signal generates low and high level overturning to control current source output or close out, and according to the mode of current source parallel connection, passes through
Difference control signal generates different driving output to realize that out of phase difference is modulated.
Specifically, as depicted in figs. 1 and 2, the drive source circuit 100 includes: at least one pulse reverse circuit 110,
At least one driving circuit 120 and phase-difference control circuit 130.
In this present embodiment, as shown in Figure 1, the pulse reverse circuit 110 can be one, correspondingly, the drive
Dynamic circuit 120 is also one；As shown in Fig. 2, the pulse reverse circuit 110 can be to be multiple, correspondingly, the driving is electric
Road 120 is also multiple and corresponds with the pulse reverse circuit 110, for example, as shown in Figure 2, the pulse overturning is electric
Road 110 is 3: pulse reverse circuit 1101, pulse reverse circuit 1102, pulse reverse circuit 1103 are connected in parallel, the drive
Dynamic circuit 120 is also three: driving circuit 1201, driving circuit 1202, driving circuit 1203 are sequentially connected in series in corresponding pulse
Reverse circuit 1101, pulse reverse circuit 1102, behind pulse reverse circuit 1103.
Wherein, when QKD system uses BB84 when m- phase encoding scheme, when m- phase system include two kinds of phase differences
0, π, due to there was only 0, π, two kinds of phases, so only need 1 tunnel driven with current sources, correspondingly, the drive source circuit at this time
It include a pulse reverse circuit 110 and a driving circuit 120 in 100.And works as QKD system and use BB84 phase code or inclined
When encoding scheme of shaking, there are 0, pi/2, π, 3 pi/2, four kinds of phases, need 3 tunnel driven with current sources, correspondingly, the driving at this time
It include three pulse reverse circuits in source circuit 100: pulse reverse circuit 1101, pulse reverse circuit 1102, pulse overturning electricity
Road 1103 and three driving circuits: driving circuit 1201, driving circuit 1202, driving circuit 1203, formed it is as shown in Figure 2 and
Join current source structure.
In this present embodiment, the pulse reverse circuit 110 production when often receiving rising edge or failing edge pulse signal
The output signal of raw low and high level overturning.
Specifically, as shown in figure 3, in this present embodiment, the pulse reverse circuit 110 includes: trigger 111 and buffering
Device 112.
The trigger 111 receives rising edge or failing edge pulse signal.Wherein, the trigger 111 is d type flip flop,
The d type flip flop preferably uses high speed d type flip flop.
Specifically, the d type flip flop includes: trigger chip U1, the first clock signal input terminal (CLK shown in Fig. 3
+) and second clock signal input part (CLK- shown in Fig. 3), for receiving rising edge or failing edge pulse signal；Positive D
It holds (D+ shown in Fig. 3) and the end cathode D (D- shown in Fig. 3), for receiving the feedback signal of the buffer 112；Just
The pole end Q (Q+ shown in Fig. 3) and the end cathode Q (Q- shown in Fig. 3), for outputting signals to the buffer 112.
The buffer 112 is connected with 111 output end of trigger and output signal is fed back to the trigger 111
Input terminal generates the output of low and high level overturning when the trigger 111 often receives rising edge or failing edge pulse signal
Signal.
In this present embodiment, the buffer 112 includes: buffer chip U2, electrode input end (IN shown in Fig. 3
+) and negative input (IN- shown in Fig. 3), it respectively corresponds and the anode end the Q (institute in Fig. 3 in the trigger 111
The Q+ shown) it is connected with the end the cathode Q (Q- shown in Fig. 3)；Positive feedback end (Q1+ shown in Fig. 3) and negative feedback
Hold (Q1- shown in Fig. 3), respectively correspond in the trigger 111 the end the cathode D (D- shown in Fig. 3) and institute
The positive end D (D+ shown in Fig. 3) is stated to be connected；Cathode output end (Q0+ shown in Fig. 3) and cathode output end are (shown in Fig. 3
Q0-), for exporting the output signal of low and high level overturning.
Trigger 111 and buffer 112 are realized when often receiving rising edge or failing edge pulse signal in the present embodiment
The process for generating the output signal of low and high level overturning is as follows:
The end CLK of 111 chip U1 of trigger is control signal input, and output end Q connects the end IN of U2, and chip U2 is by the defeated of U1
Signal is divided into two out, and wherein for Q0 as output end, the Q1+ of U2 meets the D- of U1, and the Q1- of U2 meets the D+ of U1.
(1) as shown in Figure 3,4, when the CLK of U1 inputs rising edge or failing edge arrives, if the end D is high level, then U1 is defeated
It is out high level, two output ends Q0, Q1 of U2 are high level, and since the Q1 of U2 is the D input terminal being reversely connected in U1, then D is defeated
Enter to become low level.
(2) as shown in Figure 3,4, when the CLK of U1 inputs rising edge or failing edge arrives, if the end D is low level, then U1 is defeated
It is out low level, two output ends Q0, Q1 of U2 are low level, and since the Q1 of U2 is the D input terminal being reversely connected in U1, then D is defeated
Enter to become high level；It may be implemented by the pulse reverse circuit 110 when the rising edge of CLK arrives, pulse reverse circuit 110
Output signal generate low and high level overturning to control the output or closing of current source in the driving circuit 120.
In this present embodiment, the driving circuit 120 is corresponding with the pulse reverse circuit 110 is connected, including an electric current
Source is simultaneously opened or closed according to the output signal of the pulse reverse circuit 110 control current source.
Specifically, as shown in figure 5, in this present embodiment, the driving circuit 120 includes: differential conversion circuit, switch electricity
Road and current source.
The differential conversion circuit is connected with the output end of the pulse reverse circuit 110, by the pulse reverse circuit
The differential signal of 110 outputs is converted to single-ended signal.In this present embodiment, the differential conversion circuit includes an amplifier U3；
The switching circuit is connected with the differential conversion circuit, the single-ended signal exported according to the differential conversion circuit
(VCTL) it opens or closes.In this present embodiment, the switching circuit includes a triode Q1.
The current source is connected with the switching circuit and opens or closes with the opening or closing for switching circuit.
In this present embodiment, the driving circuit 120 further include: current control circuit is connected with the current source U4, uses
In the size of current of the output of the current source U4 according to phase-difference control.Wherein, the current control circuit output is such as institute in Fig. 5
In the voltage VSET shown to the current source U4, to change the output electric current in the current source U4.
Specifically, in this present embodiment, the course of work of the driving circuit 120 is as follows:
The amplifier U3 is used to change into the differential signal of input the triode Q1's of single-ended signal output control rear class
The voltage VSET of switch, the current control circuit output is used to control the electric current i size of current source U4 output, specially i=
VSET*k, wherein k is proportionality coefficient.When amplifier U3 input is high level, triode Q1 is opened, and current source U4 output electric current is
I, when amplifier U3 input is low level, triode Q1 is closed, and current source U4 externally ends.
In this present embodiment, the phase-difference control circuit 130 is connected with each driving circuit 120, for making same
Amplitude in one period is identical, generates corresponding electricity between the identical first light pulse component of initial phase and the second light pulse component
The pressure difference of pressure forms corresponding phase difference.
Specifically, in this present embodiment, the phase-difference control circuit 130 includes: that power amplifier is (shown in Fig. 2
) and phase-modulator (PM shown in Fig. 2) PA.
The power amplifier (PA) is connected with the output end of each driving circuit 120, for electric with the driving
Road 120 exports the corresponding voltage of electric current and amplifies；The phase-modulator (PM) is connected with the power amplifier (PA), root
It is controlled between the first light pulse component and the second light pulse component according to the voltage of the power amplifier (PA) output
The pressure difference for generating relevant voltage, forms corresponding phase difference.
In this present embodiment, the phase-difference control circuit 130 includes: voltage regulation resistance R, and one end is connected to each driving
Between circuit 120 and the power amplifier (PA), the other end is connected with an external power supply VCC.
M- phase encoding scheme, BB84 phase code or polarization when BB84 is used to compile for the QKD system individually below
When code scheme, the process work of the drive source circuit 100 is described in detail.
1) when QKD system use BB84 when m- phase encoding scheme when, as shown in Figure 1, the drive source circuit 100 by
One driving circuit 120, one of pulse reverse circuit 110, one voltage regulation resistance R, a power amplifier (PA) and a phase
Position modulator (PM) is constituted.When m- phase system include two kinds of phase differences 0, π, wherein the corresponding driving signal pressure difference of 0 phase difference
Be the corresponding driving signal pressure difference of 0, π phase difference be V π, the amplification factor of power amplifier (PA) is β, pressure difference V π size by
120 electric current i=VSET*k of driving circuit is arranged in VSET control, VSET, and pressure drop of the electric current i on resistance R is i*R, pressure drop warp
Overpower amplifier (PA) is i*R* β=V π after amplifying β times, then VSET=V π/(k*R* β).
(a) as shown in fig. 6, make between light pulse P1-1 and P1-2 generate π phase difference, when light pulse P1-1 complete export,
The input rising edge of power amplifier (PA) input terminal voltage V1=VCC at this time, pulse reverse circuit 110 arrive, pulse overturning
The output of circuit 110 is high level, and driving circuit 120 generates the input of i electric current and generates pressure drop i*R, then power amplification on resistance R
Device (PA) input terminal is VCC-i*R, then power amplifier (PA) input terminal pressure drop is VCC- (VCC-i*R)=i*R, pressure drop warp
Load makes to generate π phase between light pulse P1-1 and P1-2 on phase-modulator (PM) after overpower amplifier (PA) amplification
Difference.
(b) as shown in fig. 6, make between light pulse P2-1 and P2-2 generate π phase difference, when light pulse P2-1 complete export,
The input rising edge of power amplifier (PA) input terminal voltage V1=VCC-i*R at this time, pulse reverse circuit 110 arrive, pulse
The output of reverse circuit 110 is low level, and driving circuit 120 closes the input of i electric current, then power amplifier (PA) input terminal voltage V1
=VCC, then power amplifier (PA) input terminal pressure drop is VCC- (VCC-i*R)=i*R, which passes through power amplifier (PA)
Load makes to generate π phase difference between light pulse P2-1 and P2-2 on phase-modulator (PM) after amplification.
(c) as shown in fig. 6, making to generate 0 phase difference between light pulse P3-1 and P3-2, when light pulse P3-1 complete export,
Power amplifier (PA) input terminal voltage is constant at this time, then power amplifier (PA) output end voltage does not have voltage change, pressure drop
It is 0,0 phase difference is generated between light pulse P3-1 and P3-2
In conclusion m- phase code when to realize BB84, need to only input in 110 input terminal of pulse reverse circuit and correspond to
Control pulse.
2) when QKD system uses BB84 phase code or polarization encoder scheme, due to pure phase position coded system and utilization
The polarization encoder system of phase code all includes 4 kinds of phases 0, pi/2, π, 3 pi/2s, so using 120 parallel connection side of No. 3 driving circuit
Formula driving.As shown in Fig. 2, the drive source circuit 100 is by 3 tunnel pulse reverse circuits: pulse reverse circuit 1101, pulse overturning
Circuit 1102, pulse reverse circuit 1103, No. 3 driving circuits: driving circuit 1201, driving circuit 1202, driving circuit 1203,
One voltage regulation resistance R, a power amplifier (PA) and a phase-modulator (PM) are constituted.Pure phase system includes 4 kinds of phases
Potential difference 0, pi/2, π, 3 pi/2s, wherein the corresponding driving signal pressure difference of 0 phase difference is 0, the corresponding driving signal pressure difference of pi/2 phase difference
It is Δ V1, the corresponding driving signal pressure difference of π phase difference is Δ V2, and the corresponding driving signal pressure difference of 3 pi/2 phases difference is Δ V3, function
The amplification factor of rate amplifier (PA) is β, and pressure differential deltap V size is controlled by VSET, and 120 electric current i=of driving circuit is arranged in VSET
The pressure drop of VSET*k, electric current i on resistance R is i*R, which is i*R* β=Δ after power amplifier (PA) amplifies β times
V, then No. 3 driving circuits 120 respectively correspond 3 tunnel phases, and wherein VSET1 is for being arranged pressure differential deltap V1, and VSET2 is for being arranged pressure difference
Δ V2, VSET3 are for being arranged pressure differential deltap V3, then VSET1=Δ V1/ (k*R* β), VSET2=Δ V2/ (k*R* β), VSET3=
ΔV3/(k*R*β)。
(a) as shown in fig. 7, making to generate 0 phase difference between light pulse P1-1 and P1-2, when light pulse P1-1 complete export,
Power amplifier (PA) input terminal voltage is constant at this time, then power amplifier (PA) output end voltage does not have voltage change, pressure drop
It is 0, generates 0 phase difference between light pulse P1-1 and P1-2.
(b) as shown in fig. 7, keeping generation pi/2 phase between light pulse P2-1 and P2-2 poor, when light pulse P2-1 completion is defeated
Out, power amplifier (PA) input terminal voltage Va=VCC, the input rising edge of pulse reverse circuit 1101 arrive at this time, pulse
The output of reverse circuit 1101 is high level, and driving circuit 1201 opens the input of i1 electric current, then power amplifier (PA) input terminal electricity
Va=VCC-i1*R is pressed, then power amplifier (PA) input terminal pressure drop is VCC- (VCC-i1*R)=i1*R, which passes through function
Make to generate pi/2 phase between light pulse P2-1 and P2-2 on phase-modulator (PM) for Δ V1 load after rate amplifier (PA) amplification
Potential difference.
(c) as shown in fig. 7, make between light pulse P3-1 and P3-2 generate π phase difference, when light pulse P3-1 complete export,
The input rising edge of power amplifier (PA) input terminal voltage Va=VCC-i1*R at this time, pulse reverse circuit 1102 arrive, arteries and veins
Rushing the output of reverse circuit 1102 is high level, and driving circuit 1202 opens the input of i2 electric current, then power amplifier (PA) input terminal
Voltage Va=VCC-i1*R-i2*R, then power amplifier (PA) input terminal pressure drop be VCC-i1*R- (VCC-i1*R-i2*R)=
I2*R, the pressure drop after power amplifier (PA) amplification for Δ V2 load make on phase-modulator (PM) light pulse P3-1 and
π phase difference is generated between P3-2.
(d) as shown in fig. 7, to make to generate 3 pi/2 phases between light pulse P4-1 and P4-2 poor, when light pulse P4-1 complete it is defeated
Out, power amplifier (PA) input terminal voltage Va=VCC-i1*R-i2*R at this time, the input rising edge of pulse reverse circuit 1103
It arrives, the output of pulse reverse circuit 1103 is high level, and driving circuit 1203 opens the input of i3 electric current, then power amplifier (PA)
Input terminal voltage Va=VCC-i1*R-i2*R-i3*R, then power amplifier (PA) input terminal pressure drop is VCC-i1*R-i2*R-
(VCC-i1*R-i2*R-i3*R)=i3*R, the pressure drop load for Δ V3 in phase-modulation after power amplifier (PA) amplification
It is poor to make to generate 3 pi/2 phases between light pulse P4-1 and P4-2 on device (PM).
(e) as shown in fig. 7, make between light pulse P5-1 and P5-2 generate π phase difference, when light pulse P5-1 complete export,
The input of power amplifier (PA) input terminal voltage Va=VCC-i1*R-i2*R-i3*R at this time, pulse reverse circuit 1102 rise
Along arriving, the output of pulse reverse circuit 1102 is low level, and driving circuit 1202 closes the input of i2 electric current, then power amplifier
(PA) input terminal voltage Va=VCC-i1*R-i3*R, then power amplifier (PA) input terminal pressure drop is VCC-i1*R-i3*R-
(VCC-i1*R-i2*R-i3*R)=i2*R, the pressure drop load for Δ V2 in phase-modulation after power amplifier (PA) amplification
Make to generate π phase difference between light pulse P5-1 and P5-2 on device (PM).
In conclusion need to only be turned in corresponding pulse for the driving method for realizing the pure phase code of BB84 or polarization encoder
The corresponding control pulse of 110 input terminal of shifting circuit input.
In conclusion in the technical solution of the utility model, current source parallel drive is overturn using pulse by pulsed drive
It is converted into rising edge or failing edge driving and avoids pulsed drive pulsewidth from limiting to reduce driving frequency, different amplitude drive signals
It is realized by different current sources, avoids shake caused by Signal averaging, while single actuations need to only control driving signal all the way, avoid
Multipath current-source controls simultaneously, using current source parallel drive, avoids influence of the source impedance to driving, these all compare the prior art
Difficulty is reduced in control, while greatly improving driveability.So the utility model effectively overcomes in the prior art kind
It plants disadvantage and has high industrial utilization value.
The above embodiments are only illustrative of the principle and efficacy of the utility model, and not for limitation, this is practical new
Type.Any person skilled in the art can all carry out above-described embodiment under the spirit and scope without prejudice to the utility model
Modifications and changes.It therefore, include usual skill in technical field such as without departing from the revealed essence of the utility model
All equivalent modifications or change completed under mind and technical idea, should be covered by the claim of the utility model.
Claims (10)
1. a kind of drive source circuit, it is characterised in that: the drive source circuit includes:
At least one pulse reverse circuit generates low and high level overturning when often receiving rising edge or failing edge pulse signal
Output signal；
At least one driving circuit, it is corresponding with the pulse reverse circuit to be connected, including a current source and turned over according to the pulse
The output signal of shifting circuit controls the current source and opens or closes；
Phase-difference control circuit is connected with each driving circuit, and for making, the amplitude in same period is identical, initial phase
The pressure difference that relevant voltage is generated between identical first light pulse component and the second light pulse component, forms corresponding phase difference.
2. drive source circuit according to claim 1, it is characterised in that: the pulse reverse circuit includes:
Trigger receives rising edge or failing edge pulse signal；
Buffer is connected with the trigger output end and output signal is fed back to the trigger input, in the touching
Hair device generates the output signal of low and high level overturning when often receiving rising edge or failing edge pulse signal.
3. drive source circuit according to claim 2, it is characterised in that: the trigger is d type flip flop.
4. drive source circuit according to claim 3, it is characterised in that: the d type flip flop includes:
First clock signal input terminal and second clock signal input part, for receiving rising edge or failing edge pulse signal；
The positive end D and the end cathode D, for receiving the feedback signal of the buffer；
The positive end Q and the end cathode Q, for outputting signals to the buffer.
5. drive source circuit according to claim 4, it is characterised in that: the buffer includes:
Electrode input end and negative input, respectively correspond in the trigger the anode end Q and the end cathode Q phase
Even；
Positive feedback end and negative feedback end, respectively correspond in the trigger the end the cathode D and the anode end D phase
Even；
Cathode output end and cathode output end, for exporting the output signal of the low and high level overturning.
6. drive source circuit according to claim 1 or 2, it is characterised in that: the driving circuit includes:
Differential conversion circuit is connected with the output end of the pulse reverse circuit, the difference that the pulse reverse circuit is exported
Signal is converted to single-ended signal；
Switching circuit is connected with the differential conversion circuit, according to the differential conversion circuit output single-ended signal open or
It closes；
The current source is connected with the switching circuit and opens or closes with the opening or closing for switching circuit.
7. drive source circuit according to claim 6, it is characterised in that: the driving circuit further include:
Current control circuit is connected with the current source, the size of current for the output of the current source according to phase-difference control.
8. drive source circuit according to claim 6, it is characterised in that: the differential conversion circuit includes an amplifier；
The switching circuit includes a triode.
9. drive source circuit according to claim 1, it is characterised in that: the phase-difference control circuit includes:
Power amplifier is connected with the output end of each driving circuit, for corresponding to driving circuit output electric current
Voltage amplify；
Phase-modulator is connected with the power amplifier, according to the voltage control described first of power amplifier output
The pressure difference that relevant voltage is generated between light pulse component and the second light pulse component, forms corresponding phase difference.
10. drive source circuit according to claim 9, it is characterised in that: the phase-difference control circuit includes:
Voltage regulation resistance, one end are connected between each driving circuit and the power amplifier, the other end and an external power supply
It is connected.
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| CN201820884457.7U CN208401853U (en) | 2018-06-08 | 2018-06-08 | drive source circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110557014A (en) * | 2019-10-16 | 2019-12-10 | 上海沪工焊接集团股份有限公司 | Wide voltage power factor correction circuit |
| CN110581762A (en) * | 2018-06-08 | 2019-12-17 | 科大国盾量子技术股份有限公司 | Driving source circuit |
-
2018
- 2018-06-08 CN CN201820884457.7U patent/CN208401853U/en not_active Withdrawn - After Issue
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110581762A (en) * | 2018-06-08 | 2019-12-17 | 科大国盾量子技术股份有限公司 | Driving source circuit |
| CN110581762B (en) * | 2018-06-08 | 2023-01-31 | 科大国盾量子技术股份有限公司 | Driving source circuit |
| CN110557014A (en) * | 2019-10-16 | 2019-12-10 | 上海沪工焊接集团股份有限公司 | Wide voltage power factor correction circuit |
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