CN208399937U - A kind of motor of electric motor car controller hardware protection circuit based on CPLD - Google Patents

Abstract

The utility model is a kind of motor of electric motor car controller hardware protection circuit based on CPLD; including CPU, CPLD chip, signal conversion circuit, fault-signal conversion circuit, CPLD output conversion circuit and other peripheral circuits; CPU is connected by signal conversion circuit with CPLD chip; other peripheral circuits are connected by faulty change-over circuit with CPLD chip, other peripheral circuits are also connected directly with CPLD.The utility model has the advantages that: logical process is carried out to signal using CPLD chip, the response time is short, the summary responses in the driving wheel system failure；Watchdo function is integrated into CPLD chip, part category and quantity is few, watchdog disabler rate is low；It can be operated with expansion switch amount signal processing and logical process etc., discharge a part of cpu resource.

Description

A kind of motor of electric motor car controller hardware protection circuit based on CPLD

Technical field

The utility model relates to Motor Control Field more particularly to a kind of motor of electric motor car controller based on CPLD are hard Part protects circuit.

Background technique

Drive motor controller is one of component most crucial in electric car, increasingly with domestic New-energy electric vehicle Increase and be gradually introducing 26262 standard of European Union ISO, security function relevant design is related to for vehicle and requires higher and higher, active Safe design is industry development trend.Such as be abnormal suddenly when vehicle high-speed cruising, inverter is in high speed weak magnetic at this time Operation is failed, and actively initiating three-phase shortcircuit protection at this time can make vehicle enter comparatively safe on-position, final safety Parking.

Judge to be carried out by CPU software about state processing after the Collections such as overcurrent-overvoltage in conventional motors controller Operation, response speed are executed all duration values by collection of simulant signal frequency and software code, and failure response time needs several hundred micro- Time second, IGBT is still being worked normally during this process, it is easy to failure or uncontrollable torque.

The crash detection of CPU generallys use special hello dog chip in conventional motors controller or discrete component carries out It builds, dedicated watchdog chip or discrete device, which are built, will bring additional cost and component failure probability to rise. Traditional fault-signal logical process, indicator light processing and other on-off models require to occupy the I/O port of CPU, cpu resource Occupancy is high.

Summary of the invention

The utility model mainly solve electric machine controller in the prior art it is long for the fault-signal operation response time, at The high problem of this height, cpu resource occupancy, providing one kind can protect power conversion module, at low cost, cpu resource to account for immediately With the low motor of electric motor car controller hardware protection circuit and method based on CPLD of rate.

The technical scheme adopted by the utility model to solve the technical problem is as follows: a kind of motor of electric motor car based on CPLD Controller hardware protects circuit, including CPU, CPLD chip, signal conversion circuit, fault-signal conversion circuit, CPLD output to turn Circuit and other peripheral circuits are changed, CPU is connected by signal conversion circuit with CPLD chip, other peripheral circuits are turned by failure It changes circuit to be connected with CPLD chip, other peripheral circuits are also connected directly with CPLD.

In the utility model using CPLD chip to the CPU pwm signal exported be managed while acquiring overcurrent, over-voltage, The signals such as driving malfunction carry out prime processing to the higher signal of failure priority；Utilize the nanosecond response time pair of CPLD Signal directly controls the operations such as output pwm signal carries out three-phase shortcircuit, six phases are opened a way after carrying out logical process, can protect function immediately Rate conversion module.The functions such as watchdog, fault logic processing, indicating fault are integrated in a chip using CPLD chip, Number of devices can be reduced and reduce crash rate caused by device, while reducing cost, release part cpu resource.

Scheme as a preference of the above scheme, the signal conversion circuit include the letter of resistance R and capacitor C, CPU Number output end is electrically connected with resistance R, and the resistance R other end is electrically connected with the pin of capacitor C and CPLD chip respectively, and capacitor C is another End ground connection.Signal conversion circuit is used to convert the PWMX-T of CPU output, and PWMX-B signal, which is converted to, is input to CPLD chip PWMF-XT, PWMF-XB signal, X can be U, V, W, i.e. motor three-phase.Signal conversion circuit is equally used for other output letters of CPU It number is converted to slow-speed of revolution signal speed1, high tach signal speed2, actively triggers three-phase shortcircuit signal CPLD-EN, overcurrent shape State clear signal OC_Clear, overvoltage condition clear signal OV_Clear, feeding-dog signal SW-5KHz, crash state clear signal Die_Clear and reset signal RST1, RST2.

Scheme as a preference of the above scheme, the fault-signal conversion circuit include input Fault-T, Fault-B, magnetic bead FB3, FB4, resistance R62, R63, R64, R65, R66, R67, R68, R69, capacitor C91, C92, C104, C105, C106, C107 and electrical level transferring chip U5, input Fault-T be electrically connected with magnetic bead FB3, the magnetic bead FB3 other end respectively with Resistance R63 and resistance R64 electrical connection, resistance R63 connect+5V power supply, the resistance R64 other end respectively with electrical level transferring chip U5 the Seven pins are connected with capacitor C105 to be connected, and capacitor C105 other end ground connection, input Fault-B is electrically connected with magnetic bead FB4, magnetic bead The FB4 other end is connected with resistance R62 and resistance R67 respectively, and resistance R62 connects+5V power supply, the resistance R67 other end respectively with level The 6th pin of conversion chip U5 is connected with capacitor C104, battery C104 other end ground connection, the 5th pipe of electrical level transferring chip U5 Foot ground connection, the 8th pin connect+5V power supply, and the 8th pin and+5V power connection points are connected to capacitor C91, another termination of capacitor C91 Ground, the first pin of electrical level transferring chip U5 connect+3.3V power supply, and the first pin and+3.3V power connection points are connected to capacitor C92, Capacitor C92 other end ground connection, the second pin of electrical level transferring chip U5 is electrically connected with resistance R65, the resistance R65 other end respectively with The 37th pin electrical connection of resistance R68, capacitor C106 and CPLD chip, resistance R68 and the capacitor C106 other end are grounded, electricity The third pin of flat conversion chip U5 is electrically connected with resistance R66, the resistance R66 other end respectively with resistance R69, capacitor C107 and 38th pin of CPLD chip is electrically connected, and resistance R69 and the capacitor C107 other end are grounded, and the 4th of electrical level transferring chip U5 the Pin ground connection.Fault-signal conversion circuit will drive upper bridge fault-signal Fault-T and lower bridge fault-signal Fault-B driven to turn It is changed to CPLD-T and CPLD-B signal, is input to CPLD chip.

The preferred embodiment of one kind as above scheme, the 94th to the 99th pin of the CPLD chip, the 14 to the 22nd pin is electrically connected with signal conversion circuit all the way respectively, the first to the 4th pin of CPLD chip, and the 8th 19 pins, the 91st pin and the 100th pin receive overcurrent and over-voltage signal respectively, the 5th pin to the 9th pin, and 11 pins, the 20th three-prong, the 68th to the 70th outside output signal of three-prong.68th to the 73rd pipe The outside output pwm signal of foot, the 5th pin to the 9th pin, the 11st pin, the 20th three-prong output status signal and multiple Position signal.

The utility model has the advantages that: logical process is carried out to signal using CPLD chip, the response time is short, in driving wheel system Summary responses when failure of uniting；Watchdo function is integrated into CPLD chip, part category and quantity is few, watchdog function Crash rate is low；It can be operated with expansion switch amount signal processing and logical process etc., discharge a part of cpu resource.

Detailed description of the invention

Fig. 1 is a kind of circuit diagram of signal conversion circuit.

Fig. 2 is a kind of circuit diagram of fault-signal conversion circuit.

Fig. 3 is a kind of pin connection figure of CPLD chip.

Specific embodiment

Below with reference to the embodiments and with reference to the accompanying drawing being further described to the technical solution of the utility model.

Embodiment:

A kind of motor of electric motor car controller hardware based on CPLD of the present embodiment protects circuit, it is characterized in that: including CPU, CPLD chip, signal conversion circuit, fault-signal conversion circuit, CPLD output conversion circuit and other peripheral circuits, CPU It is connected by signal conversion circuit with CPLD chip, other peripheral circuits are connected by faulty change-over circuit with CPLD chip, He is also connected directly with CPLD peripheral circuit.

As shown in Figure 1, the signal output end that signal conversion circuit includes resistance R and capacitor C, CPU is electrically connected with resistance R, The resistance R other end is electrically connected with the pin of capacitor C and CPLD chip respectively, capacitor C other end ground connection.The circuit exports CPU PWMX-T, PWMX-B signal is converted to PWMF-XT, and PWMF-XB signal, X can be U, V, W, i.e. motor three-phase.The circuit will also PPC_Speed1, PPC_Speed2, PPC_5KHz, PPC_ClearDie, PPC_ClearOC, PPC_ of CPU output ClearOV, PPC_EN, PPC_RST1, PPC_RST2 are converted into slow-speed of revolution signal speed1, high tach signal speed2, active It triggers three-phase shortcircuit signal CPLD-EN, over-current state clear signal OC_Clear, overvoltage condition clear signal OV_Clear, feed Dog signal SW-5KHz, crash state clear signal Die_Clear and reset signal RST1, RST2.

As shown in Fig. 2, fault-signal conversion circuit includes input Fault-T, Fault-B, magnetic bead FB3, FB4, resistance R62, R63, R64, R65, R66, R67, R68, R69, capacitor C91, C92, C104, C105, C106, C107 and electrical level transferring chip U5, input Fault-T are electrically connected with magnetic bead FB3, and the magnetic bead FB3 other end is electrically connected with resistance R63 and resistance R64 respectively, resistance R63 connects+5V power supply, and the resistance R64 other end is connected with the 7th pin and capacitor C105 of electrical level transferring chip U5 respectively to be connected, electricity Hold the C105 other end ground connection, input Fault-B be electrically connected with magnetic bead FB4, the magnetic bead FB4 other end respectively with resistance R62 and resistance R67 is connected, and resistance R62 connects+5V power supply, the resistance R67 other end respectively with the 6th pin and capacitor of electrical level transferring chip U5 C104 is connected, battery C104 other end ground connection, and the 5th pin ground connection of electrical level transferring chip U5, the 8th pin connects+5V power supply, the Eight pins and+5V power connection points are connected to capacitor C91, capacitor C91 other end ground connection, and the first pin of electrical level transferring chip U5 connects + 3.3V power supply, the first pin and+3.3V power connection points are connected to capacitor C92, capacitor C92 other end ground connection, electrical level transferring chip The second pin of U5 is electrically connected with resistance R65, the resistance R65 other end respectively with resistance R68, capacitor C106 and CPLD chip The electrical connection of 37 pins, resistance R68 and the capacitor C106 other end are grounded, the third pin and resistance of electrical level transferring chip U5 R66 electrical connection, the resistance R66 other end are electrically connected with the 38th pin of resistance R69, capacitor C107 and CPLD chip respectively, Resistance R69 and the capacitor C107 other end are grounded, the 4th pin ground connection of electrical level transferring chip U5.Fault-T is to drive upper bridge event Hindering signal, Fault-B is to drive lower bridge fault-signal, and electrical level transferring chip U5 is SN74LVC2T45QDCURQ1 chip, Fault-T, Fault-B signal are converted into CPLD-T, CPLD-B signal and are separately input to the 37th of CPLD chip the, 38 Pin.

As shown in figure 3, CPLD chip uses LAMXO640C-3TN100E chip, the 94th of the CPLD chip is arrived 99th pin sequentially inputs PWMF_VB, PWMF_UB, PWMF_UT, PWMF_VT, PWMF_WB, PWMF_VT, and the 14th arrives 22nd pin is electrically connected with signal conversion circuit all the way respectively, and the 14th to the 22nd pin sequentially inputs crash state Clear signal Die_Clear, high tach signal speed2, slow-speed of revolution signal speed1, over-current state clear signal OC_Clear, Overvoltage condition clear signal OV_Clear, reset signal RST2, reset signal RST1, three-phase shortcircuit signal CPLD- is actively triggered The first to the 4th pin of EN, feeding-dog signal SW-5KHz, CPLD chip, the 89th pin, the 91st pin and the 100th Pin successively receives motor U phase negative current over-current signal OC_U_L, motor U phase positive current over-current signal OC_U_H, motor W phase and bears Overcurrent signal OC_W_L, motor W phase positive current over-current signal OC_W_H, motor V phase negative current over-current signal OC_V_L, electricity Machine V phase positive current over-current signal OC_U_H and over-voltage signal DCV_OV, the 5th pin to the 9th pin, the 11st pin, second Ten three-prongs, the 68th to the 70th three-prong successively outside output status signal and reset signal.

The specific embodiments described herein are merely examples of the spirit of the present invention.The utility model institute Belonging to those skilled in the art can make various modifications or additions to the described embodiments or using similar Mode substitute, but without departing from the spirit of the present application or beyond the scope of the appended claims.

Claims (4)

1. a kind of motor of electric motor car controller hardware based on CPLD protects circuit, it is characterized in that: include CPU, CPLD chip, Signal conversion circuit, fault-signal conversion circuit, CPLD output conversion circuit and peripheral circuit, CPU pass through signal conversion circuit Be connected with CPLD chip, peripheral circuit is connected by faulty change-over circuit with CPLD chip, peripheral circuit also with the direct phase of CPLD Even.

2. the motor of electric motor car controller hardware according to claim 1 based on CPLD protects circuit, it is characterized in that: institute The signal conversion circuit stated includes that the signal output end of resistance R and capacitor C, CPU are electrically connected with resistance R, resistance R other end difference It is electrically connected with the pin of capacitor C and CPLD chip, capacitor C other end ground connection.

3. the motor of electric motor car controller hardware according to claim 1 based on CPLD protects circuit, the failure Signal conversion circuit include input Fault-T, Fault-T, magnetic bead FB3, FB4, resistance R62, R63, R64, R65, R66, R67, R68, R69, capacitor C91, C92, C104, C105, C106, C107 and electrical level transferring chip U5, input Fault-T and magnetic bead FB3 Electrical connection, the magnetic bead FB3 other end are electrically connected with resistance R63 and resistance R64 respectively, and resistance R63 connects+5V power supply, and resistance R64 is another End is connected with the 7th pin and capacitor C105 of electrical level transferring chip U5 respectively to be connected, capacitor C105 other end ground connection, input Fault-B is electrically connected with magnetic bead FB4, and the magnetic bead FB4 other end is connected with resistance R62 and resistance R67 respectively, and resistance R62 connects+5V electricity Source, the resistance R67 other end are connected with the 6th pin and capacitor C104 of electrical level transferring chip U5 respectively, another termination of battery C104 Ground, the 5th pin ground connection of electrical level transferring chip U5, the 8th pin connect+5V power supply, and the 8th pin is connected to+5V power connection points Capacitor C91, capacitor C91 other end ground connection, the first pin of electrical level transferring chip U5 meet+3.3V power supply, the first pin and+3.3V Power connection points are connected to capacitor C92, capacitor C92 other end ground connection, and the second pin and the resistance R65 of electrical level transferring chip U5 is electrically connected It connects, the resistance R65 other end is electrically connected with the 37th pin of resistance R68, capacitor C106 and CPLD chip respectively, resistance R68 It is grounded with the capacitor C106 other end, the third pin of electrical level transferring chip U5 is electrically connected with resistance R66, the resistance R66 other end point It is not electrically connected with the 38th pin of resistance R69, capacitor C107 and CPLD chip, resistance R69 and another termination of capacitor C107 Ground, the 4th pin ground connection of electrical level transferring chip U5.

4. the motor of electric motor car controller hardware according to claim 1 based on CPLD protects circuit, it is characterized in that: institute State the 94th to the 99th pin of CPLD chip, the 14th to the 22nd pin respectively with signal conversion circuit all the way Electrical connection, the first to the 4th pin of CPLD chip, the 89th pin, the 91st pin and the 100th pin receive respectively Overcurrent and over-voltage signal, the 5th pin to the 9th pin, the 11st pin, the 20th three-prong, the 68th to the 73rd The outside output signal of pin.